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authorHuang Shijie <b32955@freescale.com>2012-09-13 02:57:54 -0400
committerDavid Woodhouse <David.Woodhouse@intel.com>2012-09-29 10:54:51 -0400
commitddab3838aa3332ed2c8ea96accbed5218a2a72b7 (patch)
tree3bc1c64e7c865c7f7d398f51815235ddf9731f57
parent3e70192c41ac607c63c31ea00be62dd9afb85575 (diff)
mtd: gpmi: add a new field for HW_GPMI_TIMING1
The gpmi_nfc_compute_hardware_timing{} should contains all the fields setting for gpmi timing registers. It already contains the fields for HW_GPMI_TIMING0 and HW_GPMI_CTRL1. So it is better to add a new field setting for HW_GPMI_TIMING1 in this data structure. This makes the code more clear in logic. This patch also changes some comments to make the code more readable. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
-rw-r--r--drivers/mtd/nand/gpmi-nand/gpmi-lib.c17
-rw-r--r--drivers/mtd/nand/gpmi-nand/gpmi-nand.h10
-rw-r--r--drivers/mtd/nand/gpmi-nand/gpmi-regs.h3
3 files changed, 22 insertions, 8 deletions
diff --git a/drivers/mtd/nand/gpmi-nand/gpmi-lib.c b/drivers/mtd/nand/gpmi-nand/gpmi-lib.c
index 2289cf8dc35b..c95dbe8bb272 100644
--- a/drivers/mtd/nand/gpmi-nand/gpmi-lib.c
+++ b/drivers/mtd/nand/gpmi-nand/gpmi-lib.c
@@ -728,6 +728,7 @@ return_results:
728 hw->address_setup_in_cycles = address_setup_in_cycles; 728 hw->address_setup_in_cycles = address_setup_in_cycles;
729 hw->use_half_periods = dll_use_half_periods; 729 hw->use_half_periods = dll_use_half_periods;
730 hw->sample_delay_factor = sample_delay_factor; 730 hw->sample_delay_factor = sample_delay_factor;
731 hw->device_busy_timeout = GPMI_DEFAULT_BUSY_TIMEOUT;
731 732
732 /* Return success. */ 733 /* Return success. */
733 return 0; 734 return 0;
@@ -752,26 +753,26 @@ void gpmi_begin(struct gpmi_nand_data *this)
752 goto err_out; 753 goto err_out;
753 } 754 }
754 755
755 /* set ready/busy timeout */
756 writel(0x500 << BP_GPMI_TIMING1_BUSY_TIMEOUT,
757 gpmi_regs + HW_GPMI_TIMING1);
758
759 /* Get the timing information we need. */ 756 /* Get the timing information we need. */
760 nfc->clock_frequency_in_hz = clk_get_rate(r->clock[0]); 757 nfc->clock_frequency_in_hz = clk_get_rate(r->clock[0]);
761 clock_period_in_ns = 1000000000 / nfc->clock_frequency_in_hz; 758 clock_period_in_ns = 1000000000 / nfc->clock_frequency_in_hz;
762 759
763 gpmi_nfc_compute_hardware_timing(this, &hw); 760 gpmi_nfc_compute_hardware_timing(this, &hw);
764 761
765 /* Set up all the simple timing parameters. */ 762 /* [1] Set HW_GPMI_TIMING0 */
766 reg = BF_GPMI_TIMING0_ADDRESS_SETUP(hw.address_setup_in_cycles) | 763 reg = BF_GPMI_TIMING0_ADDRESS_SETUP(hw.address_setup_in_cycles) |
767 BF_GPMI_TIMING0_DATA_HOLD(hw.data_hold_in_cycles) | 764 BF_GPMI_TIMING0_DATA_HOLD(hw.data_hold_in_cycles) |
768 BF_GPMI_TIMING0_DATA_SETUP(hw.data_setup_in_cycles) ; 765 BF_GPMI_TIMING0_DATA_SETUP(hw.data_setup_in_cycles) ;
769 766
770 writel(reg, gpmi_regs + HW_GPMI_TIMING0); 767 writel(reg, gpmi_regs + HW_GPMI_TIMING0);
771 768
772 /* 769 /* [2] Set HW_GPMI_TIMING1 */
773 * DLL_ENABLE must be set to 0 when setting RDN_DELAY or HALF_PERIOD. 770 writel(BF_GPMI_TIMING1_BUSY_TIMEOUT(hw.device_busy_timeout),
774 */ 771 gpmi_regs + HW_GPMI_TIMING1);
772
773 /* [3] The following code is to set the HW_GPMI_CTRL1. */
774
775 /* DLL_ENABLE must be set to 0 when setting RDN_DELAY or HALF_PERIOD. */
775 writel(BM_GPMI_CTRL1_DLL_ENABLE, gpmi_regs + HW_GPMI_CTRL1_CLR); 776 writel(BM_GPMI_CTRL1_DLL_ENABLE, gpmi_regs + HW_GPMI_CTRL1_CLR);
776 777
777 /* Clear out the DLL control fields. */ 778 /* Clear out the DLL control fields. */
diff --git a/drivers/mtd/nand/gpmi-nand/gpmi-nand.h b/drivers/mtd/nand/gpmi-nand/gpmi-nand.h
index 1f6121782330..c814bddaffc4 100644
--- a/drivers/mtd/nand/gpmi-nand/gpmi-nand.h
+++ b/drivers/mtd/nand/gpmi-nand/gpmi-nand.h
@@ -189,14 +189,24 @@ struct gpmi_nand_data {
189 * @data_setup_in_cycles: The data setup time, in cycles. 189 * @data_setup_in_cycles: The data setup time, in cycles.
190 * @data_hold_in_cycles: The data hold time, in cycles. 190 * @data_hold_in_cycles: The data hold time, in cycles.
191 * @address_setup_in_cycles: The address setup time, in cycles. 191 * @address_setup_in_cycles: The address setup time, in cycles.
192 * @device_busy_timeout: The timeout waiting for NAND Ready/Busy,
193 * this value is the number of cycles multiplied
194 * by 4096.
192 * @use_half_periods: Indicates the clock is running slowly, so the 195 * @use_half_periods: Indicates the clock is running slowly, so the
193 * NFC DLL should use half-periods. 196 * NFC DLL should use half-periods.
194 * @sample_delay_factor: The sample delay factor. 197 * @sample_delay_factor: The sample delay factor.
195 */ 198 */
196struct gpmi_nfc_hardware_timing { 199struct gpmi_nfc_hardware_timing {
200 /* for HW_GPMI_TIMING0 */
197 uint8_t data_setup_in_cycles; 201 uint8_t data_setup_in_cycles;
198 uint8_t data_hold_in_cycles; 202 uint8_t data_hold_in_cycles;
199 uint8_t address_setup_in_cycles; 203 uint8_t address_setup_in_cycles;
204
205 /* for HW_GPMI_TIMING1 */
206 uint16_t device_busy_timeout;
207#define GPMI_DEFAULT_BUSY_TIMEOUT 0x500 /* default busy timeout value.*/
208
209 /* for HW_GPMI_CTRL1 */
200 bool use_half_periods; 210 bool use_half_periods;
201 uint8_t sample_delay_factor; 211 uint8_t sample_delay_factor;
202}; 212};
diff --git a/drivers/mtd/nand/gpmi-nand/gpmi-regs.h b/drivers/mtd/nand/gpmi-nand/gpmi-regs.h
index 83431240e2f2..8994e201924c 100644
--- a/drivers/mtd/nand/gpmi-nand/gpmi-regs.h
+++ b/drivers/mtd/nand/gpmi-nand/gpmi-regs.h
@@ -154,6 +154,9 @@
154 154
155#define HW_GPMI_TIMING1 0x00000080 155#define HW_GPMI_TIMING1 0x00000080
156#define BP_GPMI_TIMING1_BUSY_TIMEOUT 16 156#define BP_GPMI_TIMING1_BUSY_TIMEOUT 16
157#define BM_GPMI_TIMING1_BUSY_TIMEOUT (0xffff << BP_GPMI_TIMING1_BUSY_TIMEOUT)
158#define BF_GPMI_TIMING1_BUSY_TIMEOUT(v) \
159 (((v) << BP_GPMI_TIMING1_BUSY_TIMEOUT) & BM_GPMI_TIMING1_BUSY_TIMEOUT)
157 160
158#define HW_GPMI_TIMING2 0x00000090 161#define HW_GPMI_TIMING2 0x00000090
159#define HW_GPMI_DATA 0x000000a0 162#define HW_GPMI_DATA 0x000000a0