drm/i915: Specify when the PLL hw state fields are valid

Not all those fields are valid on a given platform. Make it explicit.

Unions could also be used, but were cluttering some code paths with
if/else ladders.

v2: Don't use anonymous unions (Daniel)

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

1 files changed, 3 insertions, 0 deletions

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index c70b2b67282e..c3beb08813c6 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -197,10 +197,13 @@ enum intel_dpll_id {
 #define I915_NUM_PLLS 2
 
 struct intel_dpll_hw_state {
+        /* i9xx, pch plls */
         uint32_t dpll;
         uint32_t dpll_md;
         uint32_t fp0;
         uint32_t fp1;
+
+        /* hsw, bdw */
         uint32_t wrpll;
 };