Merge tag 'iommu-updates-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu

Pull iommu updates from Joerg Roedel:
 "This time with:

   - support for the generic PCI device alias code in x86 IOMMU drivers

   - a new sysfs interface for IOMMUs

   - preparations for hotplug support in the Intel IOMMU driver

   - change the AMD IOMMUv2 driver to not hold references to core data
     structures like mm_struct or task_struct.  Rely on mmu_notifers
     instead.

   - removal of the OMAP IOVMM interface, all users of it are converted
     to DMA-API now

   - make the struct iommu_ops const everywhere

   - initial PCI support for the ARM SMMU driver

   - there is now a generic device tree binding documented for ARM
     IOMMUs

   - various fixes and cleanups all over the place

  Also included are some changes to the OMAP code, which are acked by
  the maintainer"

* tag 'iommu-updates-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (67 commits)
  devicetree: Add generic IOMMU device tree bindings
  iommu/vt-d: Fix race setting IRQ CPU affinity while freeing IRQ
  iommu/amd: Fix 2 typos in comments
  iommu/amd: Fix device_state reference counting
  iommu/amd: Remove change_pte mmu_notifier call-back
  iommu/amd: Don't set pasid_state->mm to NULL in unbind_pasid
  iommu/exynos: Select ARM_DMA_USE_IOMMU
  iommu/vt-d: Exclude devices using RMRRs from IOMMU API domains
  iommu/omap: Remove platform data da_start and da_end fields
  ARM: omap: Don't set iommu pdata da_start and da_end fields
  iommu/omap: Remove virtual memory manager
  iommu/vt-d: Fix issue in computing domain's iommu_snooping flag
  iommu/vt-d: Introduce helper function iova_size() to improve code readability
  iommu/vt-d: Introduce helper domain_pfn_within_range() to simplify code
  iommu/vt-d: Simplify intel_unmap_sg() and kill duplicated code
  iommu/vt-d: Change iommu_enable/disable_translation to return void
  iommu/vt-d: Simplify include/linux/dmar.h
  iommu/vt-d: Avoid freeing virtual machine domain in free_dmar_iommu()
  iommu/vt-d: Fix possible invalid memory access caused by free_dmar_iommu()
  iommu/vt-d: Allocate dynamic domain id for virtual domains only
  ...

41 files changed, 1567 insertions, 2050 deletions

diff --git a/Documentation/ABI/testing/sysfs-class-iommu b/Documentation/ABI/testing/sysfs-class-iommu
new file mode 100644
index 000000000000..6d0a1b4be82d
--- /dev/null
+++ b/Documentation/ABI/testing/sysfs-class-iommu
@@ -0,0 +1,17 @@
+What:           /sys/class/iommu/<iommu>/devices/
+Date:           June 2014
+KernelVersion:  3.17
+Contact:        Alex Williamson <alex.williamson@redhat.com>
+Description:
+                IOMMU drivers are able to link devices managed by a
+                given IOMMU here to allow association of IOMMU to
+                device.
+
+What:           /sys/devices/.../iommu
+Date:           June 2014
+KernelVersion:  3.17
+Contact:        Alex Williamson <alex.williamson@redhat.com>
+Description:
+                IOMMU drivers are able to link the IOMMU for a
+                given device here to allow association of device to
+                IOMMU.
diff --git a/Documentation/ABI/testing/sysfs-class-iommu-amd-iommu b/Documentation/ABI/testing/sysfs-class-iommu-amd-iommu
new file mode 100644
index 000000000000..d6ba8e8a4a97
--- /dev/null
+++ b/Documentation/ABI/testing/sysfs-class-iommu-amd-iommu
@@ -0,0 +1,14 @@
+What:           /sys/class/iommu/<iommu>/amd-iommu/cap
+Date:           June 2014
+KernelVersion:  3.17
+Contact:        Alex Williamson <alex.williamson@redhat.com>
+Description:
+                IOMMU capability header as documented in the AMD IOMMU
+                specification.  Format: %x
+
+What:           /sys/class/iommu/<iommu>/amd-iommu/features
+Date:           June 2014
+KernelVersion:  3.17
+Contact:        Alex Williamson <alex.williamson@redhat.com>
+Description:
+                Extended features of the IOMMU.  Format: %llx
diff --git a/Documentation/ABI/testing/sysfs-class-iommu-intel-iommu b/Documentation/ABI/testing/sysfs-class-iommu-intel-iommu
new file mode 100644
index 000000000000..258cc246d98e
--- /dev/null
+++ b/Documentation/ABI/testing/sysfs-class-iommu-intel-iommu
@@ -0,0 +1,32 @@
+What:           /sys/class/iommu/<iommu>/intel-iommu/address
+Date:           June 2014
+KernelVersion:  3.17
+Contact:        Alex Williamson <alex.williamson@redhat.com>
+Description:
+                Physical address of the VT-d DRHD for this IOMMU.
+                Format: %llx.  This allows association of a sysfs
+                intel-iommu with a DMAR DRHD table entry.
+
+What:           /sys/class/iommu/<iommu>/intel-iommu/cap
+Date:           June 2014
+KernelVersion:  3.17
+Contact:        Alex Williamson <alex.williamson@redhat.com>
+Description:
+                The cached hardware capability register value
+                of this DRHD unit.  Format: %llx.
+
+What:           /sys/class/iommu/<iommu>/intel-iommu/ecap
+Date:           June 2014
+KernelVersion:  3.17
+Contact:        Alex Williamson <alex.williamson@redhat.com>
+Description:
+                The cached hardware extended capability register
+                value of this DRHD unit.  Format: %llx.
+
+What:           /sys/class/iommu/<iommu>/intel-iommu/version
+Date:           June 2014
+KernelVersion:  3.17
+Contact:        Alex Williamson <alex.williamson@redhat.com>
+Description:
+                The architecture version as reported from the
+                VT-d VER_REG.  Format: %d:%d, major:minor
diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.txt b/Documentation/devicetree/bindings/iommu/arm,smmu.txt
index f284b99402bc..2d0f7cd867ea 100644
--- a/Documentation/devicetree/bindings/iommu/arm,smmu.txt
+++ b/Documentation/devicetree/bindings/iommu/arm,smmu.txt
@@ -42,12 +42,6 @@ conditions.
 
 ** System MMU optional properties:
 
-- smmu-parent   : When multiple SMMUs are chained together, this
-                  property can be used to provide a phandle to the
-                  parent SMMU (that is the next SMMU on the path going
-                  from the mmu-masters towards memory) node for this
-                  SMMU.
-
 - calxeda,smmu-secure-config-access : Enable proper handling of buggy
                   implementations that always use secure access to
                   SMMU configuration registers. In this case non-secure
diff --git a/Documentation/devicetree/bindings/iommu/iommu.txt b/Documentation/devicetree/bindings/iommu/iommu.txt
new file mode 100644
index 000000000000..5a8b4624defc
--- /dev/null
+++ b/Documentation/devicetree/bindings/iommu/iommu.txt
@@ -0,0 +1,182 @@
+This document describes the generic device tree binding for IOMMUs and their
+master(s).
+
+
+IOMMU device node:
+==================
+
+An IOMMU can provide the following services:
+
+* Remap address space to allow devices to access physical memory ranges that
+  they otherwise wouldn't be capable of accessing.
+
+  Example: 32-bit DMA to 64-bit physical addresses
+
+* Implement scatter-gather at page level granularity so that the device does
+  not have to.
+
+* Provide system protection against "rogue" DMA by forcing all accesses to go
+  through the IOMMU and faulting when encountering accesses to unmapped
+  address regions.
+
+* Provide address space isolation between multiple contexts.
+