diff options
| author | Rafał Miłecki <zajec5@gmail.com> | 2014-07-30 17:21:06 -0400 |
|---|---|---|
| committer | John W. Linville <linville@tuxdriver.com> | 2014-07-31 13:45:32 -0400 |
| commit | dc6be9f54a4ecb0a09765d1f515ed947d86b7528 (patch) | |
| tree | 49250a2dd59c8248726fa21ebc45955609eb253d | |
| parent | 11d14c7921715bf74fe3b43ba82cdade6f6dc476 (diff) | |
bcma: use NS prefix for names of Northstar specific cores
It's cleaner and we don't have quite identical names like
BCMA_CORE_PCIEG2 and BCMA_CORE_PCIE2.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
| -rw-r--r-- | drivers/bcma/scan.c | 22 | ||||
| -rw-r--r-- | include/linux/bcma/bcma.h | 22 |
2 files changed, 22 insertions, 22 deletions
diff --git a/drivers/bcma/scan.c b/drivers/bcma/scan.c index 37768401d113..b4764c6bcf17 100644 --- a/drivers/bcma/scan.c +++ b/drivers/bcma/scan.c | |||
| @@ -32,17 +32,17 @@ static const struct bcma_device_id_name bcma_bcm_device_names[] = { | |||
| 32 | { BCMA_CORE_4706_CHIPCOMMON, "BCM4706 ChipCommon" }, | 32 | { BCMA_CORE_4706_CHIPCOMMON, "BCM4706 ChipCommon" }, |
| 33 | { BCMA_CORE_4706_SOC_RAM, "BCM4706 SOC RAM" }, | 33 | { BCMA_CORE_4706_SOC_RAM, "BCM4706 SOC RAM" }, |
| 34 | { BCMA_CORE_4706_MAC_GBIT, "BCM4706 GBit MAC" }, | 34 | { BCMA_CORE_4706_MAC_GBIT, "BCM4706 GBit MAC" }, |
| 35 | { BCMA_CORE_PCIEG2, "PCIe Gen 2" }, | 35 | { BCMA_CORE_NS_PCIEG2, "PCIe Gen 2" }, |
| 36 | { BCMA_CORE_DMA, "DMA" }, | 36 | { BCMA_CORE_NS_DMA, "DMA" }, |
| 37 | { BCMA_CORE_SDIO3, "SDIO3" }, | 37 | { BCMA_CORE_NS_SDIO3, "SDIO3" }, |
| 38 | { BCMA_CORE_USB20, "USB 2.0" }, | 38 | { BCMA_CORE_NS_USB20, "USB 2.0" }, |
| 39 | { BCMA_CORE_USB30, "USB 3.0" }, | 39 | { BCMA_CORE_NS_USB30, "USB 3.0" }, |
| 40 | { BCMA_CORE_A9JTAG, "ARM Cortex A9 JTAG" }, | 40 | { BCMA_CORE_NS_A9JTAG, "ARM Cortex A9 JTAG" }, |
| 41 | { BCMA_CORE_DDR23, "Denali DDR2/DDR3 memory controller" }, | 41 | { BCMA_CORE_NS_DDR23, "Denali DDR2/DDR3 memory controller" }, |
| 42 | { BCMA_CORE_ROM, "ROM" }, | 42 | { BCMA_CORE_NS_ROM, "ROM" }, |
| 43 | { BCMA_CORE_NAND, "NAND flash controller" }, | 43 | { BCMA_CORE_NS_NAND, "NAND flash controller" }, |
| 44 | { BCMA_CORE_QSPI, "SPI flash controller" }, | 44 | { BCMA_CORE_NS_QSPI, "SPI flash controller" }, |
| 45 | { BCMA_CORE_CHIPCOMMON_B, "Chipcommon B" }, | 45 | { BCMA_CORE_NS_CHIPCOMMON_B, "Chipcommon B" }, |
| 46 | { BCMA_CORE_ARMCA9, "ARM Cortex A9 core (ihost)" }, | 46 | { BCMA_CORE_ARMCA9, "ARM Cortex A9 core (ihost)" }, |
| 47 | { BCMA_CORE_AMEMC, "AMEMC (DDR)" }, | 47 | { BCMA_CORE_AMEMC, "AMEMC (DDR)" }, |
| 48 | { BCMA_CORE_ALTA, "ALTA (I2S)" }, | 48 | { BCMA_CORE_ALTA, "ALTA (I2S)" }, |
diff --git a/include/linux/bcma/bcma.h b/include/linux/bcma/bcma.h index 70b8d88b3982..0272e49135d0 100644 --- a/include/linux/bcma/bcma.h +++ b/include/linux/bcma/bcma.h | |||
| @@ -73,17 +73,17 @@ struct bcma_host_ops { | |||
| 73 | /* Core-ID values. */ | 73 | /* Core-ID values. */ |
| 74 | #define BCMA_CORE_OOB_ROUTER 0x367 /* Out of band */ | 74 | #define BCMA_CORE_OOB_ROUTER 0x367 /* Out of band */ |
| 75 | #define BCMA_CORE_4706_CHIPCOMMON 0x500 | 75 | #define BCMA_CORE_4706_CHIPCOMMON 0x500 |
| 76 | #define BCMA_CORE_PCIEG2 0x501 | 76 | #define BCMA_CORE_NS_PCIEG2 0x501 |
| 77 | #define BCMA_CORE_DMA 0x502 | 77 | #define BCMA_CORE_NS_DMA 0x502 |
| 78 | #define BCMA_CORE_SDIO3 0x503 | 78 | #define BCMA_CORE_NS_SDIO3 0x503 |
| 79 | #define BCMA_CORE_USB20 0x504 | 79 | #define BCMA_CORE_NS_USB20 0x504 |
| 80 | #define BCMA_CORE_USB30 0x505 | 80 | #define BCMA_CORE_NS_USB30 0x505 |
| 81 | #define BCMA_CORE_A9JTAG 0x506 | 81 | #define BCMA_CORE_NS_A9JTAG 0x506 |
| 82 | #define BCMA_CORE_DDR23 0x507 | 82 | #define BCMA_CORE_NS_DDR23 0x507 |
| 83 | #define BCMA_CORE_ROM 0x508 | 83 | #define BCMA_CORE_NS_ROM 0x508 |
| 84 | #define BCMA_CORE_NAND 0x509 | 84 | #define BCMA_CORE_NS_NAND 0x509 |
| 85 | #define BCMA_CORE_QSPI 0x50A | 85 | #define BCMA_CORE_NS_QSPI 0x50A |
| 86 | #define BCMA_CORE_CHIPCOMMON_B 0x50B | 86 | #define BCMA_CORE_NS_CHIPCOMMON_B 0x50B |
| 87 | #define BCMA_CORE_4706_SOC_RAM 0x50E | 87 | #define BCMA_CORE_4706_SOC_RAM 0x50E |
| 88 | #define BCMA_CORE_ARMCA9 0x510 | 88 | #define BCMA_CORE_ARMCA9 0x510 |
| 89 | #define BCMA_CORE_4706_MAC_GBIT 0x52D | 89 | #define BCMA_CORE_4706_MAC_GBIT 0x52D |
