aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorSrinivas Kandagatla <srinivas.kandagatla@linaro.org>2014-06-02 05:09:47 -0400
committerUlf Hansson <ulf.hansson@linaro.org>2014-07-09 05:25:56 -0400
commitdc6500bfe889321f7f4fd01e96062a80643d81c1 (patch)
treedc0519bb08fa443932db6cdbef91dda6f76266dd
parentae7b0061f61e7c96884f4080b4e28544a0cedd76 (diff)
mmc: mmci: add f_max to variant structure
Some of the controller have maximum supported frequency, This patch adds support in variant data structure to specify such restrictions. This gives more flexibility in calculating the f_max before passing it to mmc-core. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
-rw-r--r--drivers/mmc/host/mmci.c13
1 files changed, 11 insertions, 2 deletions
diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c
index 0a8cdac1f59c..b588810fd1a4 100644
--- a/drivers/mmc/host/mmci.c
+++ b/drivers/mmc/host/mmci.c
@@ -67,6 +67,7 @@ static unsigned int fmax = 515633;
67 * @blksz_datactrl4: true if Block size is at b4..b16 position in datactrl 67 * @blksz_datactrl4: true if Block size is at b4..b16 position in datactrl
68 * register 68 * register
69 * @pwrreg_powerup: power up value for MMCIPOWER register 69 * @pwrreg_powerup: power up value for MMCIPOWER register
70 * @f_max: maximum clk frequency supported by the controller.
70 * @signal_direction: input/out direction of bus signals can be indicated 71 * @signal_direction: input/out direction of bus signals can be indicated
71 * @pwrreg_clkgate: MMCIPOWER register must be used to gate the clock 72 * @pwrreg_clkgate: MMCIPOWER register must be used to gate the clock
72 * @busy_detect: true if busy detection on dat0 is supported 73 * @busy_detect: true if busy detection on dat0 is supported
@@ -87,6 +88,7 @@ struct variant_data {
87 bool blksz_datactrl16; 88 bool blksz_datactrl16;
88 bool blksz_datactrl4; 89 bool blksz_datactrl4;
89 u32 pwrreg_powerup; 90 u32 pwrreg_powerup;
91 u32 f_max;
90 bool signal_direction; 92 bool signal_direction;
91 bool pwrreg_clkgate; 93 bool pwrreg_clkgate;
92 bool busy_detect; 94 bool busy_detect;
@@ -98,6 +100,7 @@ static struct variant_data variant_arm = {
98 .fifohalfsize = 8 * 4, 100 .fifohalfsize = 8 * 4,
99 .datalength_bits = 16, 101 .datalength_bits = 16,
100 .pwrreg_powerup = MCI_PWR_UP, 102 .pwrreg_powerup = MCI_PWR_UP,
103 .f_max = 100000000,
101}; 104};
102 105
103static struct variant_data variant_arm_extended_fifo = { 106static struct variant_data variant_arm_extended_fifo = {
@@ -105,6 +108,7 @@ static struct variant_data variant_arm_extended_fifo = {
105 .fifohalfsize = 64 * 4, 108 .fifohalfsize = 64 * 4,
106 .datalength_bits = 16, 109 .datalength_bits = 16,
107 .pwrreg_powerup = MCI_PWR_UP, 110 .pwrreg_powerup = MCI_PWR_UP,
111 .f_max = 100000000,
108}; 112};
109 113
110static struct variant_data variant_arm_extended_fifo_hwfc = { 114static struct variant_data variant_arm_extended_fifo_hwfc = {
@@ -113,6 +117,7 @@ static struct variant_data variant_arm_extended_fifo_hwfc = {
113 .clkreg_enable = MCI_ARM_HWFCEN, 117 .clkreg_enable = MCI_ARM_HWFCEN,
114 .datalength_bits = 16, 118 .datalength_bits = 16,
115 .pwrreg_powerup = MCI_PWR_UP, 119 .pwrreg_powerup = MCI_PWR_UP,
120 .f_max = 100000000,
116}; 121};
117 122
118static struct variant_data variant_u300 = { 123static struct variant_data variant_u300 = {
@@ -123,6 +128,7 @@ static struct variant_data variant_u300 = {
123 .datalength_bits = 16, 128 .datalength_bits = 16,
124 .sdio = true, 129 .sdio = true,
125 .pwrreg_powerup = MCI_PWR_ON, 130 .pwrreg_powerup = MCI_PWR_ON,
131 .f_max = 100000000,
126 .signal_direction = true, 132 .signal_direction = true,
127 .pwrreg_clkgate = true, 133 .pwrreg_clkgate = true,
128 .pwrreg_nopower = true, 134 .pwrreg_nopower = true,
@@ -136,6 +142,7 @@ static struct variant_data variant_nomadik = {
136 .sdio = true, 142 .sdio = true,
137 .st_clkdiv = true, 143 .st_clkdiv = true,
138 .pwrreg_powerup = MCI_PWR_ON, 144 .pwrreg_powerup = MCI_PWR_ON,
145 .f_max = 100000000,
139 .signal_direction = true, 146 .signal_direction = true,
140 .pwrreg_clkgate = true, 147 .pwrreg_clkgate = true,
141 .pwrreg_nopower = true, 148 .pwrreg_nopower = true,
@@ -152,6 +159,7 @@ static struct variant_data variant_ux500 = {
152 .sdio = true, 159 .sdio = true,
153 .st_clkdiv = true, 160 .st_clkdiv = true,
154 .pwrreg_powerup = MCI_PWR_ON, 161 .pwrreg_powerup = MCI_PWR_ON,
162 .f_max = 100000000,
155 .signal_direction = true, 163 .signal_direction = true,
156 .pwrreg_clkgate = true, 164 .pwrreg_clkgate = true,
157 .busy_detect = true, 165 .busy_detect = true,
@@ -171,6 +179,7 @@ static struct variant_data variant_ux500v2 = {
171 .st_clkdiv = true, 179 .st_clkdiv = true,
172 .blksz_datactrl16 = true, 180 .blksz_datactrl16 = true,
173 .pwrreg_powerup = MCI_PWR_ON, 181 .pwrreg_powerup = MCI_PWR_ON,
182 .f_max = 100000000,
174 .signal_direction = true, 183 .signal_direction = true,
175 .pwrreg_clkgate = true, 184 .pwrreg_clkgate = true,
176 .busy_detect = true, 185 .busy_detect = true,
@@ -1473,8 +1482,8 @@ static int mmci_probe(struct amba_device *dev,
1473 * so we try to adjust the clock down to this, 1482 * so we try to adjust the clock down to this,
1474 * (if possible). 1483 * (if possible).
1475 */ 1484 */
1476 if (host->mclk > 100000000) { 1485 if (host->mclk > variant->f_max) {
1477 ret = clk_set_rate(host->clk, 100000000); 1486 ret = clk_set_rate(host->clk, variant->f_max);
1478 if (ret < 0) 1487 if (ret < 0)
1479 goto clk_disable; 1488 goto clk_disable;
1480 host->mclk = clk_get_rate(host->clk); 1489 host->mclk = clk_get_rate(host->clk);