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authorArnd Bergmann <arnd@arndb.de>2012-07-10 10:58:19 -0400
committerArnd Bergmann <arnd@arndb.de>2012-07-10 10:58:19 -0400
commitdb3c47a3af96e8109b1bb114c32f0854259d5970 (patch)
tree852c130e8220bf5f1e28e12277d87a29fa8d37ff
parent3f96a2d90e6923e2dd1e35d2f149a70a4d0f678c (diff)
parentfb584511c4664573097ece7df0de06ad00b713a2 (diff)
Merge tag 'omap-cleanup-part2-for-v3.6' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/cleanup2
From Tony Lindgren <tony@atomide.com>: This branch contains more clean-up like changes and minor fixes for making it easier to support new omap SoCs, such as omap5 and am33xx. This branch has dependencies to earlier clean-up in omap-cleanup-for-v3.6 and omap-devel-dmtimer-for-v3.6 branches, and also depends on the omap-devel-am33xx-for-v3.6 branch, and are based on a merge of these branches. * tag 'omap-cleanup-part2-for-v3.6' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP: sdrc: Fix the build break for OMAP4 only builds ARM: OMAP2+: dmtimer: cleanup fclk usage ARM: OMAP2+: Fix mismerge for omap_hwmod_get_main_clk() API ARM: OMAP2+: Remove unnecessary ifdef around __omap2_set_globals ARM: OMAP2+: am33xx: Change cpu_is_am33xx to soc_is_am33xx ARM: OMAP2+: am33xx: Make am33xx as a separate class ARM: OMAP2+: Move omap3 dpll ops to dpll3xxx.c ARM: OMAP2+: All OMAP2PLUS uses omap-device.o target so add one entry ARM: OMAP: dmtimer: use devm_ API and do some cleanup in probe() ARM: OMAP2+: hwmod code: add support to set dmadisable in hwmod framework ARM: OMAP2+: PRM/CM: Move the stubbed prm and cm functions to prcm.c file and make them __weak ARM: OMAP2+: hwmod: add omap_hwmod_get_main_clk() API ARM: OMAP3+: dpll: optimize noncore dpll locking logic ARM: OMAP3: control: add definition for CONTROL_CAMERA_PHY_CTRL ARM: OMAP2+: powerdomain code: Fix Wake-up power domain power status ARM: OMAP4: clockdomain/CM code: Update supported transition modes ARM: OMAP3/4: omap_hwmod: Add rstst_offs field to struct omap_hwmod_omap4_prcm ARM: OMAP2+: hwmod: Add new sysc_type3 into omap_hwmod required for am33xx Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-rw-r--r--arch/arm/mach-omap2/Kconfig12
-rw-r--r--arch/arm/mach-omap2/Makefile8
-rw-r--r--arch/arm/mach-omap2/clock.c18
-rw-r--r--arch/arm/mach-omap2/clock3xxx_data.c2
-rw-r--r--arch/arm/mach-omap2/clock44xx_data.c22
-rw-r--r--arch/arm/mach-omap2/clockdomain44xx.c10
-rw-r--r--arch/arm/mach-omap2/cminst44xx.c14
-rw-r--r--arch/arm/mach-omap2/cminst44xx.h25
-rw-r--r--arch/arm/mach-omap2/common.c10
-rw-r--r--arch/arm/mach-omap2/common.h5
-rw-r--r--arch/arm/mach-omap2/control.h1
-rw-r--r--arch/arm/mach-omap2/dpll3xxx.c26
-rw-r--r--arch/arm/mach-omap2/id.c4
-rw-r--r--arch/arm/mach-omap2/omap_hwmod.c76
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_common_data.c10
-rw-r--r--arch/arm/mach-omap2/powerdomain.c6
-rw-r--r--arch/arm/mach-omap2/prcm.c23
-rw-r--r--arch/arm/mach-omap2/prm2xxx_3xxx.h65
-rw-r--r--arch/arm/mach-omap2/prm_common.c62
-rw-r--r--arch/arm/mach-omap2/timer.c3
-rw-r--r--arch/arm/plat-omap/Makefile4
-rw-r--r--arch/arm/plat-omap/dmtimer.c53
-rw-r--r--arch/arm/plat-omap/include/plat/cpu.h17
-rw-r--r--arch/arm/plat-omap/include/plat/omap_hwmod.h19
-rw-r--r--arch/arm/plat-omap/include/plat/sdrc.h2
-rw-r--r--arch/arm/plat-omap/sram.c6
26 files changed, 296 insertions, 207 deletions
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 042f157a8f94..6c934778357b 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -21,12 +21,16 @@ config ARCH_OMAP2PLUS_TYPICAL
21 help 21 help
22 Compile a kernel suitable for booting most boards 22 Compile a kernel suitable for booting most boards
23 23
24config SOC_HAS_OMAP2_SDRC
25 bool "OMAP2 SDRAM Controller support"
26
24config ARCH_OMAP2 27config ARCH_OMAP2
25 bool "TI OMAP2" 28 bool "TI OMAP2"
26 depends on ARCH_OMAP2PLUS 29 depends on ARCH_OMAP2PLUS
27 default y 30 default y
28 select CPU_V6 31 select CPU_V6
29 select MULTI_IRQ_HANDLER 32 select MULTI_IRQ_HANDLER
33 select SOC_HAS_OMAP2_SDRC
30 34
31config ARCH_OMAP3 35config ARCH_OMAP3
32 bool "TI OMAP3" 36 bool "TI OMAP3"
@@ -38,6 +42,7 @@ config ARCH_OMAP3
38 select PM_OPP if PM 42 select PM_OPP if PM
39 select ARM_CPU_SUSPEND if PM 43 select ARM_CPU_SUSPEND if PM
40 select MULTI_IRQ_HANDLER 44 select MULTI_IRQ_HANDLER
45 select SOC_HAS_OMAP2_SDRC
41 46
42config ARCH_OMAP4 47config ARCH_OMAP4
43 bool "TI OMAP4" 48 bool "TI OMAP4"
@@ -64,16 +69,19 @@ config SOC_OMAP2420
64 depends on ARCH_OMAP2 69 depends on ARCH_OMAP2
65 default y 70 default y
66 select OMAP_DM_TIMER 71 select OMAP_DM_TIMER
72 select SOC_HAS_OMAP2_SDRC
67 73
68config SOC_OMAP2430 74config SOC_OMAP2430
69 bool "OMAP2430 support" 75 bool "OMAP2430 support"
70 depends on ARCH_OMAP2 76 depends on ARCH_OMAP2
71 default y 77 default y
78 select SOC_HAS_OMAP2_SDRC
72 79
73config SOC_OMAP3430 80config SOC_OMAP3430
74 bool "OMAP3430 support" 81 bool "OMAP3430 support"
75 depends on ARCH_OMAP3 82 depends on ARCH_OMAP3
76 default y 83 default y
84 select SOC_HAS_OMAP2_SDRC
77 85
78config SOC_TI81XX 86config SOC_TI81XX
79 bool "TI81XX support" 87 bool "TI81XX support"
@@ -82,8 +90,10 @@ config SOC_TI81XX
82 90
83config SOC_AM33XX 91config SOC_AM33XX
84 bool "AM33XX support" 92 bool "AM33XX support"
85 depends on ARCH_OMAP3
86 default y 93 default y
94 select CPU_V7
95 select ARM_CPU_SUSPEND if PM
96 select MULTI_IRQ_HANDLER
87 97
88config OMAP_PACKAGE_ZAF 98config OMAP_PACKAGE_ZAF
89 bool 99 bool
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 54ad3a4b612c..240f1969f2ad 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -6,7 +6,7 @@
6obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer.o pm.o \ 6obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer.o pm.o \
7 common.o gpio.o dma.o wd_timer.o display.o i2c.o hdq1w.o 7 common.o gpio.o dma.o wd_timer.o display.o i2c.o hdq1w.o
8 8
9omap-2-3-common = irq.o sdrc.o 9omap-2-3-common = irq.o
10hwmod-common = omap_hwmod.o \ 10hwmod-common = omap_hwmod.o \
11 omap_hwmod_common_data.o 11 omap_hwmod_common_data.o
12clock-common = clock.o clock_common_data.o \ 12clock-common = clock.o clock_common_data.o \
@@ -16,12 +16,14 @@ secure-common = omap-smc.o omap-secure.o
16obj-$(CONFIG_ARCH_OMAP2) += $(omap-2-3-common) $(hwmod-common) 16obj-$(CONFIG_ARCH_OMAP2) += $(omap-2-3-common) $(hwmod-common)
17obj-$(CONFIG_ARCH_OMAP3) += $(omap-2-3-common) $(hwmod-common) $(secure-common) 17obj-$(CONFIG_ARCH_OMAP3) += $(omap-2-3-common) $(hwmod-common) $(secure-common)
18obj-$(CONFIG_ARCH_OMAP4) += prm44xx.o $(hwmod-common) $(secure-common) 18obj-$(CONFIG_ARCH_OMAP4) += prm44xx.o $(hwmod-common) $(secure-common)
19obj-$(CONFIG_SOC_AM33XX) += irq.o $(hwmod-common)
19 20
20ifneq ($(CONFIG_SND_OMAP_SOC_MCBSP),) 21ifneq ($(CONFIG_SND_OMAP_SOC_MCBSP),)
21obj-y += mcbsp.o 22obj-y += mcbsp.o
22endif 23endif
23 24
24obj-$(CONFIG_TWL4030_CORE) += omap_twl.o 25obj-$(CONFIG_TWL4030_CORE) += omap_twl.o
26obj-$(CONFIG_SOC_HAS_OMAP2_SDRC) += sdrc.o
25 27
26# SMP support ONLY available for OMAP4 28# SMP support ONLY available for OMAP4
27 29
@@ -100,6 +102,7 @@ obj-$(CONFIG_ARCH_OMAP3) += $(voltagedomain-common)
100obj-$(CONFIG_ARCH_OMAP3) += voltagedomains3xxx_data.o 102obj-$(CONFIG_ARCH_OMAP3) += voltagedomains3xxx_data.o
101obj-$(CONFIG_ARCH_OMAP4) += $(voltagedomain-common) 103obj-$(CONFIG_ARCH_OMAP4) += $(voltagedomain-common)
102obj-$(CONFIG_ARCH_OMAP4) += voltagedomains44xx_data.o 104obj-$(CONFIG_ARCH_OMAP4) += voltagedomains44xx_data.o
105obj-$(CONFIG_SOC_AM33XX) += $(voltagedomain-common)
103obj-$(CONFIG_SOC_AM33XX) += voltagedomains33xx_data.o 106obj-$(CONFIG_SOC_AM33XX) += voltagedomains33xx_data.o
104 107
105# OMAP powerdomain framework 108# OMAP powerdomain framework
@@ -115,6 +118,7 @@ obj-$(CONFIG_ARCH_OMAP3) += powerdomains2xxx_3xxx_data.o
115obj-$(CONFIG_ARCH_OMAP4) += $(powerdomain-common) 118obj-$(CONFIG_ARCH_OMAP4) += $(powerdomain-common)
116obj-$(CONFIG_ARCH_OMAP4) += powerdomain44xx.o 119obj-$(CONFIG_ARCH_OMAP4) += powerdomain44xx.o
117obj-$(CONFIG_ARCH_OMAP4) += powerdomains44xx_data.o 120obj-$(CONFIG_ARCH_OMAP4) += powerdomains44xx_data.o
121obj-$(CONFIG_SOC_AM33XX) += $(powerdomain-common)
118obj-$(CONFIG_SOC_AM33XX) += powerdomain33xx.o 122obj-$(CONFIG_SOC_AM33XX) += powerdomain33xx.o
119obj-$(CONFIG_SOC_AM33XX) += powerdomains33xx_data.o 123obj-$(CONFIG_SOC_AM33XX) += powerdomains33xx_data.o
120 124
@@ -132,6 +136,7 @@ obj-$(CONFIG_ARCH_OMAP3) += clockdomains3xxx_data.o
132obj-$(CONFIG_ARCH_OMAP4) += $(clockdomain-common) 136obj-$(CONFIG_ARCH_OMAP4) += $(clockdomain-common)
133obj-$(CONFIG_ARCH_OMAP4) += clockdomain44xx.o 137obj-$(CONFIG_ARCH_OMAP4) += clockdomain44xx.o
134obj-$(CONFIG_ARCH_OMAP4) += clockdomains44xx_data.o 138obj-$(CONFIG_ARCH_OMAP4) += clockdomains44xx_data.o
139obj-$(CONFIG_SOC_AM33XX) += $(clockdomain-common)
135obj-$(CONFIG_SOC_AM33XX) += clockdomain33xx.o 140obj-$(CONFIG_SOC_AM33XX) += clockdomain33xx.o
136obj-$(CONFIG_SOC_AM33XX) += clockdomains33xx_data.o 141obj-$(CONFIG_SOC_AM33XX) += clockdomains33xx_data.o
137 142
@@ -151,6 +156,7 @@ obj-$(CONFIG_ARCH_OMAP3) += dpll3xxx.o clock3xxx_data.o
151obj-$(CONFIG_ARCH_OMAP3) += clkt_iclk.o 156obj-$(CONFIG_ARCH_OMAP3) += clkt_iclk.o
152obj-$(CONFIG_ARCH_OMAP4) += $(clock-common) clock44xx_data.o 157obj-$(CONFIG_ARCH_OMAP4) += $(clock-common) clock44xx_data.o
153obj-$(CONFIG_ARCH_OMAP4) += dpll3xxx.o dpll44xx.o 158obj-$(CONFIG_ARCH_OMAP4) += dpll3xxx.o dpll44xx.o
159obj-$(CONFIG_SOC_AM33XX) += $(clock-common) dpll3xxx.o
154 160
155# OMAP2 clock rate set data (old "OPP" data) 161# OMAP2 clock rate set data (old "OPP" data)
156obj-$(CONFIG_SOC_OMAP2420) += opp2420_data.o 162obj-$(CONFIG_SOC_OMAP2420) += opp2420_data.o
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index 5c4e66542169..ea3f565ba1a4 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -398,24 +398,6 @@ int omap2_clk_set_parent(struct clk *clk, struct clk *new_parent)
398 return omap2_clksel_set_parent(clk, new_parent); 398 return omap2_clksel_set_parent(clk, new_parent);
399} 399}
400 400
401/* OMAP3/4 non-CORE DPLL clkops */
402
403#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
404
405const struct clkops clkops_omap3_noncore_dpll_ops = {
406 .enable = omap3_noncore_dpll_enable,
407 .disable = omap3_noncore_dpll_disable,
408 .allow_idle = omap3_dpll_allow_idle,
409 .deny_idle = omap3_dpll_deny_idle,
410};
411
412const struct clkops clkops_omap3_core_dpll_ops = {
413 .allow_idle = omap3_dpll_allow_idle,
414 .deny_idle = omap3_dpll_deny_idle,
415};
416
417#endif
418
419/* 401/*
420 * OMAP2+ clock reset and init functions 402 * OMAP2+ clock reset and init functions
421 */ 403 */
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c
index 71a1d3383807..7300982a8e0e 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -3491,7 +3491,7 @@ int __init omap3xxx_clk_init(void)
3491 } else if (cpu_is_ti816x()) { 3491 } else if (cpu_is_ti816x()) {
3492 cpu_mask = RATE_IN_TI816X; 3492 cpu_mask = RATE_IN_TI816X;
3493 cpu_clkflg = CK_TI816X; 3493 cpu_clkflg = CK_TI816X;
3494 } else if (cpu_is_am33xx()) { 3494 } else if (soc_is_am33xx()) {
3495 cpu_mask = RATE_IN_AM33XX; 3495 cpu_mask = RATE_IN_AM33XX;
3496 } else if (cpu_is_ti814x()) { 3496 } else if (cpu_is_ti814x()) {
3497 cpu_mask = RATE_IN_TI814X; 3497 cpu_mask = RATE_IN_TI814X;
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
index de53b7014b80..1b0b049fe445 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -3299,17 +3299,17 @@ static struct omap_clk omap44xx_clks[] = {
3299 CLK(NULL, "smartreflex_core_fck", &smartreflex_core_fck, CK_443X), 3299 CLK(NULL, "smartreflex_core_fck", &smartreflex_core_fck, CK_443X),
3300 CLK(NULL, "smartreflex_iva_fck", &smartreflex_iva_fck, CK_443X), 3300 CLK(NULL, "smartreflex_iva_fck", &smartreflex_iva_fck, CK_443X),
3301 CLK(NULL, "smartreflex_mpu_fck", &smartreflex_mpu_fck, CK_443X), 3301 CLK(NULL, "smartreflex_mpu_fck", &smartreflex_mpu_fck, CK_443X),
3302 CLK(NULL, "gpt1_fck", &timer1_fck, CK_443X), 3302 CLK(NULL, "timer1_fck", &timer1_fck, CK_443X),
3303 CLK(NULL, "gpt10_fck", &timer10_fck, CK_443X), 3303 CLK(NULL, "timer10_fck", &timer10_fck, CK_443X),
3304 CLK(NULL, "gpt11_fck", &timer11_fck, CK_443X), 3304 CLK(NULL, "timer11_fck", &timer11_fck, CK_443X),
3305 CLK(NULL, "gpt2_fck", &timer2_fck, CK_443X), 3305 CLK(NULL, "timer2_fck", &timer2_fck, CK_443X),
3306 CLK(NULL, "gpt3_fck", &timer3_fck, CK_443X), 3306 CLK(NULL, "timer3_fck", &timer3_fck, CK_443X),
3307 CLK(NULL, "gpt4_fck", &timer4_fck, CK_443X), 3307 CLK(NULL, "timer4_fck", &timer4_fck, CK_443X),
3308 CLK(NULL, "gpt5_fck", &timer5_fck, CK_443X), 3308 CLK(NULL, "timer5_fck", &timer5_fck, CK_443X),
3309 CLK(NULL, "gpt6_fck", &timer6_fck, CK_443X), 3309 CLK(NULL, "timer6_fck", &timer6_fck, CK_443X),
3310 CLK(NULL, "gpt7_fck", &timer7_fck, CK_443X), 3310 CLK(NULL, "timer7_fck", &timer7_fck, CK_443X),
3311 CLK(NULL, "gpt8_fck", &timer8_fck, CK_443X), 3311 CLK(NULL, "timer8_fck", &timer8_fck, CK_443X),
3312 CLK(NULL, "gpt9_fck", &timer9_fck, CK_443X), 3312 CLK(NULL, "timer9_fck", &timer9_fck, CK_443X),
3313 CLK(NULL, "uart1_fck", &uart1_fck, CK_443X), 3313 CLK(NULL, "uart1_fck", &uart1_fck, CK_443X),
3314 CLK(NULL, "uart2_fck", &uart2_fck, CK_443X), 3314 CLK(NULL, "uart2_fck", &uart2_fck, CK_443X),
3315 CLK(NULL, "uart3_fck", &uart3_fck, CK_443X), 3315 CLK(NULL, "uart3_fck", &uart3_fck, CK_443X),
diff --git a/arch/arm/mach-omap2/clockdomain44xx.c b/arch/arm/mach-omap2/clockdomain44xx.c
index 4f04dd11d655..762f2cc542ce 100644
--- a/arch/arm/mach-omap2/clockdomain44xx.c
+++ b/arch/arm/mach-omap2/clockdomain44xx.c
@@ -70,7 +70,7 @@ static int omap4_clkdm_clear_all_wkup_sleep_deps(struct clockdomain *clkdm)
70 70
71static int omap4_clkdm_sleep(struct clockdomain *clkdm) 71static int omap4_clkdm_sleep(struct clockdomain *clkdm)
72{ 72{
73 omap4_cminst_clkdm_force_sleep(clkdm->prcm_partition, 73 omap4_cminst_clkdm_enable_hwsup(clkdm->prcm_partition,
74 clkdm->cm_inst, clkdm->clkdm_offs); 74 clkdm->cm_inst, clkdm->clkdm_offs);
75 return 0; 75 return 0;
76} 76}
@@ -90,8 +90,12 @@ static void omap4_clkdm_allow_idle(struct clockdomain *clkdm)
90 90
91static void omap4_clkdm_deny_idle(struct clockdomain *clkdm) 91static void omap4_clkdm_deny_idle(struct clockdomain *clkdm)
92{ 92{
93 omap4_cminst_clkdm_disable_hwsup(clkdm->prcm_partition, 93 if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP)
94 clkdm->cm_inst, clkdm->clkdm_offs); 94 omap4_clkdm_wakeup(clkdm);
95 else
96 omap4_cminst_clkdm_disable_hwsup(clkdm->prcm_partition,
97 clkdm->cm_inst,
98 clkdm->clkdm_offs);
95} 99}
96 100
97static int omap4_clkdm_clk_enable(struct clockdomain *clkdm) 101static int omap4_clkdm_clk_enable(struct clockdomain *clkdm)
diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c
index 1a39945d9ff8..1894015ff04b 100644
--- a/arch/arm/mach-omap2/cminst44xx.c
+++ b/arch/arm/mach-omap2/cminst44xx.c
@@ -235,20 +235,6 @@ void omap4_cminst_clkdm_disable_hwsup(u8 part, s16 inst, u16 cdoffs)
235} 235}
236 236
237/** 237/**
238 * omap4_cminst_clkdm_force_sleep - try to put a clockdomain into idle
239 * @part: PRCM partition ID that the clockdomain registers exist in
240 * @inst: CM instance register offset (*_INST macro)
241 * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
242 *
243 * Put a clockdomain referred to by (@part, @inst, @cdoffs) into idle
244 * No return value.
245 */
246void omap4_cminst_clkdm_force_sleep(u8 part, s16 inst, u16 cdoffs)
247{
248 _clktrctrl_write(OMAP34XX_CLKSTCTRL_FORCE_SLEEP, part, inst, cdoffs);
249}
250
251/**
252 * omap4_cminst_clkdm_force_sleep - try to take a clockdomain out of idle 238 * omap4_cminst_clkdm_force_sleep - try to take a clockdomain out of idle
253 * @part: PRCM partition ID that the clockdomain registers exist in 239 * @part: PRCM partition ID that the clockdomain registers exist in
254 * @inst: CM instance register offset (*_INST macro) 240 * @inst: CM instance register offset (*_INST macro)
diff --git a/arch/arm/mach-omap2/cminst44xx.h b/arch/arm/mach-omap2/cminst44xx.h
index a018a7327879..d69fdefef985 100644
--- a/arch/arm/mach-omap2/cminst44xx.h
+++ b/arch/arm/mach-omap2/cminst44xx.h
@@ -16,38 +16,13 @@ extern void omap4_cminst_clkdm_enable_hwsup(u8 part, s16 inst, u16 cdoffs);
16extern void omap4_cminst_clkdm_disable_hwsup(u8 part, s16 inst, u16 cdoffs); 16extern void omap4_cminst_clkdm_disable_hwsup(u8 part, s16 inst, u16 cdoffs);
17extern void omap4_cminst_clkdm_force_sleep(u8 part, s16 inst, u16 cdoffs); 17extern void omap4_cminst_clkdm_force_sleep(u8 part, s16 inst, u16 cdoffs);
18extern void omap4_cminst_clkdm_force_wakeup(u8 part, s16 inst, u16 cdoffs); 18extern void omap4_cminst_clkdm_force_wakeup(u8 part, s16 inst, u16 cdoffs);
19
20extern int omap4_cminst_wait_module_ready(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs); 19extern int omap4_cminst_wait_module_ready(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs);
21
22# ifdef CONFIG_ARCH_OMAP4
23extern int omap4_cminst_wait_module_idle(u8 part, u16 inst, s16 cdoffs, 20extern int omap4_cminst_wait_module_idle(u8 part, u16 inst, s16 cdoffs,
24 u16 clkctrl_offs); 21 u16 clkctrl_offs);
25
26extern void omap4_cminst_module_enable(u8 mode, u8 part, u16 inst, s16 cdoffs, 22extern void omap4_cminst_module_enable(u8 mode, u8 part, u16 inst, s16 cdoffs,
27 u16 clkctrl_offs); 23 u16 clkctrl_offs);
28extern void omap4_cminst_module_disable(u8 part, u16 inst, s16 cdoffs, 24extern void omap4_cminst_module_disable(u8 part, u16 inst, s16 cdoffs,
29 u16 clkctrl_offs); 25 u16 clkctrl_offs);
30
31# else
32
33static inline int omap4_cminst_wait_module_idle(u8 part, u16 inst, s16 cdoffs,
34 u16 clkctrl_offs)
35{
36 return 0;
37}
38
39static inline void omap4_cminst_module_enable(u8 mode, u8 part, u16 inst,
40 s16 cdoffs, u16 clkctrl_offs)
41{
42}
43
44static inline void omap4_cminst_module_disable(u8 part, u16 inst, s16 cdoffs,
45 u16 clkctrl_offs)
46{
47}
48
49# endif
50
51/* 26/*
52 * In an ideal world, we would not export these low-level functions, 27 * In an ideal world, we would not export these low-level functions,
53 * but this will probably take some time to fix properly 28 * but this will probably take some time to fix properly
diff --git a/arch/arm/mach-omap2/common.c b/arch/arm/mach-omap2/common.c
index 8a6953a34fe2..73d2a0b9ca04 100644
--- a/arch/arm/mach-omap2/common.c
+++ b/arch/arm/mach-omap2/common.c
@@ -29,8 +29,6 @@
29 29
30/* Global address base setup code */ 30/* Global address base setup code */
31 31
32#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
33
34static void __init __omap2_set_globals(struct omap_globals *omap2_globals) 32static void __init __omap2_set_globals(struct omap_globals *omap2_globals)
35{ 33{
36 omap2_set_globals_tap(omap2_globals); 34 omap2_set_globals_tap(omap2_globals);
@@ -39,8 +37,6 @@ static void __init __omap2_set_globals(struct omap_globals *omap2_globals)
39 omap2_set_globals_prcm(omap2_globals); 37 omap2_set_globals_prcm(omap2_globals);
40} 38}
41 39
42#endif
43
44#if defined(CONFIG_SOC_OMAP2420) 40#if defined(CONFIG_SOC_OMAP2420)
45 41
46static struct omap_globals omap242x_globals = { 42static struct omap_globals omap242x_globals = {
@@ -134,7 +130,9 @@ void __init ti81xx_map_io(void)
134{ 130{
135 omapti81xx_map_common_io(); 131 omapti81xx_map_common_io();
136} 132}
133#endif
137 134
135#if defined(CONFIG_SOC_AM33XX)
138#define AM33XX_TAP_BASE (AM33XX_CTRL_BASE + \ 136#define AM33XX_TAP_BASE (AM33XX_CTRL_BASE + \
139 TI81XX_CONTROL_DEVICE_ID - 0x204) 137 TI81XX_CONTROL_DEVICE_ID - 0x204)
140 138
@@ -171,9 +169,7 @@ static struct omap_globals omap4_globals = {
171 169
172void __init omap2_set_globals_443x(void) 170void __init omap2_set_globals_443x(void)
173{ 171{
174 omap2_set_globals_tap(&omap4_globals); 172 __omap2_set_globals(&omap4_globals);
175 omap2_set_globals_control(&omap4_globals);
176 omap2_set_globals_prcm(&omap4_globals);
177} 173}
178 174
179void __init omap4_map_io(void) 175void __init omap4_map_io(void)
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index 5d99c1b2cb48..404f172d95a8 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -174,7 +174,12 @@ void omap2_set_globals_am33xx(void);
174 174
175/* These get called from omap2_set_globals_xxxx(), do not call these */ 175/* These get called from omap2_set_globals_xxxx(), do not call these */
176void omap2_set_globals_tap(struct omap_globals *); 176void omap2_set_globals_tap(struct omap_globals *);
177#if defined(CONFIG_SOC_HAS_OMAP2_SDRC)
177void omap2_set_globals_sdrc(struct omap_globals *); 178void omap2_set_globals_sdrc(struct omap_globals *);
179#else
180static inline void omap2_set_globals_sdrc(struct omap_globals *omap2_globals)
181{ }
182#endif
178void omap2_set_globals_control(struct omap_globals *); 183void omap2_set_globals_control(struct omap_globals *);
179void omap2_set_globals_prcm(struct omap_globals *); 184void omap2_set_globals_prcm(struct omap_globals *);
180 185
diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/control.h
index 5baf305386e9..295b39047a71 100644
--- a/arch/arm/mach-omap2/control.h
+++ b/arch/arm/mach-omap2/control.h
@@ -188,6 +188,7 @@
188#define OMAP3630_CONTROL_FUSE_OPP120_VDD1 (OMAP2_CONTROL_GENERAL + 0x0120) 188#define OMAP3630_CONTROL_FUSE_OPP120_VDD1 (OMAP2_CONTROL_GENERAL + 0x0120)
189#define OMAP3630_CONTROL_FUSE_OPP50_VDD2 (OMAP2_CONTROL_GENERAL + 0x0128) 189#define OMAP3630_CONTROL_FUSE_OPP50_VDD2 (OMAP2_CONTROL_GENERAL + 0x0128)
190#define OMAP3630_CONTROL_FUSE_OPP100_VDD2 (OMAP2_CONTROL_GENERAL + 0x012C) 190#define OMAP3630_CONTROL_FUSE_OPP100_VDD2 (OMAP2_CONTROL_GENERAL + 0x012C)
191#define OMAP3630_CONTROL_CAMERA_PHY_CTRL (OMAP2_CONTROL_GENERAL + 0x02f0)
191 192
192/* OMAP44xx control efuse offsets */ 193/* OMAP44xx control efuse offsets */
193#define OMAP44XX_CONTROL_FUSE_IVA_OPP50 0x22C 194#define OMAP44XX_CONTROL_FUSE_IVA_OPP50 0x22C
diff --git a/arch/arm/mach-omap2/dpll3xxx.c b/arch/arm/mach-omap2/dpll3xxx.c
index f0f10beeffe8..b9c8d2f6a81f 100644
--- a/arch/arm/mach-omap2/dpll3xxx.c
+++ b/arch/arm/mach-omap2/dpll3xxx.c
@@ -135,11 +135,20 @@ static u16 _omap3_dpll_compute_freqsel(struct clk *clk, u8 n)
135 */ 135 */
136static int _omap3_noncore_dpll_lock(struct clk *clk) 136static int _omap3_noncore_dpll_lock(struct clk *clk)
137{ 137{
138 const struct dpll_data *dd;
138 u8 ai; 139 u8 ai;
139 int r; 140 u8 state = 1;
141 int r = 0;
140 142
141 pr_debug("clock: locking DPLL %s\n", clk->name); 143 pr_debug("clock: locking DPLL %s\n", clk->name);
142 144
145 dd = clk->dpll_data;
146 state <<= __ffs(dd->idlest_mask);
147
148 /* Check if already locked */
149 if ((__raw_readl(dd->idlest_reg) & dd->idlest_mask) == state)
150 goto done;
151
143 ai = omap3_dpll_autoidle_read(clk); 152 ai = omap3_dpll_autoidle_read(clk);
144 153
145 if (ai) 154 if (ai)
@@ -152,6 +161,7 @@ static int _omap3_noncore_dpll_lock(struct clk *clk)
152 if (ai) 161 if (ai)
153 omap3_dpll_allow_idle(clk); 162 omap3_dpll_allow_idle(clk);
154 163
164done:
155 return r; 165 return r;
156} 166}
157 167
@@ -628,3 +638,17 @@ unsigned long omap3_clkoutx2_recalc(struct clk *clk)
628 rate = clk->parent->rate * 2; 638 rate = clk->parent->rate * 2;
629 return rate; 639 return rate;
630} 640}
641
642/* OMAP3/4 non-CORE DPLL clkops */
643
644const struct clkops clkops_omap3_noncore_dpll_ops = {
645 .enable = omap3_noncore_dpll_enable,
646 .disable = omap3_noncore_dpll_disable,
647 .allow_idle = omap3_dpll_allow_idle,
648 .deny_idle = omap3_dpll_deny_idle,
649};
650
651const struct clkops clkops_omap3_core_dpll_ops = {
652 .allow_idle = omap3_dpll_allow_idle,
653 .deny_idle = omap3_dpll_deny_idle,
654};
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 00486a8564fd..37eb95aaf2f6 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -44,7 +44,7 @@ int omap_type(void)
44 44
45 if (cpu_is_omap24xx()) { 45 if (cpu_is_omap24xx()) {
46 val = omap_ctrl_readl(OMAP24XX_CONTROL_STATUS); 46 val = omap_ctrl_readl(OMAP24XX_CONTROL_STATUS);
47 } else if (cpu_is_am33xx()) { 47 } else if (soc_is_am33xx()) {
48 val = omap_ctrl_readl(AM33XX_CONTROL_STATUS); 48 val = omap_ctrl_readl(AM33XX_CONTROL_STATUS);
49 } else if (cpu_is_omap34xx()) { 49 } else if (cpu_is_omap34xx()) {
50 val = omap_ctrl_readl(OMAP343X_CONTROL_STATUS); 50 val = omap_ctrl_readl(OMAP343X_CONTROL_STATUS);
@@ -189,7 +189,7 @@ static void __init omap3_cpuinfo(void)
189 cpu_name = (omap3_has_sgx()) ? "AM3517" : "AM3505"; 189 cpu_name = (omap3_has_sgx()) ? "AM3517" : "AM3505";
190 } else if (cpu_is_ti816x()) { 190 } else if (cpu_is_ti816x()) {
191 cpu_name = "TI816X"; 191 cpu_name = "TI816X";
192 } else if (cpu_is_am335x()) { 192 } else if (soc_is_am335x()) {
193 cpu_name = "AM335X"; 193 cpu_name = "AM335X";
194 } else if (cpu_is_ti814x()) { 194 } else if (cpu_is_ti814x()) {
195 cpu_name = "TI814X"; 195 cpu_name = "TI814X";
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index f97f0624bca0..ff76ef1d7232 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -416,6 +416,49 @@ static int _set_softreset(struct omap_hwmod *oh, u32 *v)
416} 416}
417 417
418/** 418/**
419 * _set_dmadisable: set OCP_SYSCONFIG.DMADISABLE bit in @v
420 * @oh: struct omap_hwmod *
421 *
422 * The DMADISABLE bit is a semi-automatic bit present in sysconfig register
423 * of some modules. When the DMA must perform read/write accesses, the
424 * DMADISABLE bit is cleared by the hardware. But when the DMA must stop
425 * for power management, software must set the DMADISABLE bit back to 1.
426 *
427 * Set the DMADISABLE bit in @v for hwmod @oh. Returns -EINVAL upon
428 * error or 0 upon success.
429 */
430static int _set_dmadisable(struct omap_hwmod *oh)
431{
432 u32 v;
433 u32 dmadisable_mask;
434
435 if (!oh->class->sysc ||
436 !(oh->class->sysc->sysc_flags & SYSC_HAS_DMADISABLE))
437 return -EINVAL;
438
439 if (!oh->class->sysc->sysc_fields) {
440 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
441 return -EINVAL;
442 }
443
444 /* clocks must be on for this operation */
445 if (oh->_state != _HWMOD_STATE_ENABLED) {
446 pr_warn("omap_hwmod: %s: dma can be disabled only from enabled state\n", oh->name);
447 return -EINVAL;
448 }
449
450 pr_debug("omap_hwmod: %s: setting DMADISABLE\n", oh->name);
451
452 v = oh->_sysc_cache;
453 dmadisable_mask =
454 (0x1 << oh->class->sysc->sysc_fields->dmadisable_shift);
455 v |= dmadisable_mask;
456 _write_sysconfig(v, oh);
457
458 return 0;
459}
460
461/**
419 * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v 462 * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
420 * @oh: struct omap_hwmod * 463 * @oh: struct omap_hwmod *
421 * @autoidle: desired AUTOIDLE bitfield value (0 or 1) 464 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
@@ -1652,11 +1695,17 @@ dis_opt_clks:
1652 * therefore have no OCP header registers to access. Others (like the 1695 * therefore have no OCP header registers to access. Others (like the
1653 * IVA) have idiosyncratic reset sequences. So for these relatively 1696 * IVA) have idiosyncratic reset sequences. So for these relatively
1654 * rare cases, custom reset code can be supplied in the struct 1697 * rare cases, custom reset code can be supplied in the struct
1655 * omap_hwmod_class .reset function pointer. Passes along the return 1698 * omap_hwmod_class .reset function pointer.
1656 * value from either _ocp_softreset() or the custom reset function - 1699 *
1657 * these must return -EINVAL if the hwmod cannot be reset this way or 1700 * _set_dmadisable() is called to set the DMADISABLE bit so that it
1658 * if the hwmod is in the wrong state, -ETIMEDOUT if the module did 1701 * does not prevent idling of the system. This is necessary for cases
1659 * not reset in time, or 0 upon success. 1702 * where ROMCODE/BOOTLOADER uses dma and transfers control to the
1703 * kernel without disabling dma.
1704 *
1705 * Passes along the return value from either _ocp_softreset() or the
1706 * custom reset function - these must return -EINVAL if the hwmod
1707 * cannot be reset this way or if the hwmod is in the wrong state,
1708 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
1660 */ 1709 */
1661static int _reset(struct omap_hwmod *oh) 1710static int _reset(struct omap_hwmod *oh)
1662{ 1711{
@@ -1678,6 +1727,8 @@ static int _reset(struct omap_hwmod *oh)
1678 } 1727 }
1679 } 1728 }
1680 1729
1730 _set_dmadisable(oh);
1731
1681 /* 1732 /*
1682 * OCP_SYSCONFIG bits need to be reprogrammed after a 1733 * OCP_SYSCONFIG bits need to be reprogrammed after a
1683 * softreset. The _enable() function should be split to avoid 1734 * softreset. The _enable() function should be split to avoid
@@ -3582,3 +3633,18 @@ void __init omap_hwmod_init(void)
3582 3633
3583 inited = true; 3634 inited = true;
3584} 3635}
3636
3637/**
3638 * omap_hwmod_get_main_clk - get pointer to main clock name
3639 * @oh: struct omap_hwmod *
3640 *
3641 * Returns the main clock name assocated with @oh upon success,
3642 * or NULL if @oh is NULL.
3643 */
3644const char *omap_hwmod_get_main_clk(struct omap_hwmod *oh)
3645{
3646 if (!oh)
3647 return NULL;
3648
3649 return oh->main_clk;
3650}
diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.c b/arch/arm/mach-omap2/omap_hwmod_common_data.c
index 51e5418899fb..9f1ccdc8cc8c 100644
--- a/arch/arm/mach-omap2/omap_hwmod_common_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_common_data.c
@@ -47,6 +47,16 @@ struct omap_hwmod_sysc_fields omap_hwmod_sysc_type2 = {
47 .midle_shift = SYSC_TYPE2_MIDLEMODE_SHIFT, 47 .midle_shift = SYSC_TYPE2_MIDLEMODE_SHIFT,
48 .sidle_shift = SYSC_TYPE2_SIDLEMODE_SHIFT, 48 .sidle_shift = SYSC_TYPE2_SIDLEMODE_SHIFT,
49 .srst_shift = SYSC_TYPE2_SOFTRESET_SHIFT, 49 .srst_shift = SYSC_TYPE2_SOFTRESET_SHIFT,
50 .dmadisable_shift = SYSC_TYPE2_DMADISABLE_SHIFT,
51};
52
53/**
54 * struct omap_hwmod_sysc_type3 - TYPE3 sysconfig scheme.
55 * Used by some IPs on AM33xx
56 */
57struct omap_hwmod_sysc_fields omap_hwmod_sysc_type3 = {
58 .midle_shift = SYSC_TYPE3_MIDLEMODE_SHIFT,
59 .sidle_shift = SYSC_TYPE3_SIDLEMODE_SHIFT,
50}; 60};
51 61
52struct omap_dss_dispc_dev_attr omap2_3_dss_dispc_dev_attr = { 62struct omap_dss_dispc_dev_attr omap2_3_dss_dispc_dev_attr = {
diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c
index 96114901b932..2f963f702a05 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -526,7 +526,8 @@ int pwrdm_read_next_pwrst(struct powerdomain *pwrdm)
526 * 526 *
527 * Return the powerdomain @pwrdm's current power state. Returns -EINVAL 527 * Return the powerdomain @pwrdm's current power state. Returns -EINVAL
528 * if the powerdomain pointer is null or returns the current power state 528 * if the powerdomain pointer is null or returns the current power state
529 * upon success. 529 * upon success. Note that if the power domain only supports the ON state
530 * then just return ON as the current state.
530 */ 531 */
531int pwrdm_read_pwrst(struct powerdomain *pwrdm) 532int pwrdm_read_pwrst(struct powerdomain *pwrdm)
532{ 533{
@@ -535,6 +536,9 @@ int pwrdm_read_pwrst(struct powerdomain *pwrdm)
535 if (!pwrdm) 536 if (!pwrdm)
536 return -EINVAL; 537 return -EINVAL;
537 538
539 if (pwrdm->pwrsts == PWRSTS_ON)
540 return PWRDM_POWER_ON;
541
538 if (arch_pwrdm && arch_pwrdm->pwrdm_read_pwrst) 542 if (arch_pwrdm && arch_pwrdm->pwrdm_read_pwrst)
539 ret = arch_pwrdm->pwrdm_read_pwrst(pwrdm); 543 ret = arch_pwrdm->pwrdm_read_pwrst(pwrdm);
540 544
diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c
index 480f40a5ee42..28cbfb2b5733 100644
--- a/arch/arm/mach-omap2/prcm.c
+++ b/arch/arm/mach-omap2/prcm.c
@@ -35,6 +35,7 @@
35#include "prm2xxx_3xxx.h" 35#include "prm2xxx_3xxx.h"
36#include "prm44xx.h" 36#include "prm44xx.h"
37#include "prminst44xx.h" 37#include "prminst44xx.h"
38#include "cminst44xx.h"
38#include "prm-regbits-24xx.h" 39#include "prm-regbits-24xx.h"
39#include "prm-regbits-44xx.h" 40#include "prm-regbits-44xx.h"
40#include "control.h" 41#include "control.h"
@@ -164,3 +165,25 @@ void __init omap2_set_globals_prcm(struct omap_globals *omap2_globals)
164 omap_cm_base_init(); 165 omap_cm_base_init();
165 } 166 }
166} 167}
168
169/*
170 * Stubbed functions so that common files continue to build when
171 * custom builds are used
172 * XXX These are temporary and should be removed at the earliest possible
173 * opportunity
174 */
175int __weak omap4_cminst_wait_module_idle(u8 part, u16 inst, s16 cdoffs,
176 u16 clkctrl_offs)
177{
178 return 0;
179}
180
181void __weak omap4_cminst_module_enable(u8 mode, u8 part, u16 inst,
182 s16 cdoffs, u16 clkctrl_offs)
183{
184}
185
186void __weak omap4_cminst_module_disable(u8 part, u16 inst, s16 cdoffs,
187 u16 clkctrl_offs)
188{
189}
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.h b/arch/arm/mach-omap2/prm2xxx_3xxx.h
index 70ac2a19dc5f..f7bb57fff416 100644
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.h
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.h
@@ -228,68 +228,6 @@
228 228
229 229
230#ifndef __ASSEMBLER__ 230#ifndef __ASSEMBLER__
231/*
232 * Stub omap2xxx/omap3xxx functions so that common files
233 * continue to build when custom builds are used
234 */
235#if defined(CONFIG_ARCH_OMAP4) && !(defined(CONFIG_ARCH_OMAP2) || \
236 defined(CONFIG_ARCH_OMAP3))
237static inline u32 omap2_prm_read_mod_reg(s16 module, u16 idx)
238{
239 WARN(1, "prm: omap2xxx/omap3xxx specific function and "
240 "not suppose to be used on omap4\n");
241 return 0;
242}
243static inline void omap2_prm_write_mod_reg(u32 val, s16 module, u16 idx)
244{
245 WARN(1, "prm: omap2xxx/omap3xxx specific function and "
246 "not suppose to be used on omap4\n");
247}
248static inline u32 omap2_prm_rmw_mod_reg_bits(u32 mask, u32 bits,
249 s16 module, s16 idx)
250{
251 WARN(1, "prm: omap2xxx/omap3xxx specific function and "
252 "not suppose to be used on omap4\n");
253 return 0;
254}
255static inline u32 omap2_prm_set_mod_reg_bits(u32 bits, s16 module, s16 idx)
256{
257 WARN(1, "prm: omap2xxx/omap3xxx specific function and "
258 "not suppose to be used on omap4\n");
259 return 0;
260}
261static inline u32 omap2_prm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx)
262{
263 WARN(1, "prm: omap2xxx/omap3xxx specific function and "
264 "not suppose to be used on omap4\n");
265 return 0;
266}
267static inline u32 omap2_prm_read_mod_bits_shift(s16 domain, s16 idx, u32 mask)
268{
269 WARN(1, "prm: omap2xxx/omap3xxx specific function and "
270 "not suppose to be used on omap4\n");
271 return 0;
272}
273static inline int omap2_prm_is_hardreset_asserted(s16 prm_mod, u8 shift)
274{
275 WARN(1, "prm: omap2xxx/omap3xxx specific function and "
276 "not suppose to be used on omap4\n");
277 return 0;
278}
279static inline int omap2_prm_assert_hardreset(s16 prm_mod, u8 shift)
280{
281 WARN(1, "prm: omap2xxx/omap3xxx specific function and "
282 "not suppose to be used on omap4\n");
283 return 0;
284}
285static inline int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift,
286 u8 st_shift)
287{
288 WARN(1, "prm: omap2xxx/omap3xxx specific function and "
289 "not suppose to be used on omap4\n");
290 return 0;
291}
292#else
293/* Power/reset management domain register get/set */ 231/* Power/reset management domain register get/set */
294extern u32 omap2_prm_read_mod_reg(s16 module, u16 idx); 232extern u32 omap2_prm_read_mod_reg(s16 module, u16 idx);
295extern void omap2_prm_write_mod_reg(u32 val, s16 module, u16 idx); 233extern void omap2_prm_write_mod_reg(u32 val, s16 module, u16 idx);
@@ -320,9 +258,6 @@ extern void omap3xxx_prm_read_pending_irqs(unsigned long *events);
320extern void omap3xxx_prm_ocp_barrier(void); 258extern void omap3xxx_prm_ocp_barrier(void);
321extern void omap3xxx_prm_save_and_clear_irqen(u32 *saved_mask); 259extern void omap3xxx_prm_save_and_clear_irqen(u32 *saved_mask);
322extern void omap3xxx_prm_restore_irqen(u32 *saved_mask); 260extern void omap3xxx_prm_restore_irqen(u32 *saved_mask);
323
324#endif /* CONFIG_ARCH_OMAP4 */
325
326#endif 261#endif
327 262
328/* 263/*
diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c
index dfe00ddb5c60..663ade3b2f45 100644
--- a/arch/arm/mach-omap2/prm_common.c
+++ b/arch/arm/mach-omap2/prm_common.c
@@ -319,3 +319,65 @@ err:
319 omap_prcm_irq_cleanup(); 319 omap_prcm_irq_cleanup();
320 return -ENOMEM; 320 return -ENOMEM;
321} 321}
322
323/*
324 * Stubbed functions so that common files continue to build when
325 * custom builds are used
326 * XXX These are temporary and should be removed at the earliest possible
327 * opportunity
328 */
329u32 __weak omap2_prm_read_mod_reg(s16 module, u16 idx)
330{
331 WARN(1, "prm: omap2xxx/omap3xxx specific function called on non-omap2xxx/3xxx\n");
332 return 0;
333}
334
335void __weak omap2_prm_write_mod_reg(u32 val, s16 module, u16 idx)
336{
337 WARN(1, "prm: omap2xxx/omap3xxx specific function called on non-omap2xxx/3xxx\n");
338}
339
340u32 __weak omap2_prm_rmw_mod_reg_bits(u32 mask, u32 bits,
341 s16 module, s16 idx)
342{
343 WARN(1, "prm: omap2xxx/omap3xxx specific function called on non-omap2xxx/3xxx\n");
344 return 0;
345}
346
347u32 __weak omap2_prm_set_mod_reg_bits(u32 bits, s16 module, s16 idx)
348{
349 WARN(1, "prm: omap2xxx/omap3xxx specific function called on non-omap2xxx/3xxx\n");
350 return 0;
351}
352
353u32 __weak omap2_prm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx)
354{
355 WARN(1, "prm: omap2xxx/omap3xxx specific function called on non-omap2xxx/3xxx\n");
356 return 0;
357}
358
359u32 __weak omap2_prm_read_mod_bits_shift(s16 domain, s16 idx, u32 mask)
360{
361 WARN(1, "prm: omap2xxx/omap3xxx specific function called on non-omap2xxx/3xxx\n");
362 return 0;
363}
364
365int __weak omap2_prm_is_hardreset_asserted(s16 prm_mod, u8 shift)
366{
367 WARN(1, "prm: omap2xxx/omap3xxx specific function called on non-omap2xxx/3xxx\n");
368 return 0;
369}
370
371int __weak omap2_prm_assert_hardreset(s16 prm_mod, u8 shift)
372{
373 WARN(1, "prm: omap2xxx/omap3xxx specific function called on non-omap2xxx/3xxx\n");
374 return 0;
375}
376
377int __weak omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift,
378 u8 st_shift)
379{
380 WARN(1, "prm: omap2xxx/omap3xxx specific function called on non-omap2xxx/3xxx\n");
381 return 0;
382}
383
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index b5b5d92acd9d..2b318ec92d39 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -168,8 +168,7 @@ static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer,
168 return -ENXIO; 168 return -ENXIO;
169 169
170 /* After the dmtimer is using hwmod these clocks won't be needed */ 170 /* After the dmtimer is using hwmod these clocks won't be needed */
171 sprintf(name, "gpt%d_fck", gptimer_id); 171 timer->fclk = clk_get(NULL, omap_hwmod_get_main_clk(oh));
172 timer->fclk = clk_get(NULL, name);
173 if (IS_ERR(timer->fclk)) 172 if (IS_ERR(timer->fclk))
174 return -ENODEV; 173 return -ENODEV;
175 174
diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile
index 6d87532871cd..961bf859bc0c 100644
--- a/arch/arm/plat-omap/Makefile
+++ b/arch/arm/plat-omap/Makefile
@@ -10,9 +10,7 @@ obj-n :=
10obj- := 10obj- :=
11 11
12# omap_device support (OMAP2+ only at the moment) 12# omap_device support (OMAP2+ only at the moment)
13obj-$(CONFIG_ARCH_OMAP2) += omap_device.o 13obj-$(CONFIG_ARCH_OMAP2PLUS) += omap_device.o
14obj-$(CONFIG_ARCH_OMAP3) += omap_device.o
15obj-$(CONFIG_ARCH_OMAP4) += omap_device.o
16 14
17obj-$(CONFIG_OMAP_DM_TIMER) += dmtimer.o 15obj-$(CONFIG_OMAP_DM_TIMER) += dmtimer.o
18obj-$(CONFIG_OMAP_DEBUG_DEVICES) += debug-devices.o 16obj-$(CONFIG_OMAP_DEBUG_DEVICES) += debug-devices.o
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index 54ed4e6e429e..626ad8cad7a9 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -37,7 +37,7 @@
37 37
38#include <linux/module.h> 38#include <linux/module.h>
39#include <linux/io.h> 39#include <linux/io.h>
40#include <linux/slab.h> 40#include <linux/device.h>
41#include <linux/err.h> 41#include <linux/err.h>
42#include <linux/pm_runtime.h> 42#include <linux/pm_runtime.h>
43 43
@@ -689,49 +689,39 @@ EXPORT_SYMBOL_GPL(omap_dm_timers_active);
689 */ 689 */
690static int __devinit omap_dm_timer_probe(struct platform_device *pdev) 690static int __devinit omap_dm_timer_probe(struct platform_device *pdev)
691{ 691{
692 int ret;
693 unsigned long flags; 692 unsigned long flags;
694 struct omap_dm_timer *timer; 693 struct omap_dm_timer *timer;
695 struct resource *mem, *irq, *ioarea; 694 struct resource *mem, *irq;
695 struct device *dev = &pdev->dev;
696 struct dmtimer_platform_data *pdata = pdev->dev.platform_data; 696 struct dmtimer_platform_data *pdata = pdev->dev.platform_data;
697 697
698 if (!pdata) { 698 if (!pdata) {
699 dev_err(&pdev->dev, "%s: no platform data.\n", __func__); 699 dev_err(dev, "%s: no platform data.\n", __func__);
700 return -ENODEV; 700 return -ENODEV;
701 } 701 }
702 702
703 irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 703 irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
704 if (unlikely(!irq)) { 704 if (unlikely(!irq)) {
705 dev_err(&pdev->dev, "%s: no IRQ resource.\n", __func__); 705 dev_err(dev, "%s: no IRQ resource.\n", __func__);
706 return -ENODEV; 706 return -ENODEV;
707 } 707 }
708 708
709 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 709 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
710 if (unlikely(!mem)) { 710 if (unlikely(!mem)) {
711 dev_err(&pdev->dev, "%s: no memory resource.\n", __func__); 711 dev_err(dev, "%s: no memory resource.\n", __func__);
712 return -ENODEV; 712 return -ENODEV;
713 } 713 }
714 714
715 ioarea = request_mem_region(mem->start, resource_size(mem), 715 timer = devm_kzalloc(dev, sizeof(struct omap_dm_timer), GFP_KERNEL);
716 pdev->name);
717 if (!ioarea) {
718 dev_err(&pdev->dev, "%s: region already claimed.\n", __func__);
719 return -EBUSY;
720 }
721
722 timer = kzalloc(sizeof(struct omap_dm_timer), GFP_KERNEL);
723 if (!timer) { 716 if (!timer) {
724 dev_err(&pdev->dev, "%s: no memory for omap_dm_timer.\n", 717 dev_err(dev, "%s: memory alloc failed!\n", __func__);
725 __func__); 718 return -ENOMEM;
726 ret = -ENOMEM;
727 goto err_free_ioregion;
728 } 719 }
729 720
730 timer->io_base = ioremap(mem->start, resource_size(mem)); 721 timer->io_base = devm_request_and_ioremap(dev, mem);
731 if (!timer->io_base) { 722 if (!timer->io_base) {
732 dev_err(&pdev->dev, "%s: ioremap failed.\n", __func__); 723 dev_err(dev, "%s: region already claimed.\n", __func__);
733 ret = -ENOMEM; 724 return -ENOMEM;
734 goto err_free_mem;
735 } 725 }
736 726
737 timer->id = pdev->id; 727 timer->id = pdev->id;
@@ -742,14 +732,14 @@ static int __devinit omap_dm_timer_probe(struct platform_device *pdev)
742 732
743 /* Skip pm_runtime_enable for OMAP1 */ 733 /* Skip pm_runtime_enable for OMAP1 */
744 if (!(timer->capability & OMAP_TIMER_NEEDS_RESET)) { 734 if (!(timer->capability & OMAP_TIMER_NEEDS_RESET)) {
745 pm_runtime_enable(&pdev->dev); 735 pm_runtime_enable(dev);
746 pm_runtime_irq_safe(&pdev->dev); 736 pm_runtime_irq_safe(dev);
747 } 737 }
748 738
749 if (!timer->reserved) { 739 if (!timer->reserved) {
750 pm_runtime_get_sync(&pdev->dev); 740 pm_runtime_get_sync(dev);
751 __omap_dm_timer_init_regs(timer); 741 __omap_dm_timer_init_regs(timer);
752 pm_runtime_put(&pdev->dev); 742 pm_runtime_put(dev);
753 } 743 }
754 744
755 /* add the timer element to the list */ 745 /* add the timer element to the list */
@@ -757,17 +747,9 @@ static int __devinit omap_dm_timer_probe(struct platform_device *pdev)
757 list_add_tail(&timer->node, &omap_timer_list); 747 list_add_tail(&timer->node, &omap_timer_list);
758 spin_unlock_irqrestore(&dm_timer_lock, flags); 748 spin_unlock_irqrestore(&dm_timer_lock, flags);
759 749
760 dev_dbg(&pdev->dev, "Device Probed.\n"); 750 dev_dbg(dev, "Device Probed.\n");
761 751
762 return 0; 752 return 0;
763
764err_free_mem:
765 kfree(timer);
766
767err_free_ioregion:
768 release_mem_region(mem->start, resource_size(mem));
769
770 return ret;
771} 753}
772 754
773/** 755/**
@@ -788,7 +770,6 @@ static int __devexit omap_dm_timer_remove(struct platform_device *pdev)
788 list_for_each_entry(timer, &omap_timer_list, node) 770 list_for_each_entry(timer, &omap_timer_list, node)
789 if (timer->pdev->id == pdev->id) { 771 if (timer->pdev->id == pdev->id) {
790 list_del(&timer->node); 772 list_del(&timer->node);
791 kfree(timer);
792 ret = 0; 773 ret = 0;
793 break; 774 break;
794 } 775 }
diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h
index de6c0a08f461..14f050f7a897 100644
--- a/arch/arm/plat-omap/include/plat/cpu.h
+++ b/arch/arm/plat-omap/include/plat/cpu.h
@@ -150,8 +150,8 @@ IS_AM_SUBCLASS(335x, 0x335)
150#define cpu_is_ti816x() 0 150#define cpu_is_ti816x() 0
151#define cpu_is_ti814x() 0 151#define cpu_is_ti814x() 0
152#define soc_is_am35xx() 0 152#define soc_is_am35xx() 0
153#define cpu_is_am33xx() 0 153#define soc_is_am33xx() 0
154#define cpu_is_am335x() 0 154#define soc_is_am335x() 0
155#define cpu_is_omap44xx() 0 155#define cpu_is_omap44xx() 0
156#define cpu_is_omap443x() 0 156#define cpu_is_omap443x() 0
157#define cpu_is_omap446x() 0 157#define cpu_is_omap446x() 0
@@ -344,8 +344,6 @@ IS_OMAP_TYPE(3430, 0x3430)
344# undef cpu_is_ti816x 344# undef cpu_is_ti816x
345# undef cpu_is_ti814x 345# undef cpu_is_ti814x
346# undef soc_is_am35xx 346# undef soc_is_am35xx
347# undef cpu_is_am33xx
348# undef cpu_is_am335x
349# define cpu_is_omap3430() is_omap3430() 347# define cpu_is_omap3430() is_omap3430()
350# undef cpu_is_omap3630 348# undef cpu_is_omap3630
351# define cpu_is_omap3630() is_omap363x() 349# define cpu_is_omap3630() is_omap363x()
@@ -353,8 +351,13 @@ IS_OMAP_TYPE(3430, 0x3430)
353# define cpu_is_ti816x() is_ti816x() 351# define cpu_is_ti816x() is_ti816x()
354# define cpu_is_ti814x() is_ti814x() 352# define cpu_is_ti814x() is_ti814x()
355# define soc_is_am35xx() is_am35xx() 353# define soc_is_am35xx() is_am35xx()
356# define cpu_is_am33xx() is_am33xx() 354#endif
357# define cpu_is_am335x() is_am335x() 355
356# if defined(CONFIG_SOC_AM33XX)
357# undef soc_is_am33xx
358# undef soc_is_am335x
359# define soc_is_am33xx() is_am33xx()
360# define soc_is_am335x() is_am335x()
358#endif 361#endif
359 362
360# if defined(CONFIG_ARCH_OMAP4) 363# if defined(CONFIG_ARCH_OMAP4)
@@ -408,7 +411,7 @@ IS_OMAP_TYPE(3430, 0x3430)
408#define AM35XX_REV_ES1_0 AM35XX_CLASS 411#define AM35XX_REV_ES1_0 AM35XX_CLASS
409#define AM35XX_REV_ES1_1 (AM35XX_CLASS | (0x1 << 8)) 412#define AM35XX_REV_ES1_1 (AM35XX_CLASS | (0x1 << 8))
410 413
411#define AM335X_CLASS 0x33500034 414#define AM335X_CLASS 0x33500033
412#define AM335X_REV_ES1_0 AM335X_CLASS 415#define AM335X_REV_ES1_0 AM335X_CLASS
413 416
414#define OMAP443X_CLASS 0x44300044 417#define OMAP443X_CLASS 0x44300044
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h
index a8ecc53b3670..6132972aff37 100644
--- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
@@ -41,6 +41,7 @@ struct omap_device;
41 41
42extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type1; 42extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type1;
43extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type2; 43extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type2;
44extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type3;
44 45
45/* 46/*
46 * OCP SYSCONFIG bit shifts/masks TYPE1. These are for IPs compliant 47 * OCP SYSCONFIG bit shifts/masks TYPE1. These are for IPs compliant
@@ -69,6 +70,17 @@ extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type2;
69#define SYSC_TYPE2_SIDLEMODE_MASK (0x3 << SYSC_TYPE2_SIDLEMODE_SHIFT) 70#define SYSC_TYPE2_SIDLEMODE_MASK (0x3 << SYSC_TYPE2_SIDLEMODE_SHIFT)
70#define SYSC_TYPE2_MIDLEMODE_SHIFT 4 71#define SYSC_TYPE2_MIDLEMODE_SHIFT 4
71#define SYSC_TYPE2_MIDLEMODE_MASK (0x3 << SYSC_TYPE2_MIDLEMODE_SHIFT) 72#define SYSC_TYPE2_MIDLEMODE_MASK (0x3 << SYSC_TYPE2_MIDLEMODE_SHIFT)
73#define SYSC_TYPE2_DMADISABLE_SHIFT 16
74#define SYSC_TYPE2_DMADISABLE_MASK (0x1 << SYSC_TYPE2_DMADISABLE_SHIFT)
75
76/*
77 * OCP SYSCONFIG bit shifts/masks TYPE3.
78 * This is applicable for some IPs present in AM33XX
79 */
80#define SYSC_TYPE3_SIDLEMODE_SHIFT 0
81#define SYSC_TYPE3_SIDLEMODE_MASK (0x3 << SYSC_TYPE3_SIDLEMODE_SHIFT)
82#define SYSC_TYPE3_MIDLEMODE_SHIFT 2
83#define SYSC_TYPE3_MIDLEMODE_MASK (0x3 << SYSC_TYPE3_MIDLEMODE_SHIFT)
72 84
73/* OCP SYSSTATUS bit shifts/masks */ 85/* OCP SYSSTATUS bit shifts/masks */
74#define SYSS_RESETDONE_SHIFT 0 86#define SYSS_RESETDONE_SHIFT 0
@@ -283,6 +295,7 @@ struct omap_hwmod_ocp_if {
283#define SYSS_HAS_RESET_STATUS (1 << 7) 295#define SYSS_HAS_RESET_STATUS (1 << 7)
284#define SYSC_NO_CACHE (1 << 8) /* XXX SW flag, belongs elsewhere */ 296#define SYSC_NO_CACHE (1 << 8) /* XXX SW flag, belongs elsewhere */
285#define SYSC_HAS_RESET_STATUS (1 << 9) 297#define SYSC_HAS_RESET_STATUS (1 << 9)
298#define SYSC_HAS_DMADISABLE (1 << 10)
286 299
287/* omap_hwmod_sysconfig.clockact flags */ 300/* omap_hwmod_sysconfig.clockact flags */
288#define CLOCKACT_TEST_BOTH 0x0 301#define CLOCKACT_TEST_BOTH 0x0
@@ -298,6 +311,7 @@ struct omap_hwmod_ocp_if {
298 * @enwkup_shift: Offset of the enawakeup bit 311 * @enwkup_shift: Offset of the enawakeup bit
299 * @srst_shift: Offset of the softreset bit 312 * @srst_shift: Offset of the softreset bit
300 * @autoidle_shift: Offset of the autoidle bit 313 * @autoidle_shift: Offset of the autoidle bit
314 * @dmadisable_shift: Offset of the dmadisable bit
301 */ 315 */
302struct omap_hwmod_sysc_fields { 316struct omap_hwmod_sysc_fields {
303 u8 midle_shift; 317 u8 midle_shift;
@@ -306,6 +320,7 @@ struct omap_hwmod_sysc_fields {
306 u8 enwkup_shift; 320 u8 enwkup_shift;
307 u8 srst_shift; 321 u8 srst_shift;
308 u8 autoidle_shift; 322 u8 autoidle_shift;
323 u8 dmadisable_shift;
309}; 324};
310 325
311/** 326/**
@@ -374,11 +389,13 @@ struct omap_hwmod_omap2_prcm {
374 * struct omap_hwmod_omap4_prcm - OMAP4-specific PRCM data 389 * struct omap_hwmod_omap4_prcm - OMAP4-specific PRCM data
375 * @clkctrl_reg: PRCM address of the clock control register 390 * @clkctrl_reg: PRCM address of the clock control register
376 * @rstctrl_reg: address of the XXX_RSTCTRL register located in the PRM 391 * @rstctrl_reg: address of the XXX_RSTCTRL register located in the PRM
392 * @rstst_reg: (AM33XX only) address of the XXX_RSTST register in the PRM
377 * @submodule_wkdep_bit: bit shift of the WKDEP range 393 * @submodule_wkdep_bit: bit shift of the WKDEP range
378 */ 394 */
379struct omap_hwmod_omap4_prcm { 395struct omap_hwmod_omap4_prcm {
380 u16 clkctrl_offs; 396 u16 clkctrl_offs;
381 u16 rstctrl_offs; 397 u16 rstctrl_offs;
398 u16 rstst_offs;
382 u16 context_offs; 399 u16 context_offs;
383 u8 submodule_wkdep_bit; 400 u8 submodule_wkdep_bit;
384 u8 modulemode; 401 u8 modulemode;
@@ -631,6 +648,8 @@ int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx);
631 648
632extern void __init omap_hwmod_init(void); 649extern void __init omap_hwmod_init(void);
633 650
651const char *omap_hwmod_get_main_clk(struct omap_hwmod *oh);
652
634/* 653/*
635 * Chip variant-specific hwmod init routines - XXX should be converted 654 * Chip variant-specific hwmod init routines - XXX should be converted
636 * to use initcalls once the initial boot ordering is straightened out 655 * to use initcalls once the initial boot ordering is straightened out
diff --git a/arch/arm/plat-omap/include/plat/sdrc.h b/arch/arm/plat-omap/include/plat/sdrc.h
index 9bb978ecd884..36d6a7666216 100644
--- a/arch/arm/plat-omap/include/plat/sdrc.h
+++ b/arch/arm/plat-omap/include/plat/sdrc.h
@@ -123,7 +123,7 @@ struct omap_sdrc_params {
123 u32 mr; 123 u32 mr;
124}; 124};
125 125
126#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) 126#ifdef CONFIG_SOC_HAS_OMAP2_SDRC
127void omap2_sdrc_init(struct omap_sdrc_params *sdrc_cs0, 127void omap2_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
128 struct omap_sdrc_params *sdrc_cs1); 128 struct omap_sdrc_params *sdrc_cs1);
129#else 129#else
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index 477363c163ec..70cf825bdd87 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -85,7 +85,7 @@ static int is_sram_locked(void)
85 __raw_writel(0xCFDE, OMAP24XX_VA_READPERM0); /* all i-read */ 85 __raw_writel(0xCFDE, OMAP24XX_VA_READPERM0); /* all i-read */
86 __raw_writel(0xCFDE, OMAP24XX_VA_WRITEPERM0); /* all i-write */ 86 __raw_writel(0xCFDE, OMAP24XX_VA_WRITEPERM0); /* all i-write */
87 } 87 }
88 if (cpu_is_omap34xx() && !cpu_is_am33xx()) { 88 if (cpu_is_omap34xx()) {
89 __raw_writel(0xFFFF, OMAP34XX_VA_REQINFOPERM0); /* all q-vects */ 89 __raw_writel(0xFFFF, OMAP34XX_VA_REQINFOPERM0); /* all q-vects */
90 __raw_writel(0xFFFF, OMAP34XX_VA_READPERM0); /* all i-read */ 90 __raw_writel(0xFFFF, OMAP34XX_VA_READPERM0); /* all i-read */
91 __raw_writel(0xFFFF, OMAP34XX_VA_WRITEPERM0); /* all i-write */ 91 __raw_writel(0xFFFF, OMAP34XX_VA_WRITEPERM0); /* all i-write */
@@ -123,7 +123,7 @@ static void __init omap_detect_sram(void)
123 omap_sram_size = 0x800; /* 2K */ 123 omap_sram_size = 0x800; /* 2K */
124 } 124 }
125 } else { 125 } else {
126 if (cpu_is_am33xx()) { 126 if (soc_is_am33xx()) {
127 omap_sram_start = AM33XX_SRAM_PA; 127 omap_sram_start = AM33XX_SRAM_PA;
128 omap_sram_size = 0x10000; /* 64K */ 128 omap_sram_size = 0x10000; /* 64K */
129 } else if (cpu_is_omap34xx()) { 129 } else if (cpu_is_omap34xx()) {
@@ -386,7 +386,7 @@ int __init omap_sram_init(void)
386 omap242x_sram_init(); 386 omap242x_sram_init();
387 else if (cpu_is_omap2430()) 387 else if (cpu_is_omap2430())
388 omap243x_sram_init(); 388 omap243x_sram_init();
389 else if (cpu_is_am33xx()) 389 else if (soc_is_am33xx())
390 am33xx_sram_init(); 390 am33xx_sram_init();
391 else if (cpu_is_omap34xx()) 391 else if (cpu_is_omap34xx())
392 omap34xx_sram_init(); 392 omap34xx_sram_init();