diff options
author | Larry Finger <Larry.Finger@lwfinger.net> | 2012-10-25 14:46:31 -0400 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2012-10-30 16:17:54 -0400 |
commit | da17fcffb1dff98463640d1deaeafbc6a7e73a41 (patch) | |
tree | 1687b3f8112674f044e87f685c6c75332266641e | |
parent | 0bd899e76476e0134f7289a003090165adea2611 (diff) |
rtlwifi: rtl8192c: rtl8192ce: rtl8192cu: rtl8192se: rtl8192de: Shorten some variable names
The private data areas for these drivers contain some very long variable
names that cause difficulty in fitting source lines to an 80-character
limit.
Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
20 files changed, 418 insertions, 548 deletions
diff --git a/drivers/net/wireless/rtlwifi/rtl8192c/dm_common.c b/drivers/net/wireless/rtlwifi/rtl8192c/dm_common.c index 1ca4e25c143b..1cdf5a271c9f 100644 --- a/drivers/net/wireless/rtlwifi/rtl8192c/dm_common.c +++ b/drivers/net/wireless/rtlwifi/rtl8192c/dm_common.c | |||
@@ -43,8 +43,8 @@ | |||
43 | #define GET_UNDECORATED_AVERAGE_RSSI(_priv) \ | 43 | #define GET_UNDECORATED_AVERAGE_RSSI(_priv) \ |
44 | ((RTLPRIV(_priv))->mac80211.opmode == \ | 44 | ((RTLPRIV(_priv))->mac80211.opmode == \ |
45 | NL80211_IFTYPE_ADHOC) ? \ | 45 | NL80211_IFTYPE_ADHOC) ? \ |
46 | ((RTLPRIV(_priv))->dm.entry_min_undecoratedsmoothed_pwdb) : \ | 46 | ((RTLPRIV(_priv))->dm.entry_min_undec_sm_pwdb) : \ |
47 | ((RTLPRIV(_priv))->dm.undecorated_smoothed_pwdb) | 47 | ((RTLPRIV(_priv))->dm.undec_sm_pwdb) |
48 | 48 | ||
49 | static const u32 ofdmswing_table[OFDM_TABLE_SIZE] = { | 49 | static const u32 ofdmswing_table[OFDM_TABLE_SIZE] = { |
50 | 0x7f8001fe, | 50 | 0x7f8001fe, |
@@ -167,18 +167,18 @@ static void rtl92c_dm_diginit(struct ieee80211_hw *hw) | |||
167 | dm_digtable->dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX; | 167 | dm_digtable->dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX; |
168 | dm_digtable->cur_igvalue = 0x20; | 168 | dm_digtable->cur_igvalue = 0x20; |
169 | dm_digtable->pre_igvalue = 0x0; | 169 | dm_digtable->pre_igvalue = 0x0; |
170 | dm_digtable->cursta_connectstate = DIG_STA_DISCONNECT; | 170 | dm_digtable->cursta_cstate = DIG_STA_DISCONNECT; |
171 | dm_digtable->presta_connectstate = DIG_STA_DISCONNECT; | 171 | dm_digtable->presta_cstate = DIG_STA_DISCONNECT; |
172 | dm_digtable->curmultista_connectstate = DIG_MULTISTA_DISCONNECT; | 172 | dm_digtable->curmultista_cstate = DIG_MULTISTA_DISCONNECT; |
173 | dm_digtable->rssi_lowthresh = DM_DIG_THRESH_LOW; | 173 | dm_digtable->rssi_lowthresh = DM_DIG_THRESH_LOW; |
174 | dm_digtable->rssi_highthresh = DM_DIG_THRESH_HIGH; | 174 | dm_digtable->rssi_highthresh = DM_DIG_THRESH_HIGH; |
175 | dm_digtable->fa_lowthresh = DM_FALSEALARM_THRESH_LOW; | 175 | dm_digtable->fa_lowthresh = DM_FALSEALARM_THRESH_LOW; |
176 | dm_digtable->fa_highthresh = DM_FALSEALARM_THRESH_HIGH; | 176 | dm_digtable->fa_highthresh = DM_FALSEALARM_THRESH_HIGH; |
177 | dm_digtable->rx_gain_range_max = DM_DIG_MAX; | 177 | dm_digtable->rx_gain_range_max = DM_DIG_MAX; |
178 | dm_digtable->rx_gain_range_min = DM_DIG_MIN; | 178 | dm_digtable->rx_gain_range_min = DM_DIG_MIN; |
179 | dm_digtable->backoff_val = DM_DIG_BACKOFF_DEFAULT; | 179 | dm_digtable->back_val = DM_DIG_BACKOFF_DEFAULT; |
180 | dm_digtable->backoff_val_range_max = DM_DIG_BACKOFF_MAX; | 180 | dm_digtable->back_range_max = DM_DIG_BACKOFF_MAX; |
181 | dm_digtable->backoff_val_range_min = DM_DIG_BACKOFF_MIN; | 181 | dm_digtable->back_range_min = DM_DIG_BACKOFF_MIN; |
182 | dm_digtable->pre_cck_pd_state = CCK_PD_STAGE_MAX; | 182 | dm_digtable->pre_cck_pd_state = CCK_PD_STAGE_MAX; |
183 | dm_digtable->cur_cck_pd_state = CCK_PD_STAGE_MAX; | 183 | dm_digtable->cur_cck_pd_state = CCK_PD_STAGE_MAX; |
184 | } | 184 | } |
@@ -189,22 +189,21 @@ static u8 rtl92c_dm_initial_gain_min_pwdb(struct ieee80211_hw *hw) | |||
189 | struct dig_t *dm_digtable = &rtlpriv->dm_digtable; | 189 | struct dig_t *dm_digtable = &rtlpriv->dm_digtable; |
190 | long rssi_val_min = 0; | 190 | long rssi_val_min = 0; |
191 | 191 | ||
192 | if ((dm_digtable->curmultista_connectstate == DIG_MULTISTA_CONNECT) && | 192 | if ((dm_digtable->curmultista_cstate == DIG_MULTISTA_CONNECT) && |
193 | (dm_digtable->cursta_connectstate == DIG_STA_CONNECT)) { | 193 | (dm_digtable->cursta_cstate == DIG_STA_CONNECT)) { |
194 | if (rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb != 0) | 194 | if (rtlpriv->dm.entry_min_undec_sm_pwdb != 0) |
195 | rssi_val_min = | 195 | rssi_val_min = |
196 | (rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb > | 196 | (rtlpriv->dm.entry_min_undec_sm_pwdb > |
197 | rtlpriv->dm.undecorated_smoothed_pwdb) ? | 197 | rtlpriv->dm.undec_sm_pwdb) ? |
198 | rtlpriv->dm.undecorated_smoothed_pwdb : | 198 | rtlpriv->dm.undec_sm_pwdb : |
199 | rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb; | 199 | rtlpriv->dm.entry_min_undec_sm_pwdb; |
200 | else | 200 | else |
201 | rssi_val_min = rtlpriv->dm.undecorated_smoothed_pwdb; | 201 | rssi_val_min = rtlpriv->dm.undec_sm_pwdb; |
202 | } else if (dm_digtable->cursta_connectstate == DIG_STA_CONNECT || | 202 | } else if (dm_digtable->cursta_cstate == DIG_STA_CONNECT || |
203 | dm_digtable->cursta_connectstate == DIG_STA_BEFORE_CONNECT) { | 203 | dm_digtable->cursta_cstate == DIG_STA_BEFORE_CONNECT) { |
204 | rssi_val_min = rtlpriv->dm.undecorated_smoothed_pwdb; | 204 | rssi_val_min = rtlpriv->dm.undec_sm_pwdb; |
205 | } else if (dm_digtable->curmultista_connectstate == | 205 | } else if (dm_digtable->curmultista_cstate == DIG_MULTISTA_CONNECT) { |
206 | DIG_MULTISTA_CONNECT) { | 206 | rssi_val_min = rtlpriv->dm.entry_min_undec_sm_pwdb; |
207 | rssi_val_min = rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb; | ||
208 | } | 207 | } |
209 | 208 | ||
210 | return (u8) rssi_val_min; | 209 | return (u8) rssi_val_min; |
@@ -286,37 +285,33 @@ static void rtl92c_dm_ctrl_initgain_by_fa(struct ieee80211_hw *hw) | |||
286 | static void rtl92c_dm_ctrl_initgain_by_rssi(struct ieee80211_hw *hw) | 285 | static void rtl92c_dm_ctrl_initgain_by_rssi(struct ieee80211_hw *hw) |
287 | { | 286 | { |
288 | struct rtl_priv *rtlpriv = rtl_priv(hw); | 287 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
289 | struct dig_t *dm_digtable = &rtlpriv->dm_digtable; | 288 | struct dig_t *digtable = &rtlpriv->dm_digtable; |
290 | 289 | ||
291 | if (rtlpriv->falsealm_cnt.cnt_all > dm_digtable->fa_highthresh) { | 290 | if (rtlpriv->falsealm_cnt.cnt_all > digtable->fa_highthresh) { |
292 | if ((dm_digtable->backoff_val - 2) < | 291 | if ((digtable->back_val - 2) < digtable->back_range_min) |
293 | dm_digtable->backoff_val_range_min) | 292 | digtable->back_val = digtable->back_range_min; |
294 | dm_digtable->backoff_val = | ||
295 | dm_digtable->backoff_val_range_min; | ||
296 | else | 293 | else |
297 | dm_digtable->backoff_val -= 2; | 294 | digtable->back_val -= 2; |
298 | } else if (rtlpriv->falsealm_cnt.cnt_all < dm_digtable->fa_lowthresh) { | 295 | } else if (rtlpriv->falsealm_cnt.cnt_all < digtable->fa_lowthresh) { |
299 | if ((dm_digtable->backoff_val + 2) > | 296 | if ((digtable->back_val + 2) > digtable->back_range_max) |
300 | dm_digtable->backoff_val_range_max) | 297 | digtable->back_val = digtable->back_range_max; |
301 | dm_digtable->backoff_val = | ||
302 | dm_digtable->backoff_val_range_max; | ||
303 | else | 298 | else |
304 | dm_digtable->backoff_val += 2; | 299 | digtable->back_val += 2; |
305 | } | 300 | } |
306 | 301 | ||
307 | if ((dm_digtable->rssi_val_min + 10 - dm_digtable->backoff_val) > | 302 | if ((digtable->rssi_val_min + 10 - digtable->back_val) > |
308 | dm_digtable->rx_gain_range_max) | 303 | digtable->rx_gain_range_max) |
309 | dm_digtable->cur_igvalue = dm_digtable->rx_gain_range_max; | 304 | digtable->cur_igvalue = digtable->rx_gain_range_max; |
310 | else if ((dm_digtable->rssi_val_min + 10 - | 305 | else if ((digtable->rssi_val_min + 10 - |
311 | dm_digtable->backoff_val) < dm_digtable->rx_gain_range_min) | 306 | digtable->back_val) < digtable->rx_gain_range_min) |
312 | dm_digtable->cur_igvalue = dm_digtable->rx_gain_range_min; | 307 | digtable->cur_igvalue = digtable->rx_gain_range_min; |
313 | else | 308 | else |
314 | dm_digtable->cur_igvalue = dm_digtable->rssi_val_min + 10 - | 309 | digtable->cur_igvalue = digtable->rssi_val_min + 10 - |
315 | dm_digtable->backoff_val; | 310 | digtable->back_val; |
316 | 311 | ||
317 | RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE, | 312 | RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE, |
318 | "rssi_val_min = %x backoff_val %x\n", | 313 | "rssi_val_min = %x back_val %x\n", |
319 | dm_digtable->rssi_val_min, dm_digtable->backoff_val); | 314 | digtable->rssi_val_min, digtable->back_val); |
320 | 315 | ||
321 | rtl92c_dm_write_dig(hw); | 316 | rtl92c_dm_write_dig(hw); |
322 | } | 317 | } |
@@ -327,14 +322,14 @@ static void rtl92c_dm_initial_gain_multi_sta(struct ieee80211_hw *hw) | |||
327 | struct rtl_priv *rtlpriv = rtl_priv(hw); | 322 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
328 | struct dig_t *dm_digtable = &rtlpriv->dm_digtable; | 323 | struct dig_t *dm_digtable = &rtlpriv->dm_digtable; |
329 | struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); | 324 | struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); |
330 | long rssi_strength = rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb; | 325 | long rssi_strength = rtlpriv->dm.entry_min_undec_sm_pwdb; |
331 | bool multi_sta = false; | 326 | bool multi_sta = false; |
332 | 327 | ||
333 | if (mac->opmode == NL80211_IFTYPE_ADHOC) | 328 | if (mac->opmode == NL80211_IFTYPE_ADHOC) |
334 | multi_sta = true; | 329 | multi_sta = true; |
335 | 330 | ||
336 | if (!multi_sta || | 331 | if (!multi_sta || |
337 | dm_digtable->cursta_connectstate != DIG_STA_DISCONNECT) { | 332 | dm_digtable->cursta_cstate != DIG_STA_DISCONNECT) { |
338 | initialized = false; | 333 | initialized = false; |
339 | dm_digtable->dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX; | 334 | dm_digtable->dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX; |
340 | return; | 335 | return; |
@@ -345,7 +340,7 @@ static void rtl92c_dm_initial_gain_multi_sta(struct ieee80211_hw *hw) | |||
345 | rtl92c_dm_write_dig(hw); | 340 | rtl92c_dm_write_dig(hw); |
346 | } | 341 | } |
347 | 342 | ||
348 | if (dm_digtable->curmultista_connectstate == DIG_MULTISTA_CONNECT) { | 343 | if (dm_digtable->curmultista_cstate == DIG_MULTISTA_CONNECT) { |
349 | if ((rssi_strength < dm_digtable->rssi_lowthresh) && | 344 | if ((rssi_strength < dm_digtable->rssi_lowthresh) && |
350 | (dm_digtable->dig_ext_port_stage != DIG_EXT_PORT_STAGE_1)) { | 345 | (dm_digtable->dig_ext_port_stage != DIG_EXT_PORT_STAGE_1)) { |
351 | 346 | ||
@@ -367,8 +362,8 @@ static void rtl92c_dm_initial_gain_multi_sta(struct ieee80211_hw *hw) | |||
367 | } | 362 | } |
368 | 363 | ||
369 | RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE, | 364 | RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE, |
370 | "curmultista_connectstate = %x dig_ext_port_stage %x\n", | 365 | "curmultista_cstate = %x dig_ext_port_stage %x\n", |
371 | dm_digtable->curmultista_connectstate, | 366 | dm_digtable->curmultista_cstate, |
372 | dm_digtable->dig_ext_port_stage); | 367 | dm_digtable->dig_ext_port_stage); |
373 | } | 368 | } |
374 | 369 | ||
@@ -378,15 +373,14 @@ static void rtl92c_dm_initial_gain_sta(struct ieee80211_hw *hw) | |||
378 | struct dig_t *dm_digtable = &rtlpriv->dm_digtable; | 373 | struct dig_t *dm_digtable = &rtlpriv->dm_digtable; |
379 | 374 | ||
380 | RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE, | 375 | RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE, |
381 | "presta_connectstate = %x, cursta_connectstate = %x\n", | 376 | "presta_cstate = %x, cursta_cstate = %x\n", |
382 | dm_digtable->presta_connectstate, | 377 | dm_digtable->presta_cstate, dm_digtable->cursta_cstate); |
383 | dm_digtable->cursta_connectstate); | ||
384 | 378 | ||
385 | if (dm_digtable->presta_connectstate == dm_digtable->cursta_connectstate | 379 | if (dm_digtable->presta_cstate == dm_digtable->cursta_cstate || |
386 | || dm_digtable->cursta_connectstate == DIG_STA_BEFORE_CONNECT | 380 | dm_digtable->cursta_cstate == DIG_STA_BEFORE_CONNECT || |
387 | || dm_digtable->cursta_connectstate == DIG_STA_CONNECT) { | 381 | dm_digtable->cursta_cstate == DIG_STA_CONNECT) { |
388 | 382 | ||
389 | if (dm_digtable->cursta_connectstate != DIG_STA_DISCONNECT) { | 383 | if (dm_digtable->cursta_cstate != DIG_STA_DISCONNECT) { |
390 | dm_digtable->rssi_val_min = | 384 | dm_digtable->rssi_val_min = |
391 | rtl92c_dm_initial_gain_min_pwdb(hw); | 385 | rtl92c_dm_initial_gain_min_pwdb(hw); |
392 | rtl92c_dm_ctrl_initgain_by_rssi(hw); | 386 | rtl92c_dm_ctrl_initgain_by_rssi(hw); |
@@ -394,7 +388,7 @@ static void rtl92c_dm_initial_gain_sta(struct ieee80211_hw *hw) | |||
394 | } else { | 388 | } else { |
395 | dm_digtable->rssi_val_min = 0; | 389 | dm_digtable->rssi_val_min = 0; |
396 | dm_digtable->dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX; | 390 | dm_digtable->dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX; |
397 | dm_digtable->backoff_val = DM_DIG_BACKOFF_DEFAULT; | 391 | dm_digtable->back_val = DM_DIG_BACKOFF_DEFAULT; |
398 | dm_digtable->cur_igvalue = 0x20; | 392 | dm_digtable->cur_igvalue = 0x20; |
399 | dm_digtable->pre_igvalue = 0; | 393 | dm_digtable->pre_igvalue = 0; |
400 | rtl92c_dm_write_dig(hw); | 394 | rtl92c_dm_write_dig(hw); |
@@ -407,7 +401,7 @@ static void rtl92c_dm_cck_packet_detection_thresh(struct ieee80211_hw *hw) | |||
407 | struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw)); | 401 | struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw)); |
408 | struct dig_t *dm_digtable = &rtlpriv->dm_digtable; | 402 | struct dig_t *dm_digtable = &rtlpriv->dm_digtable; |
409 | 403 | ||
410 | if (dm_digtable->cursta_connectstate == DIG_STA_CONNECT) { | 404 | if (dm_digtable->cursta_cstate == DIG_STA_CONNECT) { |
411 | dm_digtable->rssi_val_min = rtl92c_dm_initial_gain_min_pwdb(hw); | 405 | dm_digtable->rssi_val_min = rtl92c_dm_initial_gain_min_pwdb(hw); |
412 | 406 | ||
413 | if (dm_digtable->pre_cck_pd_state == CCK_PD_STAGE_LowRssi) { | 407 | if (dm_digtable->pre_cck_pd_state == CCK_PD_STAGE_LowRssi) { |
@@ -484,15 +478,15 @@ static void rtl92c_dm_ctrl_initgain_by_twoport(struct ieee80211_hw *hw) | |||
484 | return; | 478 | return; |
485 | 479 | ||
486 | if (mac->link_state >= MAC80211_LINKED) | 480 | if (mac->link_state >= MAC80211_LINKED) |
487 | dm_digtable->cursta_connectstate = DIG_STA_CONNECT; | 481 | dm_digtable->cursta_cstate = DIG_STA_CONNECT; |
488 | else | 482 | else |
489 | dm_digtable->cursta_connectstate = DIG_STA_DISCONNECT; | 483 | dm_digtable->cursta_cstate = DIG_STA_DISCONNECT; |
490 | 484 | ||
491 | rtl92c_dm_initial_gain_sta(hw); | 485 | rtl92c_dm_initial_gain_sta(hw); |
492 | rtl92c_dm_initial_gain_multi_sta(hw); | 486 | rtl92c_dm_initial_gain_multi_sta(hw); |
493 | rtl92c_dm_cck_packet_detection_thresh(hw); | 487 | rtl92c_dm_cck_packet_detection_thresh(hw); |
494 | 488 | ||
495 | dm_digtable->presta_connectstate = dm_digtable->cursta_connectstate; | 489 | dm_digtable->presta_cstate = dm_digtable->cursta_cstate; |
496 | 490 | ||
497 | } | 491 | } |
498 | 492 | ||
@@ -526,9 +520,9 @@ void rtl92c_dm_write_dig(struct ieee80211_hw *hw) | |||
526 | struct dig_t *dm_digtable = &rtlpriv->dm_digtable; | 520 | struct dig_t *dm_digtable = &rtlpriv->dm_digtable; |
527 | 521 | ||
528 | RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, | 522 | RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, |
529 | "cur_igvalue = 0x%x, pre_igvalue = 0x%x, backoff_val = %d\n", | 523 | "cur_igvalue = 0x%x, pre_igvalue = 0x%x, back_val = %d\n", |
530 | dm_digtable->cur_igvalue, dm_digtable->pre_igvalue, | 524 | dm_digtable->cur_igvalue, dm_digtable->pre_igvalue, |
531 | dm_digtable->backoff_val); | 525 | dm_digtable->back_val); |
532 | 526 | ||
533 | dm_digtable->cur_igvalue += 2; | 527 | dm_digtable->cur_igvalue += 2; |
534 | if (dm_digtable->cur_igvalue > 0x3f) | 528 | if (dm_digtable->cur_igvalue > 0x3f) |
@@ -555,20 +549,18 @@ static void rtl92c_dm_pwdb_monitor(struct ieee80211_hw *hw) | |||
555 | return; | 549 | return; |
556 | 550 | ||
557 | if (tmpentry_max_pwdb != 0) { | 551 | if (tmpentry_max_pwdb != 0) { |
558 | rtlpriv->dm.entry_max_undecoratedsmoothed_pwdb = | 552 | rtlpriv->dm.entry_max_undec_sm_pwdb = tmpentry_max_pwdb; |
559 | tmpentry_max_pwdb; | ||
560 | } else { | 553 | } else { |
561 | rtlpriv->dm.entry_max_undecoratedsmoothed_pwdb = 0; | 554 | rtlpriv->dm.entry_max_undec_sm_pwdb = 0; |
562 | } | 555 | } |
563 | 556 | ||
564 | if (tmpentry_min_pwdb != 0xff) { | 557 | if (tmpentry_min_pwdb != 0xff) { |
565 | rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb = | 558 | rtlpriv->dm.entry_min_undec_sm_pwdb = tmpentry_min_pwdb; |
566 | tmpentry_min_pwdb; | ||
567 | } else { | 559 | } else { |
568 | rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb = 0; | 560 | rtlpriv->dm.entry_min_undec_sm_pwdb = 0; |
569 | } | 561 | } |
570 | 562 | ||
571 | h2c_parameter[2] = (u8) (rtlpriv->dm.undecorated_smoothed_pwdb & 0xFF); | 563 | h2c_parameter[2] = (u8) (rtlpriv->dm.undec_sm_pwdb & 0xFF); |
572 | h2c_parameter[0] = 0; | 564 | h2c_parameter[0] = 0; |
573 | 565 | ||
574 | rtl92c_fill_h2c_cmd(hw, H2C_RSSI_REPORT, 3, h2c_parameter); | 566 | rtl92c_fill_h2c_cmd(hw, H2C_RSSI_REPORT, 3, h2c_parameter); |
@@ -1160,7 +1152,7 @@ static void rtl92c_dm_refresh_rate_adaptive_mask(struct ieee80211_hw *hw) | |||
1160 | struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw)); | 1152 | struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw)); |
1161 | struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); | 1153 | struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); |
1162 | struct rate_adaptive *p_ra = &(rtlpriv->ra); | 1154 | struct rate_adaptive *p_ra = &(rtlpriv->ra); |
1163 | u32 low_rssithresh_for_ra, high_rssithresh_for_ra; | 1155 | u32 low_rssi_thresh, high_rssi_thresh; |
1164 | struct ieee80211_sta *sta = NULL; | 1156 | struct ieee80211_sta *sta = NULL; |
1165 | 1157 | ||
1166 | if (is_hal_stop(rtlhal)) { | 1158 | if (is_hal_stop(rtlhal)) { |
@@ -1179,35 +1171,33 @@ static void rtl92c_dm_refresh_rate_adaptive_mask(struct ieee80211_hw *hw) | |||
1179 | mac->opmode == NL80211_IFTYPE_STATION) { | 1171 | mac->opmode == NL80211_IFTYPE_STATION) { |
1180 | switch (p_ra->pre_ratr_state) { | 1172 | switch (p_ra->pre_ratr_state) { |
1181 | case DM_RATR_STA_HIGH: | 1173 | case DM_RATR_STA_HIGH: |
1182 | high_rssithresh_for_ra = 50; | 1174 | high_rssi_thresh = 50; |
1183 | low_rssithresh_for_ra = 20; | 1175 | low_rssi_thresh = 20; |
1184 | break; | 1176 | break; |
1185 | case DM_RATR_STA_MIDDLE: | 1177 | case DM_RATR_STA_MIDDLE: |
1186 | high_rssithresh_for_ra = 55; | 1178 | high_rssi_thresh = 55; |
1187 | low_rssithresh_for_ra = 20; | 1179 | low_rssi_thresh = 20; |
1188 | break; | 1180 | break; |
1189 | case DM_RATR_STA_LOW: | 1181 | case DM_RATR_STA_LOW: |
1190 | high_rssithresh_for_ra = 50; | 1182 | high_rssi_thresh = 50; |
1191 | low_rssithresh_for_ra = 25; | 1183 | low_rssi_thresh = 25; |
1192 | break; | 1184 | break; |
1193 | default: | 1185 | default: |
1194 | high_rssithresh_for_ra = 50; | 1186 | high_rssi_thresh = 50; |
1195 | low_rssithresh_for_ra = 20; | 1187 | low_rssi_thresh = 20; |
1196 | break; | 1188 | break; |
1197 | } | 1189 | } |
1198 | 1190 | ||
1199 | if (rtlpriv->dm.undecorated_smoothed_pwdb > | 1191 | if (rtlpriv->dm.undec_sm_pwdb > (long)high_rssi_thresh) |
1200 | (long)high_rssithresh_for_ra) | ||
1201 | p_ra->ratr_state = DM_RATR_STA_HIGH; | 1192 | p_ra->ratr_state = DM_RATR_STA_HIGH; |
1202 | else if (rtlpriv->dm.undecorated_smoothed_pwdb > | 1193 | else if (rtlpriv->dm.undec_sm_pwdb > (long)low_rssi_thresh) |
1203 | (long)low_rssithresh_for_ra) | ||
1204 | p_ra->ratr_state = DM_RATR_STA_MIDDLE; | 1194 | p_ra->ratr_state = DM_RATR_STA_MIDDLE; |
1205 | else | 1195 | else |
1206 | p_ra->ratr_state = DM_RATR_STA_LOW; | 1196 | p_ra->ratr_state = DM_RATR_STA_LOW; |
1207 | 1197 | ||
1208 | if (p_ra->pre_ratr_state != p_ra->ratr_state) { | 1198 | if (p_ra->pre_ratr_state != p_ra->ratr_state) { |
1209 | RT_TRACE(rtlpriv, COMP_RATE, DBG_LOUD, "RSSI = %ld\n", | 1199 | RT_TRACE(rtlpriv, COMP_RATE, DBG_LOUD, "RSSI = %ld\n", |
1210 | rtlpriv->dm.undecorated_smoothed_pwdb); | 1200 | rtlpriv->dm.undec_sm_pwdb); |
1211 | RT_TRACE(rtlpriv, COMP_RATE, DBG_LOUD, | 1201 | RT_TRACE(rtlpriv, COMP_RATE, DBG_LOUD, |
1212 | "RSSI_LEVEL = %d\n", p_ra->ratr_state); | 1202 | "RSSI_LEVEL = %d\n", p_ra->ratr_state); |
1213 | RT_TRACE(rtlpriv, COMP_RATE, DBG_LOUD, | 1203 | RT_TRACE(rtlpriv, COMP_RATE, DBG_LOUD, |
@@ -1315,7 +1305,7 @@ static void rtl92c_dm_dynamic_bb_powersaving(struct ieee80211_hw *hw) | |||
1315 | struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw)); | 1305 | struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw)); |
1316 | 1306 | ||
1317 | if (((mac->link_state == MAC80211_NOLINK)) && | 1307 | if (((mac->link_state == MAC80211_NOLINK)) && |
1318 | (rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb == 0)) { | 1308 | (rtlpriv->dm.entry_min_undec_sm_pwdb == 0)) { |
1319 | dm_pstable->rssi_val_min = 0; | 1309 | dm_pstable->rssi_val_min = 0; |
1320 | RT_TRACE(rtlpriv, DBG_LOUD, DBG_LOUD, "Not connected to any\n"); | 1310 | RT_TRACE(rtlpriv, DBG_LOUD, DBG_LOUD, "Not connected to any\n"); |
1321 | } | 1311 | } |
@@ -1323,20 +1313,19 @@ static void rtl92c_dm_dynamic_bb_powersaving(struct ieee80211_hw *hw) | |||
1323 | if (mac->link_state == MAC80211_LINKED) { | 1313 | if (mac->link_state == MAC80211_LINKED) { |
1324 | if (mac->opmode == NL80211_IFTYPE_ADHOC) { | 1314 | if (mac->opmode == NL80211_IFTYPE_ADHOC) { |
1325 | dm_pstable->rssi_val_min = | 1315 | dm_pstable->rssi_val_min = |
1326 | rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb; | 1316 | rtlpriv->dm.entry_min_undec_sm_pwdb; |
1327 | RT_TRACE(rtlpriv, DBG_LOUD, DBG_LOUD, | 1317 | RT_TRACE(rtlpriv, DBG_LOUD, DBG_LOUD, |
1328 | "AP Client PWDB = 0x%lx\n", | 1318 | "AP Client PWDB = 0x%lx\n", |
1329 | dm_pstable->rssi_val_min); | 1319 | dm_pstable->rssi_val_min); |
1330 | } else { | 1320 | } else { |
1331 | dm_pstable->rssi_val_min = | 1321 | dm_pstable->rssi_val_min = rtlpriv->dm.undec_sm_pwdb; |
1332 | rtlpriv->dm.undecorated_smoothed_pwdb; | ||
1333 | RT_TRACE(rtlpriv, DBG_LOUD, DBG_LOUD, | 1322 | RT_TRACE(rtlpriv, DBG_LOUD, DBG_LOUD, |
1334 | "STA Default Port PWDB = 0x%lx\n", | 1323 | "STA Default Port PWDB = 0x%lx\n", |
1335 | dm_pstable->rssi_val_min); | 1324 | dm_pstable->rssi_val_min); |
1336 | } | 1325 | } |
1337 | } else { | 1326 | } else { |
1338 | dm_pstable->rssi_val_min = | 1327 | dm_pstable->rssi_val_min = |
1339 | rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb; | 1328 | rtlpriv->dm.entry_min_undec_sm_pwdb; |
1340 | 1329 | ||
1341 | RT_TRACE(rtlpriv, DBG_LOUD, DBG_LOUD, | 1330 | RT_TRACE(rtlpriv, DBG_LOUD, DBG_LOUD, |
1342 | "AP Ext Port PWDB = 0x%lx\n", | 1331 | "AP Ext Port PWDB = 0x%lx\n", |
@@ -1368,7 +1357,7 @@ void rtl92c_dm_dynamic_txpower(struct ieee80211_hw *hw) | |||
1368 | struct rtl_priv *rtlpriv = rtl_priv(hw); | 1357 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
1369 | struct rtl_phy *rtlphy = &(rtlpriv->phy); | 1358 | struct rtl_phy *rtlphy = &(rtlpriv->phy); |
1370 | struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); | 1359 | struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); |
1371 | long undecorated_smoothed_pwdb; | 1360 | long undec_sm_pwdb; |
1372 | 1361 | ||
1373 | if (!rtlpriv->dm.dynamic_txpower_enable) | 1362 | if (!rtlpriv->dm.dynamic_txpower_enable) |
1374 | return; | 1363 | return; |
@@ -1379,7 +1368,7 @@ void rtl92c_dm_dynamic_txpower(struct ieee80211_hw *hw) | |||
1379 | } | 1368 | } |
1380 | 1369 | ||
1381 | if ((mac->link_state < MAC80211_LINKED) && | 1370 | if ((mac->link_state < MAC80211_LINKED) && |
1382 | (rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb == 0)) { | 1371 | (rtlpriv->dm.entry_min_undec_sm_pwdb == 0)) { |
1383 | RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE, | 1372 | RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE, |
1384 | "Not connected to any\n"); | 1373 | "Not connected to any\n"); |
1385 | 1374 | ||
@@ -1391,41 +1380,35 @@ void rtl92c_dm_dynamic_txpower(struct ieee80211_hw *hw) | |||
1391 | 1380 | ||
1392 | if (mac->link_state >= MAC80211_LINKED) { | 1381 | if (mac->link_state >= MAC80211_LINKED) { |
1393 | if (mac->opmode == NL80211_IFTYPE_ADHOC) { | 1382 | if (mac->opmode == NL80211_IFTYPE_ADHOC) { |
1394 | undecorated_smoothed_pwdb = | 1383 | undec_sm_pwdb = rtlpriv->dm.entry_min_undec_sm_pwdb; |
1395 | rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb; | ||
1396 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, | 1384 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, |
1397 | "AP Client PWDB = 0x%lx\n", | 1385 | "AP Client PWDB = 0x%lx\n", |
1398 | undecorated_smoothed_pwdb); | 1386 | undec_sm_pwdb); |
1399 | } else { | 1387 | } else { |
1400 | undecorated_smoothed_pwdb = | 1388 | undec_sm_pwdb = rtlpriv->dm.undec_sm_pwdb; |
1401 | rtlpriv->dm.undecorated_smoothed_pwdb; | ||
1402 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, | 1389 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, |
1403 | "STA Default Port PWDB = 0x%lx\n", | 1390 | "STA Default Port PWDB = 0x%lx\n", |
1404 | undecorated_smoothed_pwdb); | 1391 | undec_sm_pwdb); |
1405 | } | 1392 | } |
1406 | } else { | 1393 | } else { |
1407 | undecorated_smoothed_pwdb = | 1394 | undec_sm_pwdb = rtlpriv->dm.entry_min_undec_sm_pwdb; |
1408 | rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb; | ||
1409 | 1395 | ||
1410 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, | 1396 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, |
1411 | "AP Ext Port PWDB = 0x%lx\n", | 1397 | "AP Ext Port PWDB = 0x%lx\n", |
1412 | undecorated_smoothed_pwdb); | 1398 | undec_sm_pwdb); |
1413 | } | 1399 | } |
1414 | 1400 | ||
1415 | if (undecorated_smoothed_pwdb >= TX_POWER_NEAR_FIELD_THRESH_LVL2) { | 1401 | if (undec_sm_pwdb >= TX_POWER_NEAR_FIELD_THRESH_LVL2) { |
1416 | rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_LEVEL1; | 1402 | rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_LEVEL1; |
1417 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, | 1403 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, |
1418 | "TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x0)\n"); | 1404 | "TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x0)\n"); |
1419 | } else if ((undecorated_smoothed_pwdb < | 1405 | } else if ((undec_sm_pwdb < (TX_POWER_NEAR_FIELD_THRESH_LVL2 - 3)) && |
1420 | (TX_POWER_NEAR_FIELD_THRESH_LVL2 - 3)) && | 1406 | (undec_sm_pwdb >= TX_POWER_NEAR_FIELD_THRESH_LVL1)) { |
1421 | (undecorated_smoothed_pwdb >= | ||
1422 | TX_POWER_NEAR_FIELD_THRESH_LVL1)) { | ||
1423 | 1407 | ||
1424 | rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_LEVEL1; | 1408 | rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_LEVEL1; |
1425 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, | 1409 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, |
1426 | "TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x10)\n"); | 1410 | "TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x10)\n"); |
1427 | } else if (undecorated_smoothed_pwdb < | 1411 | } else if (undec_sm_pwdb < (TX_POWER_NEAR_FIELD_THRESH_LVL1 - 5)) { |
1428 | (TX_POWER_NEAR_FIELD_THRESH_LVL1 - 5)) { | ||
1429 | rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL; | 1412 | rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL; |
1430 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, | 1413 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, |
1431 | "TXHIGHPWRLEVEL_NORMAL\n"); | 1414 | "TXHIGHPWRLEVEL_NORMAL\n"); |
@@ -1473,48 +1456,46 @@ u8 rtl92c_bt_rssi_state_change(struct ieee80211_hw *hw) | |||
1473 | { | 1456 | { |
1474 | struct rtl_priv *rtlpriv = rtl_priv(hw); | 1457 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
1475 | struct rtl_pci_priv *rtlpcipriv = rtl_pcipriv(hw); | 1458 | struct rtl_pci_priv *rtlpcipriv = rtl_pcipriv(hw); |
1476 | long undecorated_smoothed_pwdb; | 1459 | long undec_sm_pwdb; |
1477 | u8 curr_bt_rssi_state = 0x00; | 1460 | u8 curr_bt_rssi_state = 0x00; |
1478 | 1461 | ||
1479 | if (rtlpriv->mac80211.link_state == MAC80211_LINKED) { | 1462 | if (rtlpriv->mac80211.link_state == MAC80211_LINKED) { |
1480 | undecorated_smoothed_pwdb = | 1463 | undec_sm_pwdb = GET_UNDECORATED_AVERAGE_RSSI(rtlpriv); |
1481 | GET_UNDECORATED_AVERAGE_RSSI(rtlpriv); | ||
1482 | } else { | 1464 | } else { |
1483 | if (rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb == 0) | 1465 | if (rtlpriv->dm.entry_min_undec_sm_pwdb == 0) |
1484 | undecorated_smoothed_pwdb = 100; | 1466 | undec_sm_pwdb = 100; |
1485 | else | 1467 | else |
1486 | undecorated_smoothed_pwdb = | 1468 | undec_sm_pwdb = rtlpriv->dm.entry_min_undec_sm_pwdb; |
1487 | rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb; | ||
1488 | } | 1469 | } |
1489 | 1470 | ||
1490 | /* Check RSSI to determine HighPower/NormalPower state for | 1471 | /* Check RSSI to determine HighPower/NormalPower state for |
1491 | * BT coexistence. */ | 1472 | * BT coexistence. */ |
1492 | if (undecorated_smoothed_pwdb >= 67) | 1473 | if (undec_sm_pwdb >= 67) |
1493 | curr_bt_rssi_state &= (~BT_RSSI_STATE_NORMAL_POWER); | 1474 | curr_bt_rssi_state &= (~BT_RSSI_STATE_NORMAL_POWER); |
1494 | else if (undecorated_smoothed_pwdb < 62) | 1475 | else if (undec_sm_pwdb < 62) |
1495 | curr_bt_rssi_state |= BT_RSSI_STATE_NORMAL_POWER; | 1476 | curr_bt_rssi_state |= BT_RSSI_STATE_NORMAL_POWER; |
1496 | 1477 | ||
1497 | /* Check RSSI to determine AMPDU setting for BT coexistence. */ | 1478 | /* Check RSSI to determine AMPDU setting for BT coexistence. */ |
1498 | if (undecorated_smoothed_pwdb >= 40) | 1479 | if (undec_sm_pwdb >= 40) |
1499 | curr_bt_rssi_state &= (~BT_RSSI_STATE_AMDPU_OFF); | 1480 | curr_bt_rssi_state &= (~BT_RSSI_STATE_AMDPU_OFF); |
1500 | else if (undecorated_smoothed_pwdb <= 32) | 1481 | else if (undec_sm_pwdb <= 32) |
1501 | curr_bt_rssi_state |= BT_RSSI_STATE_AMDPU_OFF; | 1482 | curr_bt_rssi_state |= BT_RSSI_STATE_AMDPU_OFF; |
1502 | 1483 | ||
1503 | /* Marked RSSI state. It will be used to determine BT coexistence | 1484 | /* Marked RSSI state. It will be used to determine BT coexistence |
1504 | * setting later. */ | 1485 | * setting later. */ |
1505 | if (undecorated_smoothed_pwdb < 35) | 1486 | if (undec_sm_pwdb < 35) |
1506 | curr_bt_rssi_state |= BT_RSSI_STATE_SPECIAL_LOW; | 1487 | curr_bt_rssi_state |= BT_RSSI_STATE_SPECIAL_LOW; |
1507 | else | 1488 | else |
1508 | curr_bt_rssi_state &= (~BT_RSSI_STATE_SPECIAL_LOW); | 1489 | curr_bt_rssi_state &= (~BT_RSSI_STATE_SPECIAL_LOW); |
1509 | 1490 | ||
1510 | /* Set Tx Power according to BT status. */ | 1491 | /* Set Tx Power according to BT status. */ |
1511 | if (undecorated_smoothed_pwdb >= 30) | 1492 | if (undec_sm_pwdb >= 30) |
1512 | curr_bt_rssi_state |= BT_RSSI_STATE_TXPOWER_LOW; | 1493 | curr_bt_rssi_state |= BT_RSSI_STATE_TXPOWER_LOW; |
1513 | else if (undecorated_smoothed_pwdb < 25) | 1494 | else if (undec_sm_pwdb < 25) |
1514 | curr_bt_rssi_state &= (~BT_RSSI_STATE_TXPOWER_LOW); | 1495 | curr_bt_rssi_state &= (~BT_RSSI_STATE_TXPOWER_LOW); |
1515 | 1496 | ||
1516 | /* Check BT state related to BT_Idle in B/G mode. */ | 1497 | /* Check BT state related to BT_Idle in B/G mode. */ |
1517 | if (undecorated_smoothed_pwdb < 15) | 1498 | if (undec_sm_pwdb < 15) |
1518 | curr_bt_rssi_state |= BT_RSSI_STATE_BG_EDCA_LOW; | 1499 | curr_bt_rssi_state |= BT_RSSI_STATE_BG_EDCA_LOW; |
1519 | else | 1500 | else |
1520 | curr_bt_rssi_state &= (~BT_RSSI_STATE_BG_EDCA_LOW); | 1501 | curr_bt_rssi_state &= (~BT_RSSI_STATE_BG_EDCA_LOW); |
diff --git a/drivers/net/wireless/rtlwifi/rtl8192c/phy_common.c b/drivers/net/wireless/rtlwifi/rtl8192c/phy_common.c index 6ae2268e0e54..1d5d3604e3e0 100644 --- a/drivers/net/wireless/rtlwifi/rtl8192c/phy_common.c +++ b/drivers/net/wireless/rtlwifi/rtl8192c/phy_common.c | |||
@@ -34,9 +34,6 @@ | |||
34 | #include "dm_common.h" | 34 | #include "dm_common.h" |
35 | #include "phy_common.h" | 35 | #include "phy_common.h" |
36 | 36 | ||
37 | /* Define macro to shorten lines */ | ||
38 | #define MCS_TXPWR mcs_txpwrlevel_origoffset | ||
39 | |||
40 | u32 rtl92c_phy_query_bb_reg(struct ieee80211_hw *hw, u32 regaddr, u32 bitmask) | 37 | u32 rtl92c_phy_query_bb_reg(struct ieee80211_hw *hw, u32 regaddr, u32 bitmask) |
41 | { | 38 | { |
42 | struct rtl_priv *rtlpriv = rtl_priv(hw); | 39 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
@@ -138,13 +135,13 @@ u32 _rtl92c_phy_rf_serial_read(struct ieee80211_hw *hw, | |||
138 | rfpi_enable = (u8) rtl_get_bbreg(hw, RFPGA0_XB_HSSIPARAMETER1, | 135 | rfpi_enable = (u8) rtl_get_bbreg(hw, RFPGA0_XB_HSSIPARAMETER1, |
139 | BIT(8)); | 136 | BIT(8)); |
140 | if (rfpi_enable) | 137 | if (rfpi_enable) |
141 | retvalue = rtl_get_bbreg(hw, pphyreg->rflssi_readbackpi, | 138 | retvalue = rtl_get_bbreg(hw, pphyreg->rf_rbpi, |
142 | BLSSIREADBACKDATA); | 139 | BLSSIREADBACKDATA); |
143 | else | 140 | else |
144 | retvalue = rtl_get_bbreg(hw, pphyreg->rflssi_readback, | 141 | retvalue = rtl_get_bbreg(hw, pphyreg->rf_rb, |
145 | BLSSIREADBACKDATA); | 142 | BLSSIREADBACKDATA); |
146 | RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, "RFR-%d Addr[0x%x]=0x%x\n", | 143 | RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, "RFR-%d Addr[0x%x]=0x%x\n", |
147 | rfpath, pphyreg->rflssi_readback, retvalue); | 144 | rfpath, pphyreg->rf_rb, retvalue); |
148 | return retvalue; | 145 | return retvalue; |
149 | } | 146 | } |
150 | EXPORT_SYMBOL(_rtl92c_phy_rf_serial_read); | 147 | EXPORT_SYMBOL(_rtl92c_phy_rf_serial_read); |
@@ -290,11 +287,11 @@ void _rtl92c_store_pwrIndex_diffrate_offset(struct ieee80211_hw *hw, | |||
290 | else | 287 | else |
291 | return; | 288 | return; |
292 | 289 | ||
293 | rtlphy->MCS_TXPWR[rtlphy->pwrgroup_cnt][index] = data; | 290 | rtlphy->mcs_offset[rtlphy->pwrgroup_cnt][index] = data; |
294 | RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, | 291 | RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, |
295 | "MCSTxPowerLevelOriginalOffset[%d][%d] = 0x%x\n", | 292 | "MCSTxPowerLevelOriginalOffset[%d][%d] = 0x%x\n", |
296 | rtlphy->pwrgroup_cnt, index, | 293 | rtlphy->pwrgroup_cnt, index, |
297 | rtlphy->MCS_TXPWR[rtlphy->pwrgroup_cnt][index]); | 294 | rtlphy->mcs_offset[rtlphy->pwrgroup_cnt][index]); |
298 | 295 | ||
299 | if (index == 13) | 296 | if (index == 13) |
300 | rtlphy->pwrgroup_cnt++; | 297 | rtlphy->pwrgroup_cnt++; |
@@ -374,14 +371,10 @@ void _rtl92c_phy_init_bb_rf_register_definition(struct ieee80211_hw *hw) | |||
374 | rtlphy->phyreg_def[RF90_PATH_A].rfhssi_para2 = RFPGA0_XA_HSSIPARAMETER2; | 371 | rtlphy->phyreg_def[RF90_PATH_A].rfhssi_para2 = RFPGA0_XA_HSSIPARAMETER2; |
375 | rtlphy->phyreg_def[RF90_PATH_B].rfhssi_para2 = RFPGA0_XB_HSSIPARAMETER2; | 372 | rtlphy->phyreg_def[RF90_PATH_B].rfhssi_para2 = RFPGA0_XB_HSSIPARAMETER2; |
376 | 373 | ||
377 | rtlphy->phyreg_def[RF90_PATH_A].rfswitch_control = | 374 | rtlphy->phyreg_def[RF90_PATH_A].rfsw_ctrl = RFPGA0_XAB_SWITCHCONTROL; |
378 | RFPGA0_XAB_SWITCHCONTROL; | 375 | rtlphy->phyreg_def[RF90_PATH_B].rfsw_ctrl = RFPGA0_XAB_SWITCHCONTROL; |
379 | rtlphy->phyreg_def[RF90_PATH_B].rfswitch_control = | 376 | rtlphy->phyreg_def[RF90_PATH_C].rfsw_ctrl = RFPGA0_XCD_SWITCHCONTROL; |
380 | RFPGA0_XAB_SWITCHCONTROL; | 377 | rtlphy->phyreg_def[RF90_PATH_D].rfsw_ctrl = RFPGA0_XCD_SWITCHCONTROL; |
381 | rtlphy->phyreg_def[RF90_PATH_C].rfswitch_control = | ||
382 | RFPGA0_XCD_SWITCHCONTROL; | ||
383 | rtlphy->phyreg_def[RF90_PATH_D].rfswitch_control = | ||
384 | RFPGA0_XCD_SWITCHCONTROL; | ||
385 | 378 | ||
386 | rtlphy->phyreg_def[RF90_PATH_A].rfagc_control1 = ROFDM0_XAAGCCORE1; | 379 | rtlphy->phyreg_def[RF90_PATH_A].rfagc_control1 = ROFDM0_XAAGCCORE1; |
387 | rtlphy->phyreg_def[RF90_PATH_B].rfagc_control1 = ROFDM0_XBAGCCORE1; | 380 | rtlphy->phyreg_def[RF90_PATH_B].rfagc_control1 = ROFDM0_XBAGCCORE1; |
@@ -393,47 +386,33 @@ void _rtl92c_phy_init_bb_rf_register_definition(struct ieee80211_hw *hw) | |||
393 | rtlphy->phyreg_def[RF90_PATH_C].rfagc_control2 = ROFDM0_XCAGCCORE2; | 386 | rtlphy->phyreg_def[RF90_PATH_C].rfagc_control2 = ROFDM0_XCAGCCORE2; |
394 | rtlphy->phyreg_def[RF90_PATH_D].rfagc_control2 = ROFDM0_XDAGCCORE2; | 387 | rtlphy->phyreg_def[RF90_PATH_D].rfagc_control2 = ROFDM0_XDAGCCORE2; |
395 | 388 | ||
396 | rtlphy->phyreg_def[RF90_PATH_A].rfrxiq_imbalance = | 389 | rtlphy->phyreg_def[RF90_PATH_A].rfrxiq_imbal = ROFDM0_XARXIQIMBALANCE; |
397 | ROFDM0_XARXIQIMBALANCE; | 390 | rtlphy->phyreg_def[RF90_PATH_B].rfrxiq_imbal = ROFDM0_XBRXIQIMBALANCE; |
398 | rtlphy->phyreg_def[RF90_PATH_B].rfrxiq_imbalance = | 391 | rtlphy->phyreg_def[RF90_PATH_C].rfrxiq_imbal = ROFDM0_XCRXIQIMBANLANCE; |
399 | ROFDM0_XBRXIQIMBALANCE; | 392 | rtlphy->phyreg_def[RF90_PATH_D].rfrxiq_imbal = ROFDM0_XDRXIQIMBALANCE; |
400 | rtlphy->phyreg_def[RF90_PATH_C].rfrxiq_imbalance = | ||
401 | ROFDM0_XCRXIQIMBANLANCE; | ||
402 | rtlphy->phyreg_def[RF90_PATH_D].rfrxiq_imbalance = | ||
403 | ROFDM0_XDRXIQIMBALANCE; | ||
404 | 393 | ||
405 | rtlphy->phyreg_def[RF90_PATH_A].rfrx_afe = ROFDM0_XARXAFE; | 394 | rtlphy->phyreg_def[RF90_PATH_A].rfrx_afe = ROFDM0_XARXAFE; |
406 | rtlphy->phyreg_def[RF90_PATH_B].rfrx_afe = ROFDM0_XBRXAFE; | 395 | rtlphy->phyreg_def[RF90_PATH_B].rfrx_afe = ROFDM0_XBRXAFE; |
407 | rtlphy->phyreg_def[RF90_PATH_C].rfrx_afe = ROFDM0_XCRXAFE; | 396 | rtlphy->phyreg_def[RF90_PATH_C].rfrx_afe = ROFDM0_XCRXAFE; |
408 | rtlphy->phyreg_def[RF90_PATH_D].rfrx_afe = ROFDM0_XDRXAFE; | 397 | rtlphy->phyreg_def[RF90_PATH_D].rfrx_afe = ROFDM0_XDRXAFE; |
409 | 398 | ||
410 | rtlphy->phyreg_def[RF90_PATH_A].rftxiq_imbalance = | 399 | rtlphy->phyreg_def[RF90_PATH_A].rftxiq_imbal = ROFDM0_XATXIQIMBALANCE; |
411 | ROFDM0_XATXIQIMBALANCE; | 400 | rtlphy->phyreg_def[RF90_PATH_B].rftxiq_imbal = ROFDM0_XBTXIQIMBALANCE; |
412 | rtlphy->phyreg_def[RF90_PATH_B].rftxiq_imbalance = | 401 | rtlphy->phyreg_def[RF90_PATH_C].rftxiq_imbal = ROFDM0_XCTXIQIMBALANCE; |
413 | ROFDM0_XBTXIQIMBALANCE; | 402 | rtlphy->phyreg_def[RF90_PATH_D].rftxiq_imbal = ROFDM0_XDTXIQIMBALANCE; |
414 | rtlphy->phyreg_def[RF90_PATH_C].rftxiq_imbalance = | ||
415 | ROFDM0_XCTXIQIMBALANCE; | ||
416 | rtlphy->phyreg_def[RF90_PATH_D].rftxiq_imbalance = | ||
417 | ROFDM0_XDTXIQIMBALANCE; | ||
418 | 403 | ||
419 | rtlphy->phyreg_def[RF90_PATH_A].rftx_afe = ROFDM0_XATXAFE; | 404 | rtlphy->phyreg_def[RF90_PATH_A].rftx_afe = ROFDM0_XATXAFE; |
420 | rtlphy->phyreg_def[RF90_PATH_B].rftx_afe = ROFDM0_XBTXAFE; | 405 | rtlphy->phyreg_def[RF90_PATH_B].rftx_afe = ROFDM0_XBTXAFE; |
421 | rtlphy->phyreg_def[RF90_PATH_C].rftx_afe = ROFDM0_XCTXAFE; | 406 | rtlphy->phyreg_def[RF90_PATH_C].rftx_afe = ROFDM0_XCTXAFE; |
422 | rtlphy->phyreg_def[RF90_PATH_D].rftx_afe = ROFDM0_XDTXAFE; | 407 | rtlphy->phyreg_def[RF90_PATH_D].rftx_afe = ROFDM0_XDTXAFE; |
423 | 408 | ||
424 | rtlphy->phyreg_def[RF90_PATH_A].rflssi_readback = | 409 | rtlphy->phyreg_def[RF90_PATH_A].rf_rb = RFPGA0_XA_LSSIREADBACK; |
425 | RFPGA0_XA_LSSIREADBACK; | 410 | rtlphy->phyreg_def[RF90_PATH_B].rf_rb = RFPGA0_XB_LSSIREADBACK; |
426 | rtlphy->phyreg_def[RF90_PATH_B].rflssi_readback = | 411 | rtlphy->phyreg_def[RF90_PATH_C].rf_rb = RFPGA0_XC_LSSIREADBACK; |
427 | RFPGA0_XB_LSSIREADBACK; | 412 | rtlphy->phyreg_def[RF90_PATH_D].rf_rb = RFPGA0_XD_LSSIREADBACK; |
428 | rtlphy->phyreg_def[RF90_PATH_C].rflssi_readback = | 413 | |
429 | RFPGA0_XC_LSSIREADBACK; | 414 | rtlphy->phyreg_def[RF90_PATH_A].rf_rbpi = TRANSCEIVEA_HSPI_READBACK; |
430 | rtlphy->phyreg_def[RF90_PATH_D].rflssi_readback = | 415 | rtlphy->phyreg_def[RF90_PATH_B].rf_rbpi = TRANSCEIVEB_HSPI_READBACK; |
431 | RFPGA0_XD_LSSIREADBACK; | ||
432 | |||
433 | rtlphy->phyreg_def[RF90_PATH_A].rflssi_readbackpi = | ||
434 | TRANSCEIVEA_HSPI_READBACK; | ||
435 | rtlphy->phyreg_def[RF90_PATH_B].rflssi_readbackpi = | ||
436 | TRANSCEIVEB_HSPI_READBACK; | ||
437 | 416 | ||
438 | } | 417 | } |
439 | EXPORT_SYMBOL(_rtl92c_phy_init_bb_rf_register_definition); | 418 | EXPORT_SYMBOL(_rtl92c_phy_init_bb_rf_register_definition); |
diff --git a/drivers/net/wireless/rtlwifi/rtl8192ce/dm.c b/drivers/net/wireless/rtlwifi/rtl8192ce/dm.c index 27b3af880d96..74f9c083b80d 100644 --- a/drivers/net/wireless/rtlwifi/rtl8192ce/dm.c +++ b/drivers/net/wireless/rtlwifi/rtl8192ce/dm.c | |||
@@ -41,7 +41,7 @@ void rtl92ce_dm_dynamic_txpower(struct ieee80211_hw *hw) | |||
41 | struct rtl_priv *rtlpriv = rtl_priv(hw); | 41 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
42 | struct rtl_phy *rtlphy = &(rtlpriv->phy); | 42 | struct rtl_phy *rtlphy = &(rtlpriv->phy); |
43 | struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); | 43 | struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); |
44 | long undecorated_smoothed_pwdb; | 44 | long undec_sm_pwdb; |
45 | 45 | ||
46 | if (!rtlpriv->dm.dynamic_txpower_enable) | 46 | if (!rtlpriv->dm.dynamic_txpower_enable) |
47 | return; | 47 | return; |
@@ -52,7 +52,7 @@ void rtl92ce_dm_dynamic_txpower(struct ieee80211_hw *hw) | |||
52 | } | 52 | } |
53 | 53 | ||
54 | if ((mac->link_state < MAC80211_LINKED) && | 54 | if ((mac->link_state < MAC80211_LINKED) && |
55 | (rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb == 0)) { | 55 | (rtlpriv->dm.entry_min_undec_sm_pwdb == 0)) { |
56 | RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE, | 56 | RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE, |
57 | "Not connected to any\n"); | 57 | "Not connected to any\n"); |
58 | 58 | ||
@@ -64,41 +64,35 @@ void rtl92ce_dm_dynamic_txpower(struct ieee80211_hw *hw) | |||
64 | 64 | ||
65 | if (mac->link_state >= MAC80211_LINKED) { | 65 | if (mac->link_state >= MAC80211_LINKED) { |
66 | if (mac->opmode == NL80211_IFTYPE_ADHOC) { | 66 | if (mac->opmode == NL80211_IFTYPE_ADHOC) { |
67 | undecorated_smoothed_pwdb = | 67 | undec_sm_pwdb = rtlpriv->dm.entry_min_undec_sm_pwdb; |
68 | rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb; | ||
69 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, | 68 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, |
70 | "AP Client PWDB = 0x%lx\n", | 69 | "AP Client PWDB = 0x%lx\n", |
71 | undecorated_smoothed_pwdb); | 70 | undec_sm_pwdb); |
72 | } else { | 71 | } else { |
73 | undecorated_smoothed_pwdb = | 72 | undec_sm_pwdb = rtlpriv->dm.undec_sm_pwdb; |
74 | rtlpriv->dm.undecorated_smoothed_pwdb; | ||
75 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, | 73 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, |
76 | "STA Default Port PWDB = 0x%lx\n", | 74 | "STA Default Port PWDB = 0x%lx\n", |
77 | undecorated_smoothed_pwdb); | 75 | undec_sm_pwdb); |
78 | } | 76 | } |
79 | } else { | 77 | } else { |
80 | undecorated_smoothed_pwdb = | 78 | undec_sm_pwdb = rtlpriv->dm.entry_min_undec_sm_pwdb; |
81 | rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb; | ||
82 | 79 | ||
83 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, | 80 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, |
84 | "AP Ext Port PWDB = 0x%lx\n", | 81 | "AP Ext Port PWDB = 0x%lx\n", |
85 | undecorated_smoothed_pwdb); | 82 | undec_sm_pwdb); |
86 | } | 83 | } |
87 | 84 | ||
88 | if (undecorated_smoothed_pwdb >= TX_POWER_NEAR_FIELD_THRESH_LVL2) { | 85 | if (undec_sm_pwdb >= TX_POWER_NEAR_FIELD_THRESH_LVL2) { |
89 | rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_LEVEL1; | 86 | rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_LEVEL1; |
90 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, | 87 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, |
91 | "TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x0)\n"); | 88 | "TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x0)\n"); |
92 | } else if ((undecorated_smoothed_pwdb < | 89 | } else if ((undec_sm_pwdb < (TX_POWER_NEAR_FIELD_THRESH_LVL2 - 3)) && |
93 | (TX_POWER_NEAR_FIELD_THRESH_LVL2 - 3)) && | 90 | (undec_sm_pwdb >= TX_POWER_NEAR_FIELD_THRESH_LVL1)) { |
94 | (undecorated_smoothed_pwdb >= | ||
95 | TX_POWER_NEAR_FIELD_THRESH_LVL1)) { | ||
96 | 91 | ||
97 | rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_LEVEL1; | 92 | rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_LEVEL1; |
98 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, | 93 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, |
99 | "TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x10)\n"); | 94 | "TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x10)\n"); |
100 | } else if (undecorated_smoothed_pwdb < | 95 | } else if (undec_sm_pwdb < (TX_POWER_NEAR_FIELD_THRESH_LVL1 - 5)) { |
101 | (TX_POWER_NEAR_FIELD_THRESH_LVL1 - 5)) { | ||
102 | rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL; | 96 | rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL; |
103 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, | 97 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, |
104 | "TXHIGHPWRLEVEL_NORMAL\n"); | 98 | "TXHIGHPWRLEVEL_NORMAL\n"); |
diff --git a/drivers/net/wireless/rtlwifi/rtl8192ce/hw.c b/drivers/net/wireless/rtlwifi/rtl8192ce/hw.c index 7dc7ac8e32b8..d1f34f6ffbdf 100644 --- a/drivers/net/wireless/rtlwifi/rtl8192ce/hw.c +++ b/drivers/net/wireless/rtlwifi/rtl8192ce/hw.c | |||
@@ -1403,9 +1403,9 @@ static void _rtl92ce_read_txpower_info_from_hwpg(struct ieee80211_hw *hw, | |||
1403 | tempval = hwinfo[EEPROM_TXPOWERHT40_2SDIFF + i]; | 1403 | tempval = hwinfo[EEPROM_TXPOWERHT40_2SDIFF + i]; |
1404 | else | 1404 | else |
1405 | tempval = EEPROM_DEFAULT_HT40_2SDIFF; | 1405 | tempval = EEPROM_DEFAULT_HT40_2SDIFF; |
1406 | rtlefuse->eeprom_chnlarea_txpwr_ht40_2sdiif[RF90_PATH_A][i] = | 1406 | rtlefuse->eprom_chnl_txpwr_ht40_2sdf[RF90_PATH_A][i] = |
1407 | (tempval & 0xf); | 1407 | (tempval & 0xf); |
1408 | rtlefuse->eeprom_chnlarea_txpwr_ht40_2sdiif[RF90_PATH_B][i] = | 1408 | rtlefuse->eprom_chnl_txpwr_ht40_2sdf[RF90_PATH_B][i] = |
1409 | ((tempval & 0xf0) >> 4); | 1409 | ((tempval & 0xf0) >> 4); |
1410 | } | 1410 | } |
1411 | 1411 | ||
@@ -1429,7 +1429,7 @@ static void _rtl92ce_read_txpower_info_from_hwpg(struct ieee80211_hw *hw, | |||
1429 | "RF(%d) EEPROM HT40 2S Diff Area(%d) = 0x%x\n", | 1429 | "RF(%d) EEPROM HT40 2S Diff Area(%d) = 0x%x\n", |
1430 | rf_path, i, | 1430 | rf_path, i, |
1431 | rtlefuse-> | 1431 | rtlefuse-> |
1432 | eeprom_chnlarea_txpwr_ht40_2sdiif[rf_path][i]); | 1432 | eprom_chnl_txpwr_ht40_2sdf[rf_path][i]); |
1433 | 1433 | ||
1434 | for (rf_path = 0; rf_path < 2; rf_path++) { | 1434 | for (rf_path = 0; rf_path < 2; rf_path++) { |
1435 | for (i = 0; i < 14; i++) { | 1435 | for (i = 0; i < 14; i++) { |
@@ -1444,14 +1444,14 @@ static void _rtl92ce_read_txpower_info_from_hwpg(struct ieee80211_hw *hw, | |||
1444 | if ((rtlefuse-> | 1444 | if ((rtlefuse-> |
1445 | eeprom_chnlarea_txpwr_ht40_1s[rf_path][index] - | 1445 | eeprom_chnlarea_txpwr_ht40_1s[rf_path][index] - |
1446 | rtlefuse-> | 1446 | rtlefuse-> |
1447 | eeprom_chnlarea_txpwr_ht40_2sdiif[rf_path][index]) | 1447 | eprom_chnl_txpwr_ht40_2sdf[rf_path][index]) |
1448 | > 0) { | 1448 | > 0) { |
1449 | rtlefuse->txpwrlevel_ht40_2s[rf_path][i] = | 1449 | rtlefuse->txpwrlevel_ht40_2s[rf_path][i] = |
1450 | rtlefuse-> | 1450 | rtlefuse-> |
1451 | eeprom_chnlarea_txpwr_ht40_1s[rf_path] | 1451 | eeprom_chnlarea_txpwr_ht40_1s[rf_path] |
1452 | [index] - | 1452 | [index] - |
1453 | rtlefuse-> | 1453 | rtlefuse-> |
1454 | eeprom_chnlarea_txpwr_ht40_2sdiif[rf_path] | 1454 | eprom_chnl_txpwr_ht40_2sdf[rf_path] |
1455 | [index]; | 1455 | [index]; |
1456 | } else { | 1456 | } else { |
1457 | rtlefuse->txpwrlevel_ht40_2s[rf_path][i] = 0; | 1457 | rtlefuse->txpwrlevel_ht40_2s[rf_path][i] = 0; |
@@ -2224,7 +2224,7 @@ static void rtl8192ce_bt_var_init(struct ieee80211_hw *hw) | |||
2224 | 2224 | ||
2225 | if (rtlpcipriv->bt_coexist.reg_bt_iso == 2) | 2225 | if (rtlpcipriv->bt_coexist.reg_bt_iso == 2) |
2226 | rtlpcipriv->bt_coexist.bt_ant_isolation = | 2226 | rtlpcipriv->bt_coexist.bt_ant_isolation = |
2227 | rtlpcipriv->bt_coexist.eeprom_bt_ant_isolation; | 2227 | rtlpcipriv->bt_coexist.eeprom_bt_ant_isol; |
2228 | else | 2228 | else |
2229 | rtlpcipriv->bt_coexist.bt_ant_isolation = | 2229 | rtlpcipriv->bt_coexist.bt_ant_isolation = |
2230 | rtlpcipriv->bt_coexist.reg_bt_iso; | 2230 | rtlpcipriv->bt_coexist.reg_bt_iso; |
@@ -2255,23 +2255,22 @@ void rtl8192ce_read_bt_coexist_info_from_hwpg(struct ieee80211_hw *hw, | |||
2255 | bool auto_load_fail, u8 *hwinfo) | 2255 | bool auto_load_fail, u8 *hwinfo) |
2256 | { | 2256 | { |
2257 | struct rtl_pci_priv *rtlpcipriv = rtl_pcipriv(hw); | 2257 | struct rtl_pci_priv *rtlpcipriv = rtl_pcipriv(hw); |
2258 | u8 value; | 2258 | u8 val; |
2259 | 2259 | ||
2260 | if (!auto_load_fail) { | 2260 | if (!auto_load_fail) { |
2261 | rtlpcipriv->bt_coexist.eeprom_bt_coexist = | 2261 | rtlpcipriv->bt_coexist.eeprom_bt_coexist = |
2262 | ((hwinfo[RF_OPTION1] & 0xe0) >> 5); | 2262 | ((hwinfo[RF_OPTION1] & 0xe0) >> 5); |
2263 | value = hwinfo[RF_OPTION4]; | 2263 | val = hwinfo[RF_OPTION4]; |
2264 | rtlpcipriv->bt_coexist.eeprom_bt_type = ((value & 0xe) >> 1); | 2264 | rtlpcipriv->bt_coexist.eeprom_bt_type = ((val & 0xe) >> 1); |
2265 | rtlpcipriv->bt_coexist.eeprom_bt_ant_num = (value & 0x1); | 2265 | rtlpcipriv->bt_coexist.eeprom_bt_ant_num = (val & 0x1); |
2266 | rtlpcipriv->bt_coexist.eeprom_bt_ant_isolation = | 2266 | rtlpcipriv->bt_coexist.eeprom_bt_ant_isol = ((val & 0x10) >> 4); |
2267 | ((value & 0x10) >> 4); | ||
2268 | rtlpcipriv->bt_coexist.eeprom_bt_radio_shared = | 2267 | rtlpcipriv->bt_coexist.eeprom_bt_radio_shared = |
2269 | ((value & 0x20) >> 5); | 2268 | ((val & 0x20) >> 5); |
2270 | } else { | 2269 | } else { |
2271 | rtlpcipriv->bt_coexist.eeprom_bt_coexist = 0; | 2270 | rtlpcipriv->bt_coexist.eeprom_bt_coexist = 0; |
2272 | rtlpcipriv->bt_coexist.eeprom_bt_type = BT_2WIRE; | 2271 | rtlpcipriv->bt_coexist.eeprom_bt_type = BT_2WIRE; |
2273 | rtlpcipriv->bt_coexist.eeprom_bt_ant_num = ANT_X2; | 2272 | rtlpcipriv->bt_coexist.eeprom_bt_ant_num = ANT_X2; |
2274 | rtlpcipriv->bt_coexist.eeprom_bt_ant_isolation = 0; | 2273 | rtlpcipriv->bt_coexist.eeprom_bt_ant_isol = 0; |
2275 | rtlpcipriv->bt_coexist.eeprom_bt_radio_shared = BT_RADIO_SHARED; | 2274 | rtlpcipriv->bt_coexist.eeprom_bt_radio_shared = BT_RADIO_SHARED; |
2276 | } | 2275 | } |
2277 | 2276 | ||
diff --git a/drivers/net/wireless/rtlwifi/rtl8192ce/rf.c b/drivers/net/wireless/rtlwifi/rtl8192ce/rf.c index 54c7614958a8..a9c406f33d0a 100644 --- a/drivers/net/wireless/rtlwifi/rtl8192ce/rf.c +++ b/drivers/net/wireless/rtlwifi/rtl8192ce/rf.c | |||
@@ -97,15 +97,12 @@ void rtl92ce_phy_rf6052_set_cck_txpower(struct ieee80211_hw *hw, | |||
97 | } | 97 | } |
98 | 98 | ||
99 | if (rtlefuse->eeprom_regulatory == 0) { | 99 | if (rtlefuse->eeprom_regulatory == 0) { |
100 | tmpval = | 100 | tmpval = (rtlphy->mcs_offset[0][6]) + |
101 | (rtlphy->mcs_txpwrlevel_origoffset[0][6]) + | 101 | (rtlphy->mcs_offset[0][7] << 8); |
102 | (rtlphy->mcs_txpwrlevel_origoffset[0][7] << | ||
103 | 8); | ||
104 | tx_agc[RF90_PATH_A] += tmpval; | 102 | tx_agc[RF90_PATH_A] += tmpval; |
105 | 103 | ||
106 | tmpval = (rtlphy->mcs_txpwrlevel_origoffset[0][14]) + | 104 | tmpval = (rtlphy->mcs_offset[0][14]) + |
107 | (rtlphy->mcs_txpwrlevel_origoffset[0][15] << | 105 | (rtlphy->mcs_offset[0][15] << 24); |
108 | 24); | ||
109 | tx_agc[RF90_PATH_B] += tmpval; | 106 | tx_agc[RF90_PATH_B] += tmpval; |
110 | } | 107 | } |
111 | } | 108 | } |
@@ -209,8 +206,7 @@ static void _rtl92c_get_txpower_writeval_by_regulatory(struct ieee80211_hw *hw, | |||
209 | case 0: | 206 | case 0: |
210 | chnlgroup = 0; | 207 | chnlgroup = 0; |
211 | 208 | ||
212 | writeVal = | 209 | writeVal = rtlphy->mcs_offset[chnlgroup][index + |
213 | rtlphy->mcs_txpwrlevel_origoffset[chnlgroup][index + | ||
214 | (rf ? 8 : 0)] | 210 | (rf ? 8 : 0)] |
215 | + ((index < 2) ? powerBase0[rf] : powerBase1[rf]); | 211 | + ((index < 2) ? powerBase0[rf] : powerBase1[rf]); |
216 | 212 | ||
@@ -240,8 +236,7 @@ static void _rtl92c_get_txpower_writeval_by_regulatory(struct ieee80211_hw *hw, | |||
240 | chnlgroup++; | 236 | chnlgroup++; |
241 | } | 237 | } |
242 | 238 | ||
243 | writeVal = | 239 | writeVal = rtlphy->mcs_offset[chnlgroup] |
244 | rtlphy->mcs_txpwrlevel_origoffset[chnlgroup] | ||
245 | [index + (rf ? 8 : 0)] + ((index < 2) ? | 240 | [index + (rf ? 8 : 0)] + ((index < 2) ? |
246 | powerBase0[rf] : | 241 | powerBase0[rf] : |
247 | powerBase1[rf]); | 242 | powerBase1[rf]); |
@@ -276,8 +271,7 @@ static void _rtl92c_get_txpower_writeval_by_regulatory(struct ieee80211_hw *hw, | |||
276 | 1]); | 271 | 1]); |
277 | } | 272 | } |
278 | for (i = 0; i < 4; i++) { | 273 | for (i = 0; i < 4; i++) { |
279 | pwr_diff_limit[i] = | 274 | pwr_diff_limit[i] = (u8) ((rtlphy->mcs_offset |
280 | (u8) ((rtlphy->mcs_txpwrlevel_origoffset | ||
281 | [chnlgroup][index + | 275 | [chnlgroup][index + |
282 | (rf ? 8 : 0)] & (0x7f << (i * 8))) >> | 276 | (rf ? 8 : 0)] & (0x7f << (i * 8))) >> |
283 | (i * 8)); | 277 | (i * 8)); |
@@ -317,8 +311,7 @@ static void _rtl92c_get_txpower_writeval_by_regulatory(struct ieee80211_hw *hw, | |||
317 | break; | 311 | break; |
318 | default: | 312 | default: |
319 | chnlgroup = 0; | 313 | chnlgroup = 0; |
320 | writeVal = | 314 | writeVal = rtlphy->mcs_offset[chnlgroup] |
321 | rtlphy->mcs_txpwrlevel_origoffset[chnlgroup] | ||
322 | [index + (rf ? 8 : 0)] | 315 | [index + (rf ? 8 : 0)] |
323 | + ((index < 2) ? powerBase0[rf] : powerBase1[rf]); | 316 | + ((index < 2) ? powerBase0[rf] : powerBase1[rf]); |
324 | 317 | ||
diff --git a/drivers/net/wireless/rtlwifi/rtl8192ce/trx.c b/drivers/net/wireless/rtlwifi/rtl8192ce/trx.c index b8a3c035a889..d7e1f0a7e48f 100644 --- a/drivers/net/wireless/rtlwifi/rtl8192ce/trx.c +++ b/drivers/net/wireless/rtlwifi/rtl8192ce/trx.c | |||
@@ -140,8 +140,8 @@ static void _rtl92ce_query_rxphystatus(struct ieee80211_hw *hw, | |||
140 | pstats->is_cck = is_cck_rate; | 140 | pstats->is_cck = is_cck_rate; |
141 | pstats->packet_beacon = packet_beacon; | 141 | pstats->packet_beacon = packet_beacon; |
142 | pstats->is_cck = is_cck_rate; | 142 | pstats->is_cck = is_cck_rate; |
143 | pstats->rx_mimo_signalquality[0] = -1; | 143 | pstats->rx_mimo_sig_qual[0] = -1; |
144 | pstats->rx_mimo_signalquality[1] = -1; | 144 | pstats->rx_mimo_sig_qual[1] = -1; |
145 | 145 | ||
146 | if (is_cck_rate) { | 146 | if (is_cck_rate) { |
147 | u8 report, cck_highpwr; | 147 | u8 report, cck_highpwr; |
@@ -211,8 +211,8 @@ static void _rtl92ce_query_rxphystatus(struct ieee80211_hw *hw, | |||
211 | } | 211 | } |
212 | 212 | ||
213 | pstats->signalquality = sq; | 213 | pstats->signalquality = sq; |
214 | pstats->rx_mimo_signalquality[0] = sq; | 214 | pstats->rx_mimo_sig_qual[0] = sq; |
215 | pstats->rx_mimo_signalquality[1] = -1; | 215 | pstats->rx_mimo_sig_qual[1] = -1; |
216 | } | 216 | } |
217 | } else { | 217 | } else { |
218 | rtlpriv->dm.rfpath_rxenable[0] = | 218 | rtlpriv->dm.rfpath_rxenable[0] = |
@@ -251,8 +251,7 @@ static void _rtl92ce_query_rxphystatus(struct ieee80211_hw *hw, | |||
251 | if (i == 0) | 251 | if (i == 0) |
252 | pstats->signalquality = | 252 | pstats->signalquality = |
253 | (u8) (evm & 0xff); | 253 | (u8) (evm & 0xff); |
254 | pstats->rx_mimo_signalquality[i] = | 254 | pstats->rx_mimo_sig_qual[i] = (u8) (evm & 0xff); |
255 | (u8) (evm & 0xff); | ||
256 | } | 255 | } |
257 | } | 256 | } |
258 | } | 257 | } |
@@ -362,36 +361,31 @@ static void _rtl92ce_process_pwdb(struct ieee80211_hw *hw, | |||
362 | { | 361 | { |
363 | struct rtl_priv *rtlpriv = rtl_priv(hw); | 362 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
364 | struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); | 363 | struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); |
365 | long undecorated_smoothed_pwdb; | 364 | long undec_sm_pwdb; |
366 | 365 | ||
367 | if (mac->opmode == NL80211_IFTYPE_ADHOC) { | 366 | if (mac->opmode == NL80211_IFTYPE_ADHOC) { |
368 | return; | 367 | return; |
369 | } else { | 368 | } else { |
370 | undecorated_smoothed_pwdb = | 369 | undec_sm_pwdb = rtlpriv->dm.undec_sm_pwdb; |
371 | rtlpriv->dm.undecorated_smoothed_pwdb; | ||
372 | } | 370 | } |
373 | 371 | ||
374 | if (pstats->packet_toself || pstats->packet_beacon) { | 372 | if (pstats->packet_toself || pstats->packet_beacon) { |
375 | if (undecorated_smoothed_pwdb < 0) | 373 | if (undec_sm_pwdb < 0) |
376 | undecorated_smoothed_pwdb = pstats->rx_pwdb_all; | 374 | undec_sm_pwdb = pstats->rx_pwdb_all; |
377 | 375 | ||
378 | if (pstats->rx_pwdb_all > (u32) undecorated_smoothed_pwdb) { | 376 | if (pstats->rx_pwdb_all > (u32) undec_sm_pwdb) { |
379 | undecorated_smoothed_pwdb = | 377 | undec_sm_pwdb = (((undec_sm_pwdb) * |
380 | (((undecorated_smoothed_pwdb) * | ||
381 | (RX_SMOOTH_FACTOR - 1)) + | 378 | (RX_SMOOTH_FACTOR - 1)) + |
382 | (pstats->rx_pwdb_all)) / (RX_SMOOTH_FACTOR); | 379 | (pstats->rx_pwdb_all)) / (RX_SMOOTH_FACTOR); |
383 | 380 | ||
384 | undecorated_smoothed_pwdb = undecorated_smoothed_pwdb | 381 | undec_sm_pwdb += 1; |
385 | + 1; | ||
386 | } else { | 382 | } else { |
387 | undecorated_smoothed_pwdb = | 383 | undec_sm_pwdb = (((undec_sm_pwdb) * |
388 | (((undecorated_smoothed_pwdb) * | ||
389 | (RX_SMOOTH_FACTOR - 1)) + | 384 | (RX_SMOOTH_FACTOR - 1)) + |
390 | (pstats->rx_pwdb_all)) / (RX_SMOOTH_FACTOR); | 385 | (pstats->rx_pwdb_all)) / (RX_SMOOTH_FACTOR); |
391 | } | 386 | } |
392 | 387 | ||
393 | rtlpriv->dm.undecorated_smoothed_pwdb = | 388 | rtlpriv->dm.undec_sm_pwdb = undec_sm_pwdb; |
394 | undecorated_smoothed_pwdb; | ||
395 | _rtl92ce_update_rxsignalstatistics(hw, pstats); | 389 | _rtl92ce_update_rxsignalstatistics(hw, pstats); |
396 | } | 390 | } |
397 | } | 391 | } |
@@ -438,15 +432,14 @@ static void _rtl92ce_process_ui_link_quality(struct ieee80211_hw *hw, | |||
438 | for (n_spatialstream = 0; n_spatialstream < 2; | 432 | for (n_spatialstream = 0; n_spatialstream < 2; |
439 | n_spatialstream++) { | 433 | n_spatialstream++) { |
440 | if (pstats-> | 434 | if (pstats-> |
441 | rx_mimo_signalquality[n_spatialstream] != | 435 | rx_mimo_sig_qual[n_spatialstream] != -1) { |
442 | -1) { | ||
443 | if (rtlpriv->stats. | 436 | if (rtlpriv->stats. |
444 | rx_evm_percentage[n_spatialstream] | 437 | rx_evm_percentage[n_spatialstream] |
445 | == 0) { | 438 | == 0) { |
446 | rtlpriv->stats. | 439 | rtlpriv->stats. |
447 | rx_evm_percentage | 440 | rx_evm_percentage |
448 | [n_spatialstream] = | 441 | [n_spatialstream] = |
449 | pstats->rx_mimo_signalquality | 442 | pstats->rx_mimo_sig_qual |
450 | [n_spatialstream]; | 443 | [n_spatialstream]; |
451 | } | 444 | } |
452 | 445 | ||
@@ -456,8 +449,7 @@ static void _rtl92ce_process_ui_link_quality(struct ieee80211_hw *hw, | |||
456 | stats.rx_evm_percentage | 449 | stats.rx_evm_percentage |
457 | [n_spatialstream] * | 450 | [n_spatialstream] * |
458 | (RX_SMOOTH_FACTOR - 1)) + | 451 | (RX_SMOOTH_FACTOR - 1)) + |
459 | (pstats-> | 452 | (pstats->rx_mimo_sig_qual |
460 | rx_mimo_signalquality | ||
461 | [n_spatialstream] * 1)) / | 453 | [n_spatialstream] * 1)) / |
462 | (RX_SMOOTH_FACTOR); | 454 | (RX_SMOOTH_FACTOR); |
463 | } | 455 | } |
diff --git a/drivers/net/wireless/rtlwifi/rtl8192cu/dm.c b/drivers/net/wireless/rtlwifi/rtl8192cu/dm.c index 6fd39eaf361e..16a0b9e59acf 100644 --- a/drivers/net/wireless/rtlwifi/rtl8192cu/dm.c +++ b/drivers/net/wireless/rtlwifi/rtl8192cu/dm.c | |||
@@ -39,7 +39,7 @@ void rtl92cu_dm_dynamic_txpower(struct ieee80211_hw *hw) | |||
39 | struct rtl_priv *rtlpriv = rtl_priv(hw); | 39 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
40 | struct rtl_phy *rtlphy = &(rtlpriv->phy); | 40 | struct rtl_phy *rtlphy = &(rtlpriv->phy); |
41 | struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); | 41 | struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); |
42 | long undecorated_smoothed_pwdb; | 42 | long undec_sm_pwdb; |
43 | 43 | ||
44 | if (!rtlpriv->dm.dynamic_txpower_enable) | 44 | if (!rtlpriv->dm.dynamic_txpower_enable) |
45 | return; | 45 | return; |
@@ -50,7 +50,7 @@ void rtl92cu_dm_dynamic_txpower(struct ieee80211_hw *hw) | |||
50 | } | 50 | } |
51 | 51 | ||
52 | if ((mac->link_state < MAC80211_LINKED) && | 52 | if ((mac->link_state < MAC80211_LINKED) && |
53 | (rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb == 0)) { | 53 | (rtlpriv->dm.entry_min_undec_sm_pwdb == 0)) { |
54 | RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE, | 54 | RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE, |
55 | "Not connected to any\n"); | 55 | "Not connected to any\n"); |
56 | 56 | ||
@@ -62,41 +62,35 @@ void rtl92cu_dm_dynamic_txpower(struct ieee80211_hw *hw) | |||
62 | 62 | ||
63 | if (mac->link_state >= MAC80211_LINKED) { | 63 | if (mac->link_state >= MAC80211_LINKED) { |
64 | if (mac->opmode == NL80211_IFTYPE_ADHOC) { | 64 | if (mac->opmode == NL80211_IFTYPE_ADHOC) { |
65 | undecorated_smoothed_pwdb = | 65 | undec_sm_pwdb = rtlpriv->dm.entry_min_undec_sm_pwdb; |
66 | rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb; | ||
67 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, | 66 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, |
68 | "AP Client PWDB = 0x%lx\n", | 67 | "AP Client PWDB = 0x%lx\n", |
69 | undecorated_smoothed_pwdb); | 68 | undec_sm_pwdb); |
70 | } else { | 69 | } else { |
71 | undecorated_smoothed_pwdb = | 70 | undec_sm_pwdb = rtlpriv->dm.undec_sm_pwdb; |
72 | rtlpriv->dm.undecorated_smoothed_pwdb; | ||
73 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, | 71 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, |
74 | "STA Default Port PWDB = 0x%lx\n", | 72 | "STA Default Port PWDB = 0x%lx\n", |
75 | undecorated_smoothed_pwdb); | 73 | undec_sm_pwdb); |
76 | } | 74 | } |
77 | } else { | 75 | } else { |
78 | undecorated_smoothed_pwdb = | 76 | undec_sm_pwdb = rtlpriv->dm.entry_min_undec_sm_pwdb; |
79 | rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb; | ||
80 | 77 | ||
81 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, | 78 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, |
82 | "AP Ext Port PWDB = 0x%lx\n", | 79 | "AP Ext Port PWDB = 0x%lx\n", |
83 | undecorated_smoothed_pwdb); | 80 | undec_sm_pwdb); |
84 | } | 81 | } |
85 | 82 | ||
86 | if (undecorated_smoothed_pwdb >= TX_POWER_NEAR_FIELD_THRESH_LVL2) { | 83 | if (undec_sm_pwdb >= TX_POWER_NEAR_FIELD_THRESH_LVL2) { |
87 | rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_LEVEL1; | 84 | rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_LEVEL1; |
88 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, | 85 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, |
89 | "TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x0)\n"); | 86 | "TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x0)\n"); |
90 | } else if ((undecorated_smoothed_pwdb < | 87 | } else if ((undec_sm_pwdb < (TX_POWER_NEAR_FIELD_THRESH_LVL2 - 3)) && |
91 | (TX_POWER_NEAR_FIELD_THRESH_LVL2 - 3)) && | 88 | (undec_sm_pwdb >= TX_POWER_NEAR_FIELD_THRESH_LVL1)) { |
92 | (undecorated_smoothed_pwdb >= | ||
93 | TX_POWER_NEAR_FIELD_THRESH_LVL1)) { | ||
94 | 89 | ||
95 | rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_LEVEL1; | 90 | rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_LEVEL1; |
96 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, | 91 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, |
97 | "TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x10)\n"); | 92 | "TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x10)\n"); |
98 | } else if (undecorated_smoothed_pwdb < | 93 | } else if (undec_sm_pwdb < (TX_POWER_NEAR_FIELD_THRESH_LVL1 - 5)) { |
99 | (TX_POWER_NEAR_FIELD_THRESH_LVL1 - 5)) { | ||
100 | rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL; | 94 | rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL; |
101 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, | 95 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, |
102 | "TXHIGHPWRLEVEL_NORMAL\n"); | 96 | "TXHIGHPWRLEVEL_NORMAL\n"); |
diff --git a/drivers/net/wireless/rtlwifi/rtl8192cu/hw.c b/drivers/net/wireless/rtlwifi/rtl8192cu/hw.c index 7d36a94263b0..b1ccff474c79 100644 --- a/drivers/net/wireless/rtlwifi/rtl8192cu/hw.c +++ b/drivers/net/wireless/rtlwifi/rtl8192cu/hw.c | |||
@@ -152,9 +152,9 @@ static void _rtl92cu_read_txpower_info_from_hwpg(struct ieee80211_hw *hw, | |||
152 | tempval = hwinfo[EEPROM_TXPOWERHT40_2SDIFF + i]; | 152 | tempval = hwinfo[EEPROM_TXPOWERHT40_2SDIFF + i]; |
153 | else | 153 | else |
154 | tempval = EEPROM_DEFAULT_HT40_2SDIFF; | 154 | tempval = EEPROM_DEFAULT_HT40_2SDIFF; |
155 | rtlefuse->eeprom_chnlarea_txpwr_ht40_2sdiif[RF90_PATH_A][i] = | 155 | rtlefuse->eprom_chnl_txpwr_ht40_2sdf[RF90_PATH_A][i] = |
156 | (tempval & 0xf); | 156 | (tempval & 0xf); |
157 | rtlefuse->eeprom_chnlarea_txpwr_ht40_2sdiif[RF90_PATH_B][i] = | 157 | rtlefuse->eprom_chnl_txpwr_ht40_2sdf[RF90_PATH_B][i] = |
158 | ((tempval & 0xf0) >> 4); | 158 | ((tempval & 0xf0) >> 4); |
159 | } | 159 | } |
160 | for (rf_path = 0; rf_path < 2; rf_path++) | 160 | for (rf_path = 0; rf_path < 2; rf_path++) |
@@ -177,7 +177,7 @@ static void _rtl92cu_read_txpower_info_from_hwpg(struct ieee80211_hw *hw, | |||
177 | "RF(%d) EEPROM HT40 2S Diff Area(%d) = 0x%x\n", | 177 | "RF(%d) EEPROM HT40 2S Diff Area(%d) = 0x%x\n", |
178 | rf_path, i, | 178 | rf_path, i, |
179 | rtlefuse-> | 179 | rtlefuse-> |
180 | eeprom_chnlarea_txpwr_ht40_2sdiif[rf_path][i]); | 180 | eprom_chnl_txpwr_ht40_2sdf[rf_path][i]); |
181 | for (rf_path = 0; rf_path < 2; rf_path++) { | 181 | for (rf_path = 0; rf_path < 2; rf_path++) { |
182 | for (i = 0; i < 14; i++) { | 182 | for (i = 0; i < 14; i++) { |
183 | index = _rtl92c_get_chnl_group((u8) i); | 183 | index = _rtl92c_get_chnl_group((u8) i); |
@@ -189,13 +189,13 @@ static void _rtl92cu_read_txpower_info_from_hwpg(struct ieee80211_hw *hw, | |||
189 | if ((rtlefuse-> | 189 | if ((rtlefuse-> |
190 | eeprom_chnlarea_txpwr_ht40_1s[rf_path][index] - | 190 | eeprom_chnlarea_txpwr_ht40_1s[rf_path][index] - |
191 | rtlefuse-> | 191 | rtlefuse-> |
192 | eeprom_chnlarea_txpwr_ht40_2sdiif[rf_path][index]) | 192 | eprom_chnl_txpwr_ht40_2sdf[rf_path][index]) |
193 | > 0) { | 193 | > 0) { |
194 | rtlefuse->txpwrlevel_ht40_2s[rf_path][i] = | 194 | rtlefuse->txpwrlevel_ht40_2s[rf_path][i] = |
195 | rtlefuse-> | 195 | rtlefuse-> |
196 | eeprom_chnlarea_txpwr_ht40_1s[rf_path] | 196 | eeprom_chnlarea_txpwr_ht40_1s[rf_path] |
197 | [index] - rtlefuse-> | 197 | [index] - rtlefuse-> |
198 | eeprom_chnlarea_txpwr_ht40_2sdiif[rf_path] | 198 | eprom_chnl_txpwr_ht40_2sdf[rf_path] |
199 | [index]; | 199 | [index]; |
200 | } else { | 200 | } else { |
201 | rtlefuse->txpwrlevel_ht40_2s[rf_path][i] = 0; | 201 | rtlefuse->txpwrlevel_ht40_2s[rf_path][i] = 0; |
diff --git a/drivers/net/wireless/rtlwifi/rtl8192cu/mac.c b/drivers/net/wireless/rtlwifi/rtl8192cu/mac.c index 7e91c76582ec..32ff959a0251 100644 --- a/drivers/net/wireless/rtlwifi/rtl8192cu/mac.c +++ b/drivers/net/wireless/rtlwifi/rtl8192cu/mac.c | |||
@@ -46,7 +46,7 @@ | |||
46 | 46 | ||
47 | #define LINK_Q ui_link_quality | 47 | #define LINK_Q ui_link_quality |
48 | #define RX_EVM rx_evm_percentage | 48 | #define RX_EVM rx_evm_percentage |
49 | #define RX_SIGQ rx_mimo_signalquality | 49 | #define RX_SIGQ rx_mimo_sig_qual |
50 | 50 | ||
51 | 51 | ||
52 | void rtl92c_read_chip_version(struct ieee80211_hw *hw) | 52 | void rtl92c_read_chip_version(struct ieee80211_hw *hw) |
@@ -982,32 +982,27 @@ static void _rtl92c_process_pwdb(struct ieee80211_hw *hw, | |||
982 | { | 982 | { |
983 | struct rtl_priv *rtlpriv = rtl_priv(hw); | 983 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
984 | struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); | 984 | struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); |
985 | long undecorated_smoothed_pwdb = 0; | 985 | long undec_sm_pwdb = 0; |
986 | 986 | ||
987 | if (mac->opmode == NL80211_IFTYPE_ADHOC) { | 987 | if (mac->opmode == NL80211_IFTYPE_ADHOC) { |
988 | return; | 988 | return; |
989 | } else { | 989 | } else { |
990 | undecorated_smoothed_pwdb = | 990 | undec_sm_pwdb = rtlpriv->dm.undec_sm_pwdb; |
991 | rtlpriv->dm.undecorated_smoothed_pwdb; | ||
992 | } | 991 | } |
993 | if (pstats->packet_toself || pstats->packet_beacon) { | 992 | if (pstats->packet_toself || pstats->packet_beacon) { |
994 | if (undecorated_smoothed_pwdb < 0) | 993 | if (undec_sm_pwdb < 0) |
995 | undecorated_smoothed_pwdb = pstats->rx_pwdb_all; | 994 | undec_sm_pwdb = pstats->rx_pwdb_all; |
996 | if (pstats->rx_pwdb_all > (u32) undecorated_smoothed_pwdb) { | 995 | if (pstats->rx_pwdb_all > (u32) undec_sm_pwdb) { |
997 | undecorated_smoothed_pwdb = | 996 | undec_sm_pwdb = (((undec_sm_pwdb) * |
998 | (((undecorated_smoothed_pwdb) * | ||
999 | (RX_SMOOTH_FACTOR - 1)) + | 997 | (RX_SMOOTH_FACTOR - 1)) + |
1000 | (pstats->rx_pwdb_all)) / (RX_SMOOTH_FACTOR); | 998 | (pstats->rx_pwdb_all)) / (RX_SMOOTH_FACTOR); |
1001 | undecorated_smoothed_pwdb = undecorated_smoothed_pwdb | 999 | undec_sm_pwdb += 1; |
1002 | + 1; | ||
1003 | } else { | 1000 | } else { |
1004 | undecorated_smoothed_pwdb = | 1001 | undec_sm_pwdb = (((undec_sm_pwdb) * |
1005 | (((undecorated_smoothed_pwdb) * | ||
1006 | (RX_SMOOTH_FACTOR - 1)) + | 1002 | (RX_SMOOTH_FACTOR - 1)) + |
1007 | (pstats->rx_pwdb_all)) / (RX_SMOOTH_FACTOR); | 1003 | (pstats->rx_pwdb_all)) / (RX_SMOOTH_FACTOR); |
1008 | } | 1004 | } |
1009 | rtlpriv->dm.undecorated_smoothed_pwdb = | 1005 | rtlpriv->dm.undec_sm_pwdb = undec_sm_pwdb; |
1010 | undecorated_smoothed_pwdb; | ||
1011 | _rtl92c_update_rxsignalstatistics(hw, pstats); | 1006 | _rtl92c_update_rxsignalstatistics(hw, pstats); |
1012 | } | 1007 | } |
1013 | } | 1008 | } |
diff --git a/drivers/net/wireless/rtlwifi/rtl8192cu/rf.c b/drivers/net/wireless/rtlwifi/rtl8192cu/rf.c index 506b9a078ed1..953f1a0f8532 100644 --- a/drivers/net/wireless/rtlwifi/rtl8192cu/rf.c +++ b/drivers/net/wireless/rtlwifi/rtl8192cu/rf.c | |||
@@ -115,15 +115,11 @@ void rtl92cu_phy_rf6052_set_cck_txpower(struct ieee80211_hw *hw, | |||
115 | (ppowerlevel[idx1] << 24); | 115 | (ppowerlevel[idx1] << 24); |
116 | } | 116 | } |
117 | if (rtlefuse->eeprom_regulatory == 0) { | 117 | if (rtlefuse->eeprom_regulatory == 0) { |
118 | tmpval = (rtlphy->mcs_txpwrlevel_origoffset | 118 | tmpval = (rtlphy->mcs_offset[0][6]) + |
119 | [0][6]) + | 119 | (rtlphy->mcs_offset[0][7] << 8); |
120 | (rtlphy->mcs_txpwrlevel_origoffset | ||
121 | [0][7] << 8); | ||
122 | tx_agc[RF90_PATH_A] += tmpval; | 120 | tx_agc[RF90_PATH_A] += tmpval; |
123 | tmpval = (rtlphy->mcs_txpwrlevel_origoffset | 121 | tmpval = (rtlphy->mcs_offset[0][14]) + |
124 | [0][14]) + | 122 | (rtlphy->mcs_offset[0][15] << 24); |
125 | (rtlphy->mcs_txpwrlevel_origoffset | ||
126 | [0][15] << 24); | ||
127 | tx_agc[RF90_PATH_B] += tmpval; | 123 | tx_agc[RF90_PATH_B] += tmpval; |
128 | } | 124 | } |
129 | } | 125 | } |
@@ -215,7 +211,7 @@ static void _rtl92c_get_txpower_writeval_by_regulatory(struct ieee80211_hw *hw, | |||
215 | switch (rtlefuse->eeprom_regulatory) { | 211 | switch (rtlefuse->eeprom_regulatory) { |
216 | case 0: | 212 | case 0: |
217 | chnlgroup = 0; | 213 | chnlgroup = 0; |
218 | writeVal = rtlphy->mcs_txpwrlevel_origoffset | 214 | writeVal = rtlphy->mcs_offset |
219 | [chnlgroup][index + (rf ? 8 : 0)] | 215 | [chnlgroup][index + (rf ? 8 : 0)] |
220 | + ((index < 2) ? powerBase0[rf] : powerBase1[rf]); | 216 | + ((index < 2) ? powerBase0[rf] : powerBase1[rf]); |
221 | RTPRINT(rtlpriv, FPHY, PHY_TXPWR, | 217 | RTPRINT(rtlpriv, FPHY, PHY_TXPWR, |
@@ -238,8 +234,7 @@ static void _rtl92c_get_txpower_writeval_by_regulatory(struct ieee80211_hw *hw, | |||
238 | else | 234 | else |
239 | chnlgroup += 4; | 235 | chnlgroup += 4; |
240 | } | 236 | } |
241 | writeVal = rtlphy->mcs_txpwrlevel_origoffset | 237 | writeVal = rtlphy->mcs_offset[chnlgroup][index + |
242 | [chnlgroup][index + | ||
243 | (rf ? 8 : 0)] + | 238 | (rf ? 8 : 0)] + |
244 | ((index < 2) ? powerBase0[rf] : | 239 | ((index < 2) ? powerBase0[rf] : |
245 | powerBase1[rf]); | 240 | powerBase1[rf]); |
@@ -271,8 +266,7 @@ static void _rtl92c_get_txpower_writeval_by_regulatory(struct ieee80211_hw *hw, | |||
271 | [channel - 1]); | 266 | [channel - 1]); |
272 | } | 267 | } |
273 | for (i = 0; i < 4; i++) { | 268 | for (i = 0; i < 4; i++) { |
274 | pwr_diff_limit[i] = | 269 | pwr_diff_limit[i] = (u8) ((rtlphy->mcs_offset |
275 | (u8) ((rtlphy->mcs_txpwrlevel_origoffset | ||
276 | [chnlgroup][index + (rf ? 8 : 0)] | 270 | [chnlgroup][index + (rf ? 8 : 0)] |
277 | & (0x7f << (i * 8))) >> (i * 8)); | 271 | & (0x7f << (i * 8))) >> (i * 8)); |
278 | if (rtlphy->current_chan_bw == | 272 | if (rtlphy->current_chan_bw == |
@@ -306,7 +300,7 @@ static void _rtl92c_get_txpower_writeval_by_regulatory(struct ieee80211_hw *hw, | |||
306 | break; | 300 | break; |
307 | default: | 301 | default: |
308 | chnlgroup = 0; | 302 | chnlgroup = 0; |
309 | writeVal = rtlphy->mcs_txpwrlevel_origoffset[chnlgroup] | 303 | writeVal = rtlphy->mcs_offset[chnlgroup] |
310 | [index + (rf ? 8 : 0)] + ((index < 2) ? | 304 | [index + (rf ? 8 : 0)] + ((index < 2) ? |
311 | powerBase0[rf] : powerBase1[rf]); | 305 | powerBase0[rf] : powerBase1[rf]); |
312 | RTPRINT(rtlpriv, FPHY, PHY_TXPWR, | 306 | RTPRINT(rtlpriv, FPHY, PHY_TXPWR, |
diff --git a/drivers/net/wireless/rtlwifi/rtl8192de/dm.c b/drivers/net/wireless/rtlwifi/rtl8192de/dm.c index ed868c396c25..fd8df233ff22 100644 --- a/drivers/net/wireless/rtlwifi/rtl8192de/dm.c +++ b/drivers/net/wireless/rtlwifi/rtl8192de/dm.c | |||
@@ -35,7 +35,7 @@ | |||
35 | #include "dm.h" | 35 | #include "dm.h" |
36 | #include "fw.h" | 36 | #include "fw.h" |
37 | 37 | ||
38 | #define UNDEC_SM_PWDB entry_min_undecoratedsmoothed_pwdb | 38 | #define UNDEC_SM_PWDB entry_min_undec_sm_pwdb |
39 | 39 | ||
40 | static const u32 ofdmswing_table[OFDM_TABLE_SIZE_92D] = { | 40 | static const u32 ofdmswing_table[OFDM_TABLE_SIZE_92D] = { |
41 | 0x7f8001fe, /* 0, +6.0dB */ | 41 | 0x7f8001fe, /* 0, +6.0dB */ |
@@ -164,18 +164,18 @@ static void rtl92d_dm_diginit(struct ieee80211_hw *hw) | |||
164 | de_digtable->dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX; | 164 | de_digtable->dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX; |
165 | de_digtable->cur_igvalue = 0x20; | 165 | de_digtable->cur_igvalue = 0x20; |
166 | de_digtable->pre_igvalue = 0x0; | 166 | de_digtable->pre_igvalue = 0x0; |
167 | de_digtable->cursta_connectstate = DIG_STA_DISCONNECT; | 167 | de_digtable->cursta_cstate = DIG_STA_DISCONNECT; |
168 | de_digtable->presta_connectstate = DIG_STA_DISCONNECT; | 168 | de_digtable->presta_cstate = DIG_STA_DISCONNECT; |
169 | de_digtable->curmultista_connectstate = DIG_MULTISTA_DISCONNECT; | 169 | de_digtable->curmultista_cstate = DIG_MULTISTA_DISCONNECT; |
170 | de_digtable->rssi_lowthresh = DM_DIG_THRESH_LOW; | 170 | de_digtable->rssi_lowthresh = DM_DIG_THRESH_LOW; |
171 | de_digtable->rssi_highthresh = DM_DIG_THRESH_HIGH; | 171 | de_digtable->rssi_highthresh = DM_DIG_THRESH_HIGH; |
172 | de_digtable->fa_lowthresh = DM_FALSEALARM_THRESH_LOW; | 172 | de_digtable->fa_lowthresh = DM_FALSEALARM_THRESH_LOW; |
173 | de_digtable->fa_highthresh = DM_FALSEALARM_THRESH_HIGH; | 173 | de_digtable->fa_highthresh = DM_FALSEALARM_THRESH_HIGH; |
174 | de_digtable->rx_gain_range_max = DM_DIG_FA_UPPER; | 174 | de_digtable->rx_gain_range_max = DM_DIG_FA_UPPER; |
175 | de_digtable->rx_gain_range_min = DM_DIG_FA_LOWER; | 175 | de_digtable->rx_gain_range_min = DM_DIG_FA_LOWER; |
176 | de_digtable->backoff_val = DM_DIG_BACKOFF_DEFAULT; | 176 | de_digtable->back_val = DM_DIG_BACKOFF_DEFAULT; |
177 | de_digtable->backoff_val_range_max = DM_DIG_BACKOFF_MAX; | 177 | de_digtable->back_range_max = DM_DIG_BACKOFF_MAX; |
178 | de_digtable->backoff_val_range_min = DM_DIG_BACKOFF_MIN; | 178 | de_digtable->back_range_min = DM_DIG_BACKOFF_MIN; |
179 | de_digtable->pre_cck_pd_state = CCK_PD_STAGE_LOWRSSI; | 179 | de_digtable->pre_cck_pd_state = CCK_PD_STAGE_LOWRSSI; |
180 | de_digtable->cur_cck_pd_state = CCK_PD_STAGE_MAX; | 180 | de_digtable->cur_cck_pd_state = CCK_PD_STAGE_MAX; |
181 | de_digtable->large_fa_hit = 0; | 181 | de_digtable->large_fa_hit = 0; |
@@ -273,35 +273,34 @@ static void rtl92d_dm_find_minimum_rssi(struct ieee80211_hw *hw) | |||
273 | /* Determine the minimum RSSI */ | 273 | /* Determine the minimum RSSI */ |
274 | if ((mac->link_state < MAC80211_LINKED) && | 274 | if ((mac->link_state < MAC80211_LINKED) && |
275 | (rtlpriv->dm.UNDEC_SM_PWDB == 0)) { | 275 | (rtlpriv->dm.UNDEC_SM_PWDB == 0)) { |
276 | de_digtable->min_undecorated_pwdb_for_dm = 0; | 276 | de_digtable->min_undec_pwdb_for_dm = 0; |
277 | RT_TRACE(rtlpriv, COMP_BB_POWERSAVING, DBG_LOUD, | 277 | RT_TRACE(rtlpriv, COMP_BB_POWERSAVING, DBG_LOUD, |
278 | "Not connected to any\n"); | 278 | "Not connected to any\n"); |
279 | } | 279 | } |
280 | if (mac->link_state >= MAC80211_LINKED) { | 280 | if (mac->link_state >= MAC80211_LINKED) { |
281 | if (mac->opmode == NL80211_IFTYPE_AP || | 281 | if (mac->opmode == NL80211_IFTYPE_AP || |
282 | mac->opmode == NL80211_IFTYPE_ADHOC) { | 282 | mac->opmode == NL80211_IFTYPE_ADHOC) { |
283 | de_digtable->min_undecorated_pwdb_for_dm = | 283 | de_digtable->min_undec_pwdb_for_dm = |
284 | rtlpriv->dm.UNDEC_SM_PWDB; | 284 | rtlpriv->dm.UNDEC_SM_PWDB; |
285 | RT_TRACE(rtlpriv, COMP_BB_POWERSAVING, DBG_LOUD, | 285 | RT_TRACE(rtlpriv, COMP_BB_POWERSAVING, DBG_LOUD, |
286 | "AP Client PWDB = 0x%lx\n", | 286 | "AP Client PWDB = 0x%lx\n", |
287 | rtlpriv->dm.UNDEC_SM_PWDB); | 287 | rtlpriv->dm.UNDEC_SM_PWDB); |
288 | } else { | 288 | } else { |
289 | de_digtable->min_undecorated_pwdb_for_dm = | 289 | de_digtable->min_undec_pwdb_for_dm = |
290 | rtlpriv->dm.undecorated_smoothed_pwdb; | 290 | rtlpriv->dm.undec_sm_pwdb; |
291 | RT_TRACE(rtlpriv, COMP_BB_POWERSAVING, DBG_LOUD, | 291 | RT_TRACE(rtlpriv, COMP_BB_POWERSAVING, DBG_LOUD, |
292 | "STA Default Port PWDB = 0x%x\n", | 292 | "STA Default Port PWDB = 0x%x\n", |
293 | de_digtable->min_undecorated_pwdb_for_dm); | 293 | de_digtable->min_undec_pwdb_for_dm); |
294 | } | 294 | } |
295 | } else { | 295 | } else { |
296 | de_digtable->min_undecorated_pwdb_for_dm = | 296 | de_digtable->min_undec_pwdb_for_dm = rtlpriv->dm.UNDEC_SM_PWDB; |
297 | rtlpriv->dm.UNDEC_SM_PWDB; | ||
298 | RT_TRACE(rtlpriv, COMP_BB_POWERSAVING, DBG_LOUD, | 297 | RT_TRACE(rtlpriv, COMP_BB_POWERSAVING, DBG_LOUD, |
299 | "AP Ext Port or disconnect PWDB = 0x%x\n", | 298 | "AP Ext Port or disconnect PWDB = 0x%x\n", |
300 | de_digtable->min_undecorated_pwdb_for_dm); | 299 | de_digtable->min_undec_pwdb_for_dm); |
301 | } | 300 | } |
302 | 301 | ||
303 | RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "MinUndecoratedPWDBForDM =%d\n", | 302 | RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "MinUndecoratedPWDBForDM =%d\n", |
304 | de_digtable->min_undecorated_pwdb_for_dm); | 303 | de_digtable->min_undec_pwdb_for_dm); |
305 | } | 304 | } |
306 | 305 | ||
307 | static void rtl92d_dm_cck_packet_detection_thresh(struct ieee80211_hw *hw) | 306 | static void rtl92d_dm_cck_packet_detection_thresh(struct ieee80211_hw *hw) |
@@ -310,16 +309,16 @@ static void rtl92d_dm_cck_packet_detection_thresh(struct ieee80211_hw *hw) | |||
310 | struct dig_t *de_digtable = &rtlpriv->dm_digtable; | 309 | struct dig_t *de_digtable = &rtlpriv->dm_digtable; |
311 | unsigned long flag = 0; | 310 | unsigned long flag = 0; |
312 | 311 | ||
313 | if (de_digtable->cursta_connectstate == DIG_STA_CONNECT) { | 312 | if (de_digtable->cursta_cstate == DIG_STA_CONNECT) { |
314 | if (de_digtable->pre_cck_pd_state == CCK_PD_STAGE_LOWRSSI) { | 313 | if (de_digtable->pre_cck_pd_state == CCK_PD_STAGE_LOWRSSI) { |
315 | if (de_digtable->min_undecorated_pwdb_for_dm <= 25) | 314 | if (de_digtable->min_undec_pwdb_for_dm <= 25) |
316 | de_digtable->cur_cck_pd_state = | 315 | de_digtable->cur_cck_pd_state = |
317 | CCK_PD_STAGE_LOWRSSI; | 316 | CCK_PD_STAGE_LOWRSSI; |
318 | else | 317 | else |
319 | de_digtable->cur_cck_pd_state = | 318 | de_digtable->cur_cck_pd_state = |
320 | CCK_PD_STAGE_HIGHRSSI; | 319 | CCK_PD_STAGE_HIGHRSSI; |
321 | } else { | 320 | } else { |
322 | if (de_digtable->min_undecorated_pwdb_for_dm <= 20) | 321 | if (de_digtable->min_undec_pwdb_for_dm <= 20) |
323 | de_digtable->cur_cck_pd_state = | 322 | de_digtable->cur_cck_pd_state = |
324 | CCK_PD_STAGE_LOWRSSI; | 323 | CCK_PD_STAGE_LOWRSSI; |
325 | else | 324 | else |
@@ -342,7 +341,7 @@ static void rtl92d_dm_cck_packet_detection_thresh(struct ieee80211_hw *hw) | |||
342 | de_digtable->pre_cck_pd_state = de_digtable->cur_cck_pd_state; | 341 | de_digtable->pre_cck_pd_state = de_digtable->cur_cck_pd_state; |
343 | } | 342 | } |
344 | RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "CurSTAConnectState=%s\n", | 343 | RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "CurSTAConnectState=%s\n", |
345 | de_digtable->cursta_connectstate == DIG_STA_CONNECT ? | 344 | de_digtable->cursta_cstate == DIG_STA_CONNECT ? |
346 | "DIG_STA_CONNECT " : "DIG_STA_DISCONNECT"); | 345 | "DIG_STA_CONNECT " : "DIG_STA_DISCONNECT"); |
347 | RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "CCKPDStage=%s\n", | 346 | RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "CCKPDStage=%s\n", |
348 | de_digtable->cur_cck_pd_state == CCK_PD_STAGE_LOWRSSI ? | 347 | de_digtable->cur_cck_pd_state == CCK_PD_STAGE_LOWRSSI ? |
@@ -358,9 +357,9 @@ void rtl92d_dm_write_dig(struct ieee80211_hw *hw) | |||
358 | struct dig_t *de_digtable = &rtlpriv->dm_digtable; | 357 | struct dig_t *de_digtable = &rtlpriv->dm_digtable; |
359 | 358 | ||
360 | RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, | 359 | RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, |
361 | "cur_igvalue = 0x%x, pre_igvalue = 0x%x, backoff_val = %d\n", | 360 | "cur_igvalue = 0x%x, pre_igvalue = 0x%x, back_val = %d\n", |
362 | de_digtable->cur_igvalue, de_digtable->pre_igvalue, | 361 | de_digtable->cur_igvalue, de_digtable->pre_igvalue, |
363 | de_digtable->backoff_val); | 362 | de_digtable->back_val); |
364 | if (de_digtable->dig_enable_flag == false) { | 363 | if (de_digtable->dig_enable_flag == false) { |
365 | RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "DIG is disabled\n"); | 364 | RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "DIG is disabled\n"); |
366 | de_digtable->pre_igvalue = 0x17; | 365 | de_digtable->pre_igvalue = 0x17; |
@@ -382,13 +381,13 @@ static void rtl92d_early_mode_enabled(struct rtl_priv *rtlpriv) | |||
382 | if ((rtlpriv->mac80211.link_state >= MAC80211_LINKED) && | 381 | if ((rtlpriv->mac80211.link_state >= MAC80211_LINKED) && |
383 | (rtlpriv->mac80211.vendor == PEER_CISCO)) { | 382 | (rtlpriv->mac80211.vendor == PEER_CISCO)) { |
384 | RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "IOT_PEER = CISCO\n"); | 383 | RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "IOT_PEER = CISCO\n"); |
385 | if (de_digtable->last_min_undecorated_pwdb_for_dm >= 50 | 384 | if (de_digtable->last_min_undec_pwdb_for_dm >= 50 |
386 | && de_digtable->min_undecorated_pwdb_for_dm < 50) { | 385 | && de_digtable->min_undec_pwdb_for_dm < 50) { |
387 | rtl_write_byte(rtlpriv, REG_EARLY_MODE_CONTROL, 0x00); | 386 | rtl_write_byte(rtlpriv, REG_EARLY_MODE_CONTROL, 0x00); |
388 | RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, | 387 | RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, |
389 | "Early Mode Off\n"); | 388 | "Early Mode Off\n"); |
390 | } else if (de_digtable->last_min_undecorated_pwdb_for_dm <= 55 && | 389 | } else if (de_digtable->last_min_undec_pwdb_for_dm <= 55 && |
391 | de_digtable->min_undecorated_pwdb_for_dm > 55) { | 390 | de_digtable->min_undec_pwdb_for_dm > 55) { |
392 | rtl_write_byte(rtlpriv, REG_EARLY_MODE_CONTROL, 0x0f); | 391 | rtl_write_byte(rtlpriv, REG_EARLY_MODE_CONTROL, 0x0f); |
393 | RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, | 392 | RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, |
394 | "Early Mode On\n"); | 393 | "Early Mode On\n"); |
@@ -409,8 +408,8 @@ static void rtl92d_dm_dig(struct ieee80211_hw *hw) | |||
409 | RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "==>\n"); | 408 | RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "==>\n"); |
410 | if (rtlpriv->rtlhal.earlymode_enable) { | 409 | if (rtlpriv->rtlhal.earlymode_enable) { |
411 | rtl92d_early_mode_enabled(rtlpriv); | 410 | rtl92d_early_mode_enabled(rtlpriv); |
412 | de_digtable->last_min_undecorated_pwdb_for_dm = | 411 | de_digtable->last_min_undec_pwdb_for_dm = |
413 | de_digtable->min_undecorated_pwdb_for_dm; | 412 | de_digtable->min_undec_pwdb_for_dm; |
414 | } | 413 | } |
415 | if (!rtlpriv->dm.dm_initialgain_enable) | 414 | if (!rtlpriv->dm.dm_initialgain_enable) |
416 | return; | 415 | return; |
@@ -428,9 +427,9 @@ static void rtl92d_dm_dig(struct ieee80211_hw *hw) | |||
428 | RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "progress\n"); | 427 | RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "progress\n"); |
429 | /* Decide the current status and if modify initial gain or not */ | 428 | /* Decide the current status and if modify initial gain or not */ |
430 | if (rtlpriv->mac80211.link_state >= MAC80211_LINKED) | 429 | if (rtlpriv->mac80211.link_state >= MAC80211_LINKED) |
431 | de_digtable->cursta_connectstate = DIG_STA_CONNECT; | 430 | de_digtable->cursta_cstate = DIG_STA_CONNECT; |
432 | else | 431 | else |
433 | de_digtable->cursta_connectstate = DIG_STA_DISCONNECT; | 432 | de_digtable->cursta_cstate = DIG_STA_DISCONNECT; |
434 | 433 | ||
435 | /* adjust initial gain according to false alarm counter */ | 434 | /* adjust initial gain according to false alarm counter */ |
436 | if (falsealm_cnt->cnt_all < DM_DIG_FA_TH0) | 435 | if (falsealm_cnt->cnt_all < DM_DIG_FA_TH0) |
@@ -522,7 +521,7 @@ static void rtl92d_dm_dynamic_txpower(struct ieee80211_hw *hw) | |||
522 | struct rtl_phy *rtlphy = &(rtlpriv->phy); | 521 | struct rtl_phy *rtlphy = &(rtlpriv->phy); |
523 | struct rtl_hal *rtlhal = rtl_hal(rtlpriv); | 522 | struct rtl_hal *rtlhal = rtl_hal(rtlpriv); |
524 | struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); | 523 | struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); |
525 | long undecorated_smoothed_pwdb; | 524 | long undec_sm_pwdb; |
526 | 525 | ||
527 | if ((!rtlpriv->dm.dynamic_txpower_enable) | 526 | if ((!rtlpriv->dm.dynamic_txpower_enable) |
528 | || rtlpriv->dm.dm_flag & HAL_DM_HIPWR_DISABLE) { | 527 | || rtlpriv->dm.dm_flag & HAL_DM_HIPWR_DISABLE) { |
@@ -539,62 +538,62 @@ static void rtl92d_dm_dynamic_txpower(struct ieee80211_hw *hw) | |||
539 | } | 538 | } |
540 | if (mac->link_state >= MAC80211_LINKED) { | 539 | if (mac->link_state >= MAC80211_LINKED) { |
541 | if (mac->opmode == NL80211_IFTYPE_ADHOC) { | 540 | if (mac->opmode == NL80211_IFTYPE_ADHOC) { |
542 | undecorated_smoothed_pwdb = | 541 | undec_sm_pwdb = |
543 | rtlpriv->dm.UNDEC_SM_PWDB; | 542 | rtlpriv->dm.UNDEC_SM_PWDB; |
544 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, | 543 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, |
545 | "IBSS Client PWDB = 0x%lx\n", | 544 | "IBSS Client PWDB = 0x%lx\n", |
546 | undecorated_smoothed_pwdb); | 545 | undec_sm_pwdb); |
547 | } else { | 546 | } else { |
548 | undecorated_smoothed_pwdb = | 547 | undec_sm_pwdb = |
549 | rtlpriv->dm.undecorated_smoothed_pwdb; | 548 | rtlpriv->dm.undec_sm_pwdb; |
550 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, | 549 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, |
551 | "STA Default Port PWDB = 0x%lx\n", | 550 | "STA Default Port PWDB = 0x%lx\n", |
552 | undecorated_smoothed_pwdb); | 551 | undec_sm_pwdb); |
553 | } | 552 | } |
554 | } else { | 553 | } else { |
555 | undecorated_smoothed_pwdb = | 554 | undec_sm_pwdb = |
556 | rtlpriv->dm.UNDEC_SM_PWDB; | 555 | rtlpriv->dm.UNDEC_SM_PWDB; |
557 | 556 | ||
558 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, | 557 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, |
559 | "AP Ext Port PWDB = 0x%lx\n", | 558 | "AP Ext Port PWDB = 0x%lx\n", |
560 | undecorated_smoothed_pwdb); | 559 | undec_sm_pwdb); |
561 | } | 560 | } |
562 | if (rtlhal->current_bandtype == BAND_ON_5G) { | 561 | if (rtlhal->current_bandtype == BAND_ON_5G) { |
563 | if (undecorated_smoothed_pwdb >= 0x33) { | 562 | if (undec_sm_pwdb >= 0x33) { |
564 | rtlpriv->dm.dynamic_txhighpower_lvl = | 563 | rtlpriv->dm.dynamic_txhighpower_lvl = |
565 | TXHIGHPWRLEVEL_LEVEL2; | 564 | TXHIGHPWRLEVEL_LEVEL2; |
566 | RT_TRACE(rtlpriv, COMP_HIPWR, DBG_LOUD, | 565 | RT_TRACE(rtlpriv, COMP_HIPWR, DBG_LOUD, |
567 | "5G:TxHighPwrLevel_Level2 (TxPwr=0x0)\n"); | 566 | "5G:TxHighPwrLevel_Level2 (TxPwr=0x0)\n"); |
568 | } else if ((undecorated_smoothed_pwdb < 0x33) | 567 | } else if ((undec_sm_pwdb < 0x33) |
569 | && (undecorated_smoothed_pwdb >= 0x2b)) { | 568 | && (undec_sm_pwdb >= 0x2b)) { |
570 | rtlpriv->dm.dynamic_txhighpower_lvl = | 569 | rtlpriv->dm.dynamic_txhighpower_lvl = |
571 | TXHIGHPWRLEVEL_LEVEL1; | 570 | TXHIGHPWRLEVEL_LEVEL1; |
572 | RT_TRACE(rtlpriv, COMP_HIPWR, DBG_LOUD, | 571 | RT_TRACE(rtlpriv, COMP_HIPWR, DBG_LOUD, |
573 | "5G:TxHighPwrLevel_Level1 (TxPwr=0x10)\n"); | 572 | "5G:TxHighPwrLevel_Level1 (TxPwr=0x10)\n"); |
574 | } else if (undecorated_smoothed_pwdb < 0x2b) { | 573 | } else if (undec_sm_pwdb < 0x2b) { |
575 | rtlpriv->dm.dynamic_txhighpower_lvl = | 574 | rtlpriv->dm.dynamic_txhighpower_lvl = |
576 | TXHIGHPWRLEVEL_NORMAL; | 575 | TXHIGHPWRLEVEL_NORMAL; |
577 | RT_TRACE(rtlpriv, COMP_HIPWR, DBG_LOUD, | 576 | RT_TRACE(rtlpriv, COMP_HIPWR, DBG_LOUD, |
578 | "5G:TxHighPwrLevel_Normal\n"); | 577 | "5G:TxHighPwrLevel_Normal\n"); |
579 | } | 578 | } |
580 | } else { | 579 | } else { |
581 | if (undecorated_smoothed_pwdb >= | 580 | if (undec_sm_pwdb >= |
582 | TX_POWER_NEAR_FIELD_THRESH_LVL2) { | 581 | TX_POWER_NEAR_FIELD_THRESH_LVL2) { |
583 | rtlpriv->dm.dynamic_txhighpower_lvl = | 582 | rtlpriv->dm.dynamic_txhighpower_lvl = |
584 | TXHIGHPWRLEVEL_LEVEL2; | 583 | TXHIGHPWRLEVEL_LEVEL2; |
585 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, | 584 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, |
586 | "TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x0)\n"); | 585 | "TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x0)\n"); |
587 | } else | 586 | } else |
588 | if ((undecorated_smoothed_pwdb < | 587 | if ((undec_sm_pwdb < |
589 | (TX_POWER_NEAR_FIELD_THRESH_LVL2 - 3)) | 588 | (TX_POWER_NEAR_FIELD_THRESH_LVL2 - 3)) |
590 | && (undecorated_smoothed_pwdb >= | 589 | && (undec_sm_pwdb >= |
591 | TX_POWER_NEAR_FIELD_THRESH_LVL1)) { | 590 | TX_POWER_NEAR_FIELD_THRESH_LVL1)) { |
592 | 591 | ||
593 | rtlpriv->dm.dynamic_txhighpower_lvl = | 592 | rtlpriv->dm.dynamic_txhighpower_lvl = |
594 | TXHIGHPWRLEVEL_LEVEL1; | 593 | TXHIGHPWRLEVEL_LEVEL1; |
595 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, | 594 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, |
596 | "TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x10)\n"); | 595 | "TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x10)\n"); |
597 | } else if (undecorated_smoothed_pwdb < | 596 | } else if (undec_sm_pwdb < |
598 | (TX_POWER_NEAR_FIELD_THRESH_LVL1 - 5)) { | 597 | (TX_POWER_NEAR_FIELD_THRESH_LVL1 - 5)) { |
599 | rtlpriv->dm.dynamic_txhighpower_lvl = | 598 | rtlpriv->dm.dynamic_txhighpower_lvl = |
600 | TXHIGHPWRLEVEL_NORMAL; | 599 | TXHIGHPWRLEVEL_NORMAL; |
@@ -620,7 +619,7 @@ static void rtl92d_dm_pwdb_monitor(struct ieee80211_hw *hw) | |||
620 | return; | 619 | return; |
621 | /* Indicate Rx signal strength to FW. */ | 620 | /* Indicate Rx signal strength to FW. */ |
622 | if (rtlpriv->dm.useramask) { | 621 | if (rtlpriv->dm.useramask) { |
623 | u32 temp = rtlpriv->dm.undecorated_smoothed_pwdb; | 622 | u32 temp = rtlpriv->dm.undec_sm_pwdb; |
624 | 623 | ||
625 | temp <<= 16; | 624 | temp <<= 16; |
626 | temp |= 0x100; | 625 | temp |= 0x100; |
@@ -629,7 +628,7 @@ static void rtl92d_dm_pwdb_monitor(struct ieee80211_hw *hw) | |||
629 | rtl92d_fill_h2c_cmd(hw, H2C_RSSI_REPORT, 3, (u8 *) (&temp)); | 628 | rtl92d_fill_h2c_cmd(hw, H2C_RSSI_REPORT, 3, (u8 *) (&temp)); |
630 | } else { | 629 | } else { |
631 | rtl_write_byte(rtlpriv, 0x4fe, | 630 | rtl_write_byte(rtlpriv, 0x4fe, |
632 | (u8) rtlpriv->dm.undecorated_smoothed_pwdb); | 631 | (u8) rtlpriv->dm.undec_sm_pwdb); |
633 | } | 632 | } |
634 | } | 633 | } |
635 | 634 | ||
diff --git a/drivers/net/wireless/rtlwifi/rtl8192de/phy.c b/drivers/net/wireless/rtlwifi/rtl8192de/phy.c index db0086062d05..33041bd4da81 100644 --- a/drivers/net/wireless/rtlwifi/rtl8192de/phy.c +++ b/drivers/net/wireless/rtlwifi/rtl8192de/phy.c | |||
@@ -298,13 +298,13 @@ static u32 _rtl92d_phy_rf_serial_read(struct ieee80211_hw *hw, | |||
298 | rfpi_enable = (u8) rtl_get_bbreg(hw, RFPGA0_XB_HSSIPARAMETER1, | 298 | rfpi_enable = (u8) rtl_get_bbreg(hw, RFPGA0_XB_HSSIPARAMETER1, |
299 | BIT(8)); | 299 | BIT(8)); |
300 | if (rfpi_enable) | 300 | if (rfpi_enable) |
301 | retvalue = rtl_get_bbreg(hw, pphyreg->rflssi_readbackpi, | 301 | retvalue = rtl_get_bbreg(hw, pphyreg->rf_rbpi, |
302 | BLSSIREADBACKDATA); | 302 | BLSSIREADBACKDATA); |
303 | else | 303 | else |
304 | retvalue = rtl_get_bbreg(hw, pphyreg->rflssi_readback, | 304 | retvalue = rtl_get_bbreg(hw, pphyreg->rf_rb, |
305 | BLSSIREADBACKDATA); | 305 | BLSSIREADBACKDATA); |
306 | RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, "RFR-%d Addr[0x%x] = 0x%x\n", | 306 | RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, "RFR-%d Addr[0x%x] = 0x%x\n", |
307 | rfpath, pphyreg->rflssi_readback, retvalue); | 307 | rfpath, pphyreg->rf_rb, retvalue); |
308 | return retvalue; | 308 | return retvalue; |
309 | } | 309 | } |
310 | 310 | ||
@@ -478,14 +478,10 @@ static void _rtl92d_phy_init_bb_rf_register_definition(struct ieee80211_hw *hw) | |||
478 | 478 | ||
479 | /* RF switch Control */ | 479 | /* RF switch Control */ |
480 | /* TR/Ant switch control */ | 480 | /* TR/Ant switch control */ |
481 | rtlphy->phyreg_def[RF90_PATH_A].rfswitch_control = | 481 | rtlphy->phyreg_def[RF90_PATH_A].rfsw_ctrl = RFPGA0_XAB_SWITCHCONTROL; |
482 | RFPGA0_XAB_SWITCHCONTROL; | 482 | rtlphy->phyreg_def[RF90_PATH_B].rfsw_ctrl = RFPGA0_XAB_SWITCHCONTROL; |
483 | rtlphy->phyreg_def[RF90_PATH_B].rfswitch_control = | 483 | rtlphy->phyreg_def[RF90_PATH_C].rfsw_ctrl = RFPGA0_XCD_SWITCHCONTROL; |
484 | RFPGA0_XAB_SWITCHCONTROL; | 484 | rtlphy->phyreg_def[RF90_PATH_D].rfsw_ctrl = RFPGA0_XCD_SWITCHCONTROL; |
485 | rtlphy->phyreg_def[RF90_PATH_C].rfswitch_control = | ||
486 | RFPGA0_XCD_SWITCHCONTROL; | ||
487 | rtlphy->phyreg_def[RF90_PATH_D].rfswitch_control = | ||
488 | RFPGA0_XCD_SWITCHCONTROL; | ||
489 | 485 | ||
490 | /* AGC control 1 */ | 486 | /* AGC control 1 */ |
491 | rtlphy->phyreg_def[RF90_PATH_A].rfagc_control1 = ROFDM0_XAAGCCORE1; | 487 | rtlphy->phyreg_def[RF90_PATH_A].rfagc_control1 = ROFDM0_XAAGCCORE1; |
@@ -500,14 +496,10 @@ static void _rtl92d_phy_init_bb_rf_register_definition(struct ieee80211_hw *hw) | |||
500 | rtlphy->phyreg_def[RF90_PATH_D].rfagc_control2 = ROFDM0_XDAGCCORE2; | 496 | rtlphy->phyreg_def[RF90_PATH_D].rfagc_control2 = ROFDM0_XDAGCCORE2; |
501 | 497 | ||
502 | /* RX AFE control 1 */ | 498 | /* RX AFE control 1 */ |
503 | rtlphy->phyreg_def[RF90_PATH_A].rfrxiq_imbalance = | 499 | rtlphy->phyreg_def[RF90_PATH_A].rfrxiq_imbal = ROFDM0_XARXIQIMBALANCE; |
504 | ROFDM0_XARXIQIMBALANCE; | 500 | rtlphy->phyreg_def[RF90_PATH_B].rfrxiq_imbal = ROFDM0_XBRXIQIMBALANCE; |
505 | rtlphy->phyreg_def[RF90_PATH_B].rfrxiq_imbalance = | 501 | rtlphy->phyreg_def[RF90_PATH_C].rfrxiq_imbal = ROFDM0_XCRXIQIMBALANCE; |
506 | ROFDM0_XBRXIQIMBALANCE; | 502 | rtlphy->phyreg_def[RF90_PATH_D].rfrxiq_imbal = ROFDM0_XDRXIQIMBALANCE; |
507 | rtlphy->phyreg_def[RF90_PATH_C].rfrxiq_imbalance = | ||
508 | ROFDM0_XCRXIQIMBALANCE; | ||
509 | rtlphy->phyreg_def[RF90_PATH_D].rfrxiq_imbalance = | ||
510 | ROFDM0_XDRXIQIMBALANCE; | ||
511 | 503 | ||
512 | /*RX AFE control 1 */ | 504 | /*RX AFE control 1 */ |
513 | rtlphy->phyreg_def[RF90_PATH_A].rfrx_afe = ROFDM0_XARXAFE; | 505 | rtlphy->phyreg_def[RF90_PATH_A].rfrx_afe = ROFDM0_XARXAFE; |
@@ -516,14 +508,10 @@ static void _rtl92d_phy_init_bb_rf_register_definition(struct ieee80211_hw *hw) | |||
516 | rtlphy->phyreg_def[RF90_PATH_D].rfrx_afe = ROFDM0_XDRXAFE; | 508 | rtlphy->phyreg_def[RF90_PATH_D].rfrx_afe = ROFDM0_XDRXAFE; |
517 | 509 | ||
518 | /* Tx AFE control 1 */ | 510 | /* Tx AFE control 1 */ |
519 | rtlphy->phyreg_def[RF90_PATH_A].rftxiq_imbalance = | 511 | rtlphy->phyreg_def[RF90_PATH_A].rftxiq_imbal = ROFDM0_XATxIQIMBALANCE; |
520 | ROFDM0_XATxIQIMBALANCE; | 512 | rtlphy->phyreg_def[RF90_PATH_B].rftxiq_imbal = ROFDM0_XBTxIQIMBALANCE; |
521 | rtlphy->phyreg_def[RF90_PATH_B].rftxiq_imbalance = | 513 | rtlphy->phyreg_def[RF90_PATH_C].rftxiq_imbal = ROFDM0_XCTxIQIMBALANCE; |
522 | ROFDM0_XBTxIQIMBALANCE; | 514 | rtlphy->phyreg_def[RF90_PATH_D].rftxiq_imbal = ROFDM0_XDTxIQIMBALANCE; |
523 | rtlphy->phyreg_def[RF90_PATH_C].rftxiq_imbalance = | ||
524 | ROFDM0_XCTxIQIMBALANCE; | ||
525 | rtlphy->phyreg_def[RF90_PATH_D].rftxiq_imbalance = | ||
526 | ROFDM0_XDTxIQIMBALANCE; | ||
527 | 515 | ||
528 | /* Tx AFE control 2 */ | 516 | /* Tx AFE control 2 */ |
529 | rtlphy->phyreg_def[RF90_PATH_A].rftx_afe = ROFDM0_XATxAFE; | 517 | rtlphy->phyreg_def[RF90_PATH_A].rftx_afe = ROFDM0_XATxAFE; |
@@ -532,20 +520,14 @@ static void _rtl92d_phy_init_bb_rf_register_definition(struct ieee80211_hw *hw) | |||
532 | rtlphy->phyreg_def[RF90_PATH_D].rftx_afe = ROFDM0_XDTxAFE; | 520 | rtlphy->phyreg_def[RF90_PATH_D].rftx_afe = ROFDM0_XDTxAFE; |
533 | 521 | ||
534 | /* Tranceiver LSSI Readback SI mode */ | 522 | /* Tranceiver LSSI Readback SI mode */ |
535 | rtlphy->phyreg_def[RF90_PATH_A].rflssi_readback = | 523 | rtlphy->phyreg_def[RF90_PATH_A].rf_rb = RFPGA0_XA_LSSIREADBACK; |
536 | RFPGA0_XA_LSSIREADBACK; | 524 | rtlphy->phyreg_def[RF90_PATH_B].rf_rb = RFPGA0_XB_LSSIREADBACK; |
537 | rtlphy->phyreg_def[RF90_PATH_B].rflssi_readback = | 525 | rtlphy->phyreg_def[RF90_PATH_C].rf_rb = RFPGA0_XC_LSSIREADBACK; |
538 | RFPGA0_XB_LSSIREADBACK; | 526 | rtlphy->phyreg_def[RF90_PATH_D].rf_rb = RFPGA0_XD_LSSIREADBACK; |
539 | rtlphy->phyreg_def[RF90_PATH_C].rflssi_readback = | ||
540 | RFPGA0_XC_LSSIREADBACK; | ||
541 | rtlphy->phyreg_def[RF90_PATH_D].rflssi_readback = | ||
542 | RFPGA0_XD_LSSIREADBACK; | ||
543 | 527 | ||
544 | /* Tranceiver LSSI Readback PI mode */ | 528 | /* Tranceiver LSSI Readback PI mode */ |
545 | rtlphy->phyreg_def[RF90_PATH_A].rflssi_readbackpi = | 529 | rtlphy->phyreg_def[RF90_PATH_A].rf_rbpi = TRANSCEIVERA_HSPI_READBACK; |
546 | TRANSCEIVERA_HSPI_READBACK; | 530 | rtlphy->phyreg_def[RF90_PATH_B].rf_rbpi = TRANSCEIVERB_HSPI_READBACK; |
547 | rtlphy->phyreg_def[RF90_PATH_B].rflssi_readbackpi = | ||
548 | TRANSCEIVERB_HSPI_READBACK; | ||
549 | } | 531 | } |
550 | 532 | ||
551 | static bool _rtl92d_phy_config_bb_with_headerfile(struct ieee80211_hw *hw, | 533 | static bool _rtl92d_phy_config_bb_with_headerfile(struct ieee80211_hw *hw, |
@@ -702,12 +684,11 @@ static void _rtl92d_store_pwrindex_diffrate_offset(struct ieee80211_hw *hw, | |||
702 | else | 684 | else |
703 | return; | 685 | return; |
704 | 686 | ||
705 | rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][index] = data; | 687 | rtlphy->mcs_offset[rtlphy->pwrgroup_cnt][index] = data; |
706 | RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, | 688 | RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, |
707 | "MCSTxPowerLevelOriginalOffset[%d][%d] = 0x%ulx\n", | 689 | "MCSTxPowerLevelOriginalOffset[%d][%d] = 0x%ulx\n", |
708 | rtlphy->pwrgroup_cnt, index, | 690 | rtlphy->pwrgroup_cnt, index, |
709 | rtlphy->mcs_txpwrlevel_origoffset | 691 | rtlphy->mcs_offset[rtlphy->pwrgroup_cnt][index]); |
710 | [rtlphy->pwrgroup_cnt][index]); | ||
711 | if (index == 13) | 692 | if (index == 13) |
712 | rtlphy->pwrgroup_cnt++; | 693 | rtlphy->pwrgroup_cnt++; |
713 | } | 694 | } |
diff --git a/drivers/net/wireless/rtlwifi/rtl8192de/rf.c b/drivers/net/wireless/rtlwifi/rtl8192de/rf.c index 3066a7fb0b57..20144e0b4142 100644 --- a/drivers/net/wireless/rtlwifi/rtl8192de/rf.c +++ b/drivers/net/wireless/rtlwifi/rtl8192de/rf.c | |||
@@ -106,11 +106,11 @@ void rtl92d_phy_rf6052_set_cck_txpower(struct ieee80211_hw *hw, | |||
106 | (ppowerlevel[idx1] << 24); | 106 | (ppowerlevel[idx1] << 24); |
107 | } | 107 | } |
108 | if (rtlefuse->eeprom_regulatory == 0) { | 108 | if (rtlefuse->eeprom_regulatory == 0) { |
109 | tmpval = (rtlphy->mcs_txpwrlevel_origoffset[0][6]) + | 109 | tmpval = (rtlphy->mcs_offset[0][6]) + |
110 | (rtlphy->mcs_txpwrlevel_origoffset[0][7] << 8); | 110 | (rtlphy->mcs_offset[0][7] << 8); |
111 | tx_agc[RF90_PATH_A] += tmpval; | 111 | tx_agc[RF90_PATH_A] += tmpval; |
112 | tmpval = (rtlphy->mcs_txpwrlevel_origoffset[0][14]) + | 112 | tmpval = (rtlphy->mcs_offset[0][14]) + |
113 | (rtlphy->mcs_txpwrlevel_origoffset[0][15] << 24); | 113 | (rtlphy->mcs_offset[0][15] << 24); |
114 | tx_agc[RF90_PATH_B] += tmpval; | 114 | tx_agc[RF90_PATH_B] += tmpval; |
115 | } | 115 | } |
116 | } | 116 | } |
@@ -227,7 +227,7 @@ static void _rtl92d_get_txpower_writeval_by_regulatory(struct ieee80211_hw *hw, | |||
227 | switch (rtlefuse->eeprom_regulatory) { | 227 | switch (rtlefuse->eeprom_regulatory) { |
228 | case 0: | 228 | case 0: |
229 | chnlgroup = 0; | 229 | chnlgroup = 0; |
230 | writeval = rtlphy->mcs_txpwrlevel_origoffset | 230 | writeval = rtlphy->mcs_offset |
231 | [chnlgroup][index + | 231 | [chnlgroup][index + |
232 | (rf ? 8 : 0)] + ((index < 2) ? | 232 | (rf ? 8 : 0)] + ((index < 2) ? |
233 | powerbase0[rf] : | 233 | powerbase0[rf] : |
@@ -247,7 +247,7 @@ static void _rtl92d_get_txpower_writeval_by_regulatory(struct ieee80211_hw *hw, | |||
247 | chnlgroup++; | 247 | chnlgroup++; |
248 | else | 248 | else |
249 | chnlgroup += 4; | 249 | chnlgroup += 4; |
250 | writeval = rtlphy->mcs_txpwrlevel_origoffset | 250 | writeval = rtlphy->mcs_offset |
251 | [chnlgroup][index + | 251 | [chnlgroup][index + |
252 | (rf ? 8 : 0)] + ((index < 2) ? | 252 | (rf ? 8 : 0)] + ((index < 2) ? |
253 | powerbase0[rf] : | 253 | powerbase0[rf] : |
@@ -280,8 +280,7 @@ static void _rtl92d_get_txpower_writeval_by_regulatory(struct ieee80211_hw *hw, | |||
280 | [channel - 1]); | 280 | [channel - 1]); |
281 | } | 281 | } |
282 | for (i = 0; i < 4; i++) { | 282 | for (i = 0; i < 4; i++) { |
283 | pwr_diff_limit[i] = | 283 | pwr_diff_limit[i] = (u8)((rtlphy->mcs_offset |
284 | (u8)((rtlphy->mcs_txpwrlevel_origoffset | ||
285 | [chnlgroup][index + (rf ? 8 : 0)] & | 284 | [chnlgroup][index + (rf ? 8 : 0)] & |
286 | (0x7f << (i * 8))) >> (i * 8)); | 285 | (0x7f << (i * 8))) >> (i * 8)); |
287 | if (rtlphy->current_chan_bw == | 286 | if (rtlphy->current_chan_bw == |
@@ -316,8 +315,7 @@ static void _rtl92d_get_txpower_writeval_by_regulatory(struct ieee80211_hw *hw, | |||
316 | break; | 315 | break; |
317 | default: | 316 | default: |
318 | chnlgroup = 0; | 317 | chnlgroup = 0; |
319 | writeval = rtlphy->mcs_txpwrlevel_origoffset | 318 | writeval = rtlphy->mcs_offset[chnlgroup][index + |
320 | [chnlgroup][index + | ||
321 | (rf ? 8 : 0)] + ((index < 2) ? | 319 | (rf ? 8 : 0)] + ((index < 2) ? |
322 | powerbase0[rf] : powerbase1[rf]); | 320 | powerbase0[rf] : powerbase1[rf]); |
323 | RTPRINT(rtlpriv, FPHY, PHY_TXPWR, | 321 | RTPRINT(rtlpriv, FPHY, PHY_TXPWR, |
diff --git a/drivers/net/wireless/rtlwifi/rtl8192de/trx.c b/drivers/net/wireless/rtlwifi/rtl8192de/trx.c index 4686f340b9d6..35bb9da6196a 100644 --- a/drivers/net/wireless/rtlwifi/rtl8192de/trx.c +++ b/drivers/net/wireless/rtlwifi/rtl8192de/trx.c | |||
@@ -132,8 +132,8 @@ static void _rtl92de_query_rxphystatus(struct ieee80211_hw *hw, | |||
132 | pstats->packet_toself = packet_toself; | 132 | pstats->packet_toself = packet_toself; |
133 | pstats->packet_beacon = packet_beacon; | 133 | pstats->packet_beacon = packet_beacon; |
134 | pstats->is_cck = is_cck_rate; | 134 | pstats->is_cck = is_cck_rate; |
135 | pstats->rx_mimo_signalquality[0] = -1; | 135 | pstats->rx_mimo_sig_qual[0] = -1; |
136 | pstats->rx_mimo_signalquality[1] = -1; | 136 | pstats->rx_mimo_sig_qual[1] = -1; |
137 | 137 | ||
138 | if (is_cck_rate) { | 138 | if (is_cck_rate) { |
139 | u8 report, cck_highpwr; | 139 | u8 report, cck_highpwr; |
@@ -212,8 +212,8 @@ static void _rtl92de_query_rxphystatus(struct ieee80211_hw *hw, | |||
212 | sq = ((64 - sq) * 100) / 44; | 212 | sq = ((64 - sq) * 100) / 44; |
213 | } | 213 | } |
214 | pstats->signalquality = sq; | 214 | pstats->signalquality = sq; |
215 | pstats->rx_mimo_signalquality[0] = sq; | 215 | pstats->rx_mimo_sig_qual[0] = sq; |
216 | pstats->rx_mimo_signalquality[1] = -1; | 216 | pstats->rx_mimo_sig_qual[1] = -1; |
217 | } | 217 | } |
218 | } else { | 218 | } else { |
219 | rtlpriv->dm.rfpath_rxenable[0] = true; | 219 | rtlpriv->dm.rfpath_rxenable[0] = true; |
@@ -246,7 +246,7 @@ static void _rtl92de_query_rxphystatus(struct ieee80211_hw *hw, | |||
246 | if (i == 0) | 246 | if (i == 0) |
247 | pstats->signalquality = | 247 | pstats->signalquality = |
248 | (u8)(evm & 0xff); | 248 | (u8)(evm & 0xff); |
249 | pstats->rx_mimo_signalquality[i] = | 249 | pstats->rx_mimo_sig_qual[i] = |
250 | (u8)(evm & 0xff); | 250 | (u8)(evm & 0xff); |
251 | } | 251 | } |
252 | } | 252 | } |
@@ -345,33 +345,28 @@ static void _rtl92de_process_pwdb(struct ieee80211_hw *hw, | |||
345 | { | 345 | { |
346 | struct rtl_priv *rtlpriv = rtl_priv(hw); | 346 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
347 | struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); | 347 | struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); |
348 | long undecorated_smoothed_pwdb; | 348 | long undec_sm_pwdb; |
349 | 349 | ||
350 | if (mac->opmode == NL80211_IFTYPE_ADHOC || | 350 | if (mac->opmode == NL80211_IFTYPE_ADHOC || |
351 | mac->opmode == NL80211_IFTYPE_AP) | 351 | mac->opmode == NL80211_IFTYPE_AP) |
352 | return; | 352 | return; |
353 | else | 353 | else |
354 | undecorated_smoothed_pwdb = | 354 | undec_sm_pwdb = rtlpriv->dm.undec_sm_pwdb; |
355 | rtlpriv->dm.undecorated_smoothed_pwdb; | ||
356 | 355 | ||
357 | if (pstats->packet_toself || pstats->packet_beacon) { | 356 | if (pstats->packet_toself || pstats->packet_beacon) { |
358 | if (undecorated_smoothed_pwdb < 0) | 357 | if (undec_sm_pwdb < 0) |
359 | undecorated_smoothed_pwdb = pstats->rx_pwdb_all; | 358 | undec_sm_pwdb = pstats->rx_pwdb_all; |
360 | if (pstats->rx_pwdb_all > (u32) undecorated_smoothed_pwdb) { | 359 | if (pstats->rx_pwdb_all > (u32) undec_sm_pwdb) { |
361 | undecorated_smoothed_pwdb = | 360 | undec_sm_pwdb = (((undec_sm_pwdb) * |
362 | (((undecorated_smoothed_pwdb) * | ||
363 | (RX_SMOOTH_FACTOR - 1)) + | 361 | (RX_SMOOTH_FACTOR - 1)) + |
364 | (pstats->rx_pwdb_all)) / (RX_SMOOTH_FACTOR); | 362 | (pstats->rx_pwdb_all)) / (RX_SMOOTH_FACTOR); |
365 | undecorated_smoothed_pwdb = | 363 | undec_sm_pwdb = undec_sm_pwdb + 1; |
366 | undecorated_smoothed_pwdb + 1; | ||
367 | } else { | 364 | } else { |
368 | undecorated_smoothed_pwdb = | 365 | undec_sm_pwdb = (((undec_sm_pwdb) * |
369 | (((undecorated_smoothed_pwdb) * | ||
370 | (RX_SMOOTH_FACTOR - 1)) + | 366 | (RX_SMOOTH_FACTOR - 1)) + |
371 | (pstats->rx_pwdb_all)) / (RX_SMOOTH_FACTOR); | 367 | (pstats->rx_pwdb_all)) / (RX_SMOOTH_FACTOR); |
372 | } | 368 | } |
373 | rtlpriv->dm.undecorated_smoothed_pwdb = | 369 | rtlpriv->dm.undec_sm_pwdb = undec_sm_pwdb; |
374 | undecorated_smoothed_pwdb; | ||
375 | _rtl92de_update_rxsignalstatistics(hw, pstats); | 370 | _rtl92de_update_rxsignalstatistics(hw, pstats); |
376 | } | 371 | } |
377 | } | 372 | } |
@@ -383,15 +378,15 @@ static void rtl92d_loop_over_streams(struct ieee80211_hw *hw, | |||
383 | int stream; | 378 | int stream; |
384 | 379 | ||
385 | for (stream = 0; stream < 2; stream++) { | 380 | for (stream = 0; stream < 2; stream++) { |
386 | if (pstats->rx_mimo_signalquality[stream] != -1) { | 381 | if (pstats->rx_mimo_sig_qual[stream] != -1) { |
387 | if (rtlpriv->stats.rx_evm_percentage[stream] == 0) { | 382 | if (rtlpriv->stats.rx_evm_percentage[stream] == 0) { |
388 | rtlpriv->stats.rx_evm_percentage[stream] = | 383 | rtlpriv->stats.rx_evm_percentage[stream] = |
389 | pstats->rx_mimo_signalquality[stream]; | 384 | pstats->rx_mimo_sig_qual[stream]; |
390 | } | 385 | } |
391 | rtlpriv->stats.rx_evm_percentage[stream] = | 386 | rtlpriv->stats.rx_evm_percentage[stream] = |
392 | ((rtlpriv->stats.rx_evm_percentage[stream] | 387 | ((rtlpriv->stats.rx_evm_percentage[stream] |
393 | * (RX_SMOOTH_FACTOR - 1)) + | 388 | * (RX_SMOOTH_FACTOR - 1)) + |
394 | (pstats->rx_mimo_signalquality[stream] * 1)) / | 389 | (pstats->rx_mimo_sig_qual[stream] * 1)) / |
395 | (RX_SMOOTH_FACTOR); | 390 | (RX_SMOOTH_FACTOR); |
396 | } | 391 | } |
397 | } | 392 | } |
diff --git a/drivers/net/wireless/rtlwifi/rtl8192se/dm.c b/drivers/net/wireless/rtlwifi/rtl8192se/dm.c index 465f58157101..bf79a52c8a52 100644 --- a/drivers/net/wireless/rtlwifi/rtl8192se/dm.c +++ b/drivers/net/wireless/rtlwifi/rtl8192se/dm.c | |||
@@ -267,13 +267,12 @@ static void _rtl92s_dm_refresh_rateadaptive_mask(struct ieee80211_hw *hw) | |||
267 | break; | 267 | break; |
268 | } | 268 | } |
269 | 269 | ||
270 | if (rtlpriv->dm.undecorated_smoothed_pwdb > | 270 | if (rtlpriv->dm.undec_sm_pwdb > (long)high_rssi_thresh) { |
271 | (long)high_rssi_thresh) { | ||
272 | ra->ratr_state = DM_RATR_STA_HIGH; | 271 | ra->ratr_state = DM_RATR_STA_HIGH; |
273 | } else if (rtlpriv->dm.undecorated_smoothed_pwdb > | 272 | } else if (rtlpriv->dm.undec_sm_pwdb > |
274 | (long)middle_rssi_thresh) { | 273 | (long)middle_rssi_thresh) { |
275 | ra->ratr_state = DM_RATR_STA_LOW; | 274 | ra->ratr_state = DM_RATR_STA_LOW; |
276 | } else if (rtlpriv->dm.undecorated_smoothed_pwdb > | 275 | } else if (rtlpriv->dm.undec_sm_pwdb > |
277 | (long)low_rssi_thresh) { | 276 | (long)low_rssi_thresh) { |
278 | ra->ratr_state = DM_RATR_STA_LOW; | 277 | ra->ratr_state = DM_RATR_STA_LOW; |
279 | } else { | 278 | } else { |
@@ -283,8 +282,7 @@ static void _rtl92s_dm_refresh_rateadaptive_mask(struct ieee80211_hw *hw) | |||
283 | if (ra->pre_ratr_state != ra->ratr_state) { | 282 | if (ra->pre_ratr_state != ra->ratr_state) { |
284 | RT_TRACE(rtlpriv, COMP_RATE, DBG_LOUD, | 283 | RT_TRACE(rtlpriv, COMP_RATE, DBG_LOUD, |
285 | "RSSI = %ld RSSI_LEVEL = %d PreState = %d, CurState = %d\n", | 284 | "RSSI = %ld RSSI_LEVEL = %d PreState = %d, CurState = %d\n", |
286 | rtlpriv->dm.undecorated_smoothed_pwdb, | 285 | rtlpriv->dm.undec_sm_pwdb, ra->ratr_state, |
287 | ra->ratr_state, | ||
288 | ra->pre_ratr_state, ra->ratr_state); | 286 | ra->pre_ratr_state, ra->ratr_state); |
289 | 287 | ||
290 | rtlpriv->cfg->ops->update_rate_tbl(hw, sta, | 288 | rtlpriv->cfg->ops->update_rate_tbl(hw, sta, |
@@ -316,7 +314,7 @@ static void _rtl92s_dm_switch_baseband_mrc(struct ieee80211_hw *hw) | |||
316 | rtlpriv->cfg->ops->get_hw_reg(hw, HW_VAR_MRC, (u8 *)(¤t_mrc)); | 314 | rtlpriv->cfg->ops->get_hw_reg(hw, HW_VAR_MRC, (u8 *)(¤t_mrc)); |
317 | 315 | ||
318 | if (mac->link_state >= MAC80211_LINKED) { | 316 | if (mac->link_state >= MAC80211_LINKED) { |
319 | if (rtlpriv->dm.undecorated_smoothed_pwdb > tmpentry_maxpwdb) { | 317 | if (rtlpriv->dm.undec_sm_pwdb > tmpentry_maxpwdb) { |
320 | rssi_a = rtlpriv->stats.rx_rssi_percentage[RF90_PATH_A]; | 318 | rssi_a = rtlpriv->stats.rx_rssi_percentage[RF90_PATH_A]; |
321 | rssi_b = rtlpriv->stats.rx_rssi_percentage[RF90_PATH_B]; | 319 | rssi_b = rtlpriv->stats.rx_rssi_percentage[RF90_PATH_B]; |
322 | } | 320 | } |
@@ -424,18 +422,18 @@ static void rtl92s_backoff_enable_flag(struct ieee80211_hw *hw) | |||
424 | struct false_alarm_statistics *falsealm_cnt = &(rtlpriv->falsealm_cnt); | 422 | struct false_alarm_statistics *falsealm_cnt = &(rtlpriv->falsealm_cnt); |
425 | 423 | ||
426 | if (falsealm_cnt->cnt_all > digtable->fa_highthresh) { | 424 | if (falsealm_cnt->cnt_all > digtable->fa_highthresh) { |
427 | if ((digtable->backoff_val - 6) < | 425 | if ((digtable->back_val - 6) < |
428 | digtable->backoffval_range_min) | 426 | digtable->backoffval_range_min) |
429 | digtable->backoff_val = digtable->backoffval_range_min; | 427 | digtable->back_val = digtable->backoffval_range_min; |
430 | else | 428 | else |
431 | digtable->backoff_val -= 6; | 429 | digtable->back_val -= 6; |
432 | } else if (falsealm_cnt->cnt_all < digtable->fa_lowthresh) { | 430 | } else if (falsealm_cnt->cnt_all < digtable->fa_lowthresh) { |
433 | if ((digtable->backoff_val + 6) > | 431 | if ((digtable->back_val + 6) > |
434 | digtable->backoffval_range_max) | 432 | digtable->backoffval_range_max) |
435 | digtable->backoff_val = | 433 | digtable->back_val = |
436 | digtable->backoffval_range_max; | 434 | digtable->backoffval_range_max; |
437 | else | 435 | else |
438 | digtable->backoff_val += 6; | 436 | digtable->back_val += 6; |
439 | } | 437 | } |
440 | } | 438 | } |
441 | 439 | ||
@@ -447,28 +445,28 @@ static void _rtl92s_dm_initial_gain_sta_beforeconnect(struct ieee80211_hw *hw) | |||
447 | static u8 initialized, force_write; | 445 | static u8 initialized, force_write; |
448 | u8 initial_gain = 0; | 446 | u8 initial_gain = 0; |
449 | 447 | ||
450 | if ((digtable->pre_sta_connectstate == digtable->cur_sta_connectstate) || | 448 | if ((digtable->pre_sta_cstate == digtable->cur_sta_cstate) || |
451 | (digtable->cur_sta_connectstate == DIG_STA_BEFORE_CONNECT)) { | 449 | (digtable->cur_sta_cstate == DIG_STA_BEFORE_CONNECT)) { |
452 | if (digtable->cur_sta_connectstate == DIG_STA_BEFORE_CONNECT) { | 450 | if (digtable->cur_sta_cstate == DIG_STA_BEFORE_CONNECT) { |
453 | if (rtlpriv->psc.rfpwr_state != ERFON) | 451 | if (rtlpriv->psc.rfpwr_state != ERFON) |
454 | return; | 452 | return; |
455 | 453 | ||
456 | if (digtable->backoff_enable_flag) | 454 | if (digtable->backoff_enable_flag) |
457 | rtl92s_backoff_enable_flag(hw); | 455 | rtl92s_backoff_enable_flag(hw); |
458 | else | 456 | else |
459 | digtable->backoff_val = DM_DIG_BACKOFF; | 457 | digtable->back_val = DM_DIG_BACKOFF; |
460 | 458 | ||
461 | if ((digtable->rssi_val + 10 - digtable->backoff_val) > | 459 | if ((digtable->rssi_val + 10 - digtable->back_val) > |
462 | digtable->rx_gain_range_max) | 460 | digtable->rx_gain_range_max) |
463 | digtable->cur_igvalue = | 461 | digtable->cur_igvalue = |
464 | digtable->rx_gain_range_max; | 462 | digtable->rx_gain_range_max; |
465 | else if ((digtable->rssi_val + 10 - digtable->backoff_val) | 463 | else if ((digtable->rssi_val + 10 - digtable->back_val) |
466 | < digtable->rx_gain_range_min) | 464 | < digtable->rx_gain_range_min) |
467 | digtable->cur_igvalue = | 465 | digtable->cur_igvalue = |
468 | digtable->rx_gain_range_min; | 466 | digtable->rx_gain_range_min; |
469 | else | 467 | else |
470 | digtable->cur_igvalue = digtable->rssi_val + 10 - | 468 | digtable->cur_igvalue = digtable->rssi_val + 10 - |
471 | digtable->backoff_val; | 469 | digtable->back_val; |
472 | 470 | ||
473 | if (falsealm_cnt->cnt_all > 10000) | 471 | if (falsealm_cnt->cnt_all > 10000) |
474 | digtable->cur_igvalue = | 472 | digtable->cur_igvalue = |
@@ -490,7 +488,7 @@ static void _rtl92s_dm_initial_gain_sta_beforeconnect(struct ieee80211_hw *hw) | |||
490 | digtable->dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX; | 488 | digtable->dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX; |
491 | rtl92s_phy_set_fw_cmd(hw, FW_CMD_DIG_ENABLE); | 489 | rtl92s_phy_set_fw_cmd(hw, FW_CMD_DIG_ENABLE); |
492 | 490 | ||
493 | digtable->backoff_val = DM_DIG_BACKOFF; | 491 | digtable->back_val = DM_DIG_BACKOFF; |
494 | digtable->cur_igvalue = rtlpriv->phy.default_initialgain[0]; | 492 | digtable->cur_igvalue = rtlpriv->phy.default_initialgain[0]; |
495 | digtable->pre_igvalue = 0; | 493 | digtable->pre_igvalue = 0; |
496 | return; | 494 | return; |
@@ -528,14 +526,14 @@ static void _rtl92s_dm_ctrl_initgain_bytwoport(struct ieee80211_hw *hw) | |||
528 | /* Decide the current status and if modify initial gain or not */ | 526 | /* Decide the current status and if modify initial gain or not */ |
529 | if (rtlpriv->mac80211.link_state >= MAC80211_LINKED || | 527 | if (rtlpriv->mac80211.link_state >= MAC80211_LINKED || |
530 | rtlpriv->mac80211.opmode == NL80211_IFTYPE_ADHOC) | 528 | rtlpriv->mac80211.opmode == NL80211_IFTYPE_ADHOC) |
531 | digtable->cur_sta_connectstate = DIG_STA_CONNECT; | 529 | digtable->cur_sta_cstate = DIG_STA_CONNECT; |
532 | else | 530 | else |
533 | digtable->cur_sta_connectstate = DIG_STA_DISCONNECT; | 531 | digtable->cur_sta_cstate = DIG_STA_DISCONNECT; |
534 | 532 | ||
535 | digtable->rssi_val = rtlpriv->dm.undecorated_smoothed_pwdb; | 533 | digtable->rssi_val = rtlpriv->dm.undec_sm_pwdb; |
536 | 534 | ||
537 | /* Change dig mode to rssi */ | 535 | /* Change dig mode to rssi */ |
538 | if (digtable->cur_sta_connectstate != DIG_STA_DISCONNECT) { | 536 | if (digtable->cur_sta_cstate != DIG_STA_DISCONNECT) { |
539 | if (digtable->dig_twoport_algorithm == | 537 | if (digtable->dig_twoport_algorithm == |
540 | DIG_TWO_PORT_ALGO_FALSE_ALARM) { | 538 | DIG_TWO_PORT_ALGO_FALSE_ALARM) { |
541 | digtable->dig_twoport_algorithm = DIG_TWO_PORT_ALGO_RSSI; | 539 | digtable->dig_twoport_algorithm = DIG_TWO_PORT_ALGO_RSSI; |
@@ -546,7 +544,7 @@ static void _rtl92s_dm_ctrl_initgain_bytwoport(struct ieee80211_hw *hw) | |||
546 | _rtl92s_dm_false_alarm_counter_statistics(hw); | 544 | _rtl92s_dm_false_alarm_counter_statistics(hw); |
547 | _rtl92s_dm_initial_gain_sta_beforeconnect(hw); | 545 | _rtl92s_dm_initial_gain_sta_beforeconnect(hw); |
548 | 546 | ||
549 | digtable->pre_sta_connectstate = digtable->cur_sta_connectstate; | 547 | digtable->pre_sta_cstate = digtable->cur_sta_cstate; |
550 | } | 548 | } |
551 | 549 | ||
552 | static void _rtl92s_dm_ctrl_initgain_byrssi(struct ieee80211_hw *hw) | 550 | static void _rtl92s_dm_ctrl_initgain_byrssi(struct ieee80211_hw *hw) |
@@ -573,7 +571,7 @@ static void _rtl92s_dm_dynamic_txpower(struct ieee80211_hw *hw) | |||
573 | struct rtl_priv *rtlpriv = rtl_priv(hw); | 571 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
574 | struct rtl_phy *rtlphy = &(rtlpriv->phy); | 572 | struct rtl_phy *rtlphy = &(rtlpriv->phy); |
575 | struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); | 573 | struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); |
576 | long undecorated_smoothed_pwdb; | 574 | long undec_sm_pwdb; |
577 | long txpwr_threshold_lv1, txpwr_threshold_lv2; | 575 | long txpwr_threshold_lv1, txpwr_threshold_lv2; |
578 | 576 | ||
579 | /* 2T2R TP issue */ | 577 | /* 2T2R TP issue */ |
@@ -587,7 +585,7 @@ static void _rtl92s_dm_dynamic_txpower(struct ieee80211_hw *hw) | |||
587 | } | 585 | } |
588 | 586 | ||
589 | if ((mac->link_state < MAC80211_LINKED) && | 587 | if ((mac->link_state < MAC80211_LINKED) && |
590 | (rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb == 0)) { | 588 | (rtlpriv->dm.entry_min_undec_sm_pwdb == 0)) { |
591 | RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE, | 589 | RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE, |
592 | "Not connected to any\n"); | 590 | "Not connected to any\n"); |
593 | 591 | ||
@@ -599,25 +597,22 @@ static void _rtl92s_dm_dynamic_txpower(struct ieee80211_hw *hw) | |||
599 | 597 | ||
600 | if (mac->link_state >= MAC80211_LINKED) { | 598 | if (mac->link_state >= MAC80211_LINKED) { |
601 | if (mac->opmode == NL80211_IFTYPE_ADHOC) { | 599 | if (mac->opmode == NL80211_IFTYPE_ADHOC) { |
602 | undecorated_smoothed_pwdb = | 600 | undec_sm_pwdb = rtlpriv->dm.entry_min_undec_sm_pwdb; |
603 | rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb; | ||
604 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, | 601 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, |
605 | "AP Client PWDB = 0x%lx\n", | 602 | "AP Client PWDB = 0x%lx\n", |
606 | undecorated_smoothed_pwdb); | 603 | undec_sm_pwdb); |
607 | } else { | 604 | } else { |
608 | undecorated_smoothed_pwdb = | 605 | undec_sm_pwdb = rtlpriv->dm.undec_sm_pwdb; |
609 | rtlpriv->dm.undecorated_smoothed_pwdb; | ||
610 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, | 606 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, |
611 | "STA Default Port PWDB = 0x%lx\n", | 607 | "STA Default Port PWDB = 0x%lx\n", |
612 | undecorated_smoothed_pwdb); | 608 | undec_sm_pwdb); |
613 | } | 609 | } |
614 | } else { | 610 | } else { |
615 | undecorated_smoothed_pwdb = | 611 | undec_sm_pwdb = rtlpriv->dm.entry_min_undec_sm_pwdb; |
616 | rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb; | ||
617 | 612 | ||
618 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, | 613 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, |
619 | "AP Ext Port PWDB = 0x%lx\n", | 614 | "AP Ext Port PWDB = 0x%lx\n", |
620 | undecorated_smoothed_pwdb); | 615 | undec_sm_pwdb); |
621 | } | 616 | } |
622 | 617 | ||
623 | txpwr_threshold_lv2 = TX_POWER_NEAR_FIELD_THRESH_LVL2; | 618 | txpwr_threshold_lv2 = TX_POWER_NEAR_FIELD_THRESH_LVL2; |
@@ -625,12 +620,12 @@ static void _rtl92s_dm_dynamic_txpower(struct ieee80211_hw *hw) | |||
625 | 620 | ||
626 | if (rtl_get_bbreg(hw, 0xc90, MASKBYTE0) == 1) | 621 | if (rtl_get_bbreg(hw, 0xc90, MASKBYTE0) == 1) |
627 | rtlpriv->dm.dynamic_txhighpower_lvl = TX_HIGHPWR_LEVEL_NORMAL; | 622 | rtlpriv->dm.dynamic_txhighpower_lvl = TX_HIGHPWR_LEVEL_NORMAL; |
628 | else if (undecorated_smoothed_pwdb >= txpwr_threshold_lv2) | 623 | else if (undec_sm_pwdb >= txpwr_threshold_lv2) |
629 | rtlpriv->dm.dynamic_txhighpower_lvl = TX_HIGHPWR_LEVEL_NORMAL2; | 624 | rtlpriv->dm.dynamic_txhighpower_lvl = TX_HIGHPWR_LEVEL_NORMAL2; |
630 | else if ((undecorated_smoothed_pwdb < (txpwr_threshold_lv2 - 3)) && | 625 | else if ((undec_sm_pwdb < (txpwr_threshold_lv2 - 3)) && |
631 | (undecorated_smoothed_pwdb >= txpwr_threshold_lv1)) | 626 | (undec_sm_pwdb >= txpwr_threshold_lv1)) |
632 | rtlpriv->dm.dynamic_txhighpower_lvl = TX_HIGHPWR_LEVEL_NORMAL1; | 627 | rtlpriv->dm.dynamic_txhighpower_lvl = TX_HIGHPWR_LEVEL_NORMAL1; |
633 | else if (undecorated_smoothed_pwdb < (txpwr_threshold_lv1 - 3)) | 628 | else if (undec_sm_pwdb < (txpwr_threshold_lv1 - 3)) |
634 | rtlpriv->dm.dynamic_txhighpower_lvl = TX_HIGHPWR_LEVEL_NORMAL; | 629 | rtlpriv->dm.dynamic_txhighpower_lvl = TX_HIGHPWR_LEVEL_NORMAL; |
635 | 630 | ||
636 | if ((rtlpriv->dm.dynamic_txhighpower_lvl != rtlpriv->dm.last_dtp_lvl)) | 631 | if ((rtlpriv->dm.dynamic_txhighpower_lvl != rtlpriv->dm.last_dtp_lvl)) |
@@ -665,10 +660,10 @@ static void _rtl92s_dm_init_dig(struct ieee80211_hw *hw) | |||
665 | digtable->dig_state = DM_STA_DIG_MAX; | 660 | digtable->dig_state = DM_STA_DIG_MAX; |
666 | digtable->dig_highpwrstate = DM_STA_DIG_MAX; | 661 | digtable->dig_highpwrstate = DM_STA_DIG_MAX; |
667 | 662 | ||
668 | digtable->cur_sta_connectstate = DIG_STA_DISCONNECT; | 663 | digtable->cur_sta_cstate = DIG_STA_DISCONNECT; |
669 | digtable->pre_sta_connectstate = DIG_STA_DISCONNECT; | 664 | digtable->pre_sta_cstate = DIG_STA_DISCONNECT; |
670 | digtable->cur_ap_connectstate = DIG_AP_DISCONNECT; | 665 | digtable->cur_ap_cstate = DIG_AP_DISCONNECT; |
671 | digtable->pre_ap_connectstate = DIG_AP_DISCONNECT; | 666 | digtable->pre_ap_cstate = DIG_AP_DISCONNECT; |
672 | 667 | ||
673 | digtable->rssi_lowthresh = DM_DIG_THRESH_LOW; | 668 | digtable->rssi_lowthresh = DM_DIG_THRESH_LOW; |
674 | digtable->rssi_highthresh = DM_DIG_THRESH_HIGH; | 669 | digtable->rssi_highthresh = DM_DIG_THRESH_HIGH; |
@@ -681,7 +676,7 @@ static void _rtl92s_dm_init_dig(struct ieee80211_hw *hw) | |||
681 | 676 | ||
682 | /* for dig debug rssi value */ | 677 | /* for dig debug rssi value */ |
683 | digtable->rssi_val = 50; | 678 | digtable->rssi_val = 50; |
684 | digtable->backoff_val = DM_DIG_BACKOFF; | 679 | digtable->back_val = DM_DIG_BACKOFF; |
685 | digtable->rx_gain_range_max = DM_DIG_MAX; | 680 | digtable->rx_gain_range_max = DM_DIG_MAX; |
686 | 681 | ||
687 | digtable->rx_gain_range_min = DM_DIG_MIN; | 682 | digtable->rx_gain_range_min = DM_DIG_MIN; |
@@ -709,7 +704,7 @@ void rtl92s_dm_init(struct ieee80211_hw *hw) | |||
709 | struct rtl_priv *rtlpriv = rtl_priv(hw); | 704 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
710 | 705 | ||
711 | rtlpriv->dm.dm_type = DM_TYPE_BYDRIVER; | 706 | rtlpriv->dm.dm_type = DM_TYPE_BYDRIVER; |
712 | rtlpriv->dm.undecorated_smoothed_pwdb = -1; | 707 | rtlpriv->dm.undec_sm_pwdb = -1; |
713 | 708 | ||
714 | _rtl92s_dm_init_dynamic_txpower(hw); | 709 | _rtl92s_dm_init_dynamic_txpower(hw); |
715 | rtl92s_dm_init_edca_turbo(hw); | 710 | rtl92s_dm_init_edca_turbo(hw); |
diff --git a/drivers/net/wireless/rtlwifi/rtl8192se/hw.c b/drivers/net/wireless/rtlwifi/rtl8192se/hw.c index 4542e6952b97..1d72779434ba 100644 --- a/drivers/net/wireless/rtlwifi/rtl8192se/hw.c +++ b/drivers/net/wireless/rtlwifi/rtl8192se/hw.c | |||
@@ -1697,7 +1697,7 @@ static void _rtl92se_read_adapter_info(struct ieee80211_hw *hw) | |||
1697 | hwinfo[EEPROM_TXPOWERBASE + 6 + rf_path * 3 + i]; | 1697 | hwinfo[EEPROM_TXPOWERBASE + 6 + rf_path * 3 + i]; |
1698 | 1698 | ||
1699 | /* Read OFDM RF A & B Tx power for 2T */ | 1699 | /* Read OFDM RF A & B Tx power for 2T */ |
1700 | rtlefuse->eeprom_chnlarea_txpwr_ht40_2sdiif[rf_path][i] | 1700 | rtlefuse->eprom_chnl_txpwr_ht40_2sdf[rf_path][i] |
1701 | = hwinfo[EEPROM_TXPOWERBASE + 12 + | 1701 | = hwinfo[EEPROM_TXPOWERBASE + 12 + |
1702 | rf_path * 3 + i]; | 1702 | rf_path * 3 + i]; |
1703 | } | 1703 | } |
@@ -1722,7 +1722,7 @@ static void _rtl92se_read_adapter_info(struct ieee80211_hw *hw) | |||
1722 | RTPRINT(rtlpriv, FINIT, INIT_EEPROM, | 1722 | RTPRINT(rtlpriv, FINIT, INIT_EEPROM, |
1723 | "RF(%d) EEPROM HT40 2S Diff Area(%d) = 0x%x\n", | 1723 | "RF(%d) EEPROM HT40 2S Diff Area(%d) = 0x%x\n", |
1724 | rf_path, i, | 1724 | rf_path, i, |
1725 | rtlefuse->eeprom_chnlarea_txpwr_ht40_2sdiif | 1725 | rtlefuse->eprom_chnl_txpwr_ht40_2sdf |
1726 | [rf_path][i]); | 1726 | [rf_path][i]); |
1727 | 1727 | ||
1728 | for (rf_path = 0; rf_path < 2; rf_path++) { | 1728 | for (rf_path = 0; rf_path < 2; rf_path++) { |
@@ -1748,7 +1748,7 @@ static void _rtl92se_read_adapter_info(struct ieee80211_hw *hw) | |||
1748 | rtlefuse->eeprom_chnlarea_txpwr_ht40_1s | 1748 | rtlefuse->eeprom_chnlarea_txpwr_ht40_1s |
1749 | [rf_path][index]; | 1749 | [rf_path][index]; |
1750 | rtlefuse->txpwrlevel_ht40_2s[rf_path][i] = | 1750 | rtlefuse->txpwrlevel_ht40_2s[rf_path][i] = |
1751 | rtlefuse->eeprom_chnlarea_txpwr_ht40_2sdiif | 1751 | rtlefuse->eprom_chnl_txpwr_ht40_2sdf |
1752 | [rf_path][index]; | 1752 | [rf_path][index]; |
1753 | } | 1753 | } |
1754 | 1754 | ||
diff --git a/drivers/net/wireless/rtlwifi/rtl8192se/phy.c b/drivers/net/wireless/rtlwifi/rtl8192se/phy.c index b917a2a3caf7..67404975e00b 100644 --- a/drivers/net/wireless/rtlwifi/rtl8192se/phy.c +++ b/drivers/net/wireless/rtlwifi/rtl8192se/phy.c | |||
@@ -139,17 +139,17 @@ static u32 _rtl92s_phy_rf_serial_read(struct ieee80211_hw *hw, | |||
139 | BIT(8)); | 139 | BIT(8)); |
140 | 140 | ||
141 | if (rfpi_enable) | 141 | if (rfpi_enable) |
142 | retvalue = rtl_get_bbreg(hw, pphyreg->rflssi_readbackpi, | 142 | retvalue = rtl_get_bbreg(hw, pphyreg->rf_rbpi, |
143 | BLSSI_READBACK_DATA); | 143 | BLSSI_READBACK_DATA); |
144 | else | 144 | else |
145 | retvalue = rtl_get_bbreg(hw, pphyreg->rflssi_readback, | 145 | retvalue = rtl_get_bbreg(hw, pphyreg->rf_rb, |
146 | BLSSI_READBACK_DATA); | 146 | BLSSI_READBACK_DATA); |
147 | 147 | ||
148 | retvalue = rtl_get_bbreg(hw, pphyreg->rflssi_readback, | 148 | retvalue = rtl_get_bbreg(hw, pphyreg->rf_rb, |
149 | BLSSI_READBACK_DATA); | 149 | BLSSI_READBACK_DATA); |
150 | 150 | ||
151 | RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, "RFR-%d Addr[0x%x]=0x%x\n", | 151 | RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, "RFR-%d Addr[0x%x]=0x%x\n", |
152 | rfpath, pphyreg->rflssi_readback, retvalue); | 152 | rfpath, pphyreg->rf_rb, retvalue); |
153 | 153 | ||
154 | return retvalue; | 154 | return retvalue; |
155 | 155 | ||
@@ -696,7 +696,7 @@ static void _rtl92s_store_pwrindex_diffrate_offset(struct ieee80211_hw *hw, | |||
696 | else | 696 | else |
697 | return; | 697 | return; |
698 | 698 | ||
699 | rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][index] = data; | 699 | rtlphy->mcs_offset[rtlphy->pwrgroup_cnt][index] = data; |
700 | if (index == 5) | 700 | if (index == 5) |
701 | rtlphy->pwrgroup_cnt++; | 701 | rtlphy->pwrgroup_cnt++; |
702 | } | 702 | } |
@@ -765,14 +765,10 @@ static void _rtl92s_phy_init_register_definition(struct ieee80211_hw *hw) | |||
765 | rtlphy->phyreg_def[RF90_PATH_D].rfhssi_para2 = RFPGA0_XD_HSSIPARAMETER2; | 765 | rtlphy->phyreg_def[RF90_PATH_D].rfhssi_para2 = RFPGA0_XD_HSSIPARAMETER2; |
766 | 766 | ||
767 | /* RF switch Control */ | 767 | /* RF switch Control */ |
768 | rtlphy->phyreg_def[RF90_PATH_A].rfswitch_control = | 768 | rtlphy->phyreg_def[RF90_PATH_A].rfsw_ctrl = RFPGA0_XAB_SWITCHCONTROL; |
769 | RFPGA0_XAB_SWITCHCONTROL; | 769 | rtlphy->phyreg_def[RF90_PATH_B].rfsw_ctrl = RFPGA0_XAB_SWITCHCONTROL; |
770 | rtlphy->phyreg_def[RF90_PATH_B].rfswitch_control = | 770 | rtlphy->phyreg_def[RF90_PATH_C].rfsw_ctrl = RFPGA0_XCD_SWITCHCONTROL; |
771 | RFPGA0_XAB_SWITCHCONTROL; | 771 | rtlphy->phyreg_def[RF90_PATH_D].rfsw_ctrl = RFPGA0_XCD_SWITCHCONTROL; |
772 | rtlphy->phyreg_def[RF90_PATH_C].rfswitch_control = | ||
773 | RFPGA0_XCD_SWITCHCONTROL; | ||
774 | rtlphy->phyreg_def[RF90_PATH_D].rfswitch_control = | ||
775 | RFPGA0_XCD_SWITCHCONTROL; | ||
776 | 772 | ||
777 | /* AGC control 1 */ | 773 | /* AGC control 1 */ |
778 | rtlphy->phyreg_def[RF90_PATH_A].rfagc_control1 = ROFDM0_XAAGCCORE1; | 774 | rtlphy->phyreg_def[RF90_PATH_A].rfagc_control1 = ROFDM0_XAAGCCORE1; |
@@ -787,14 +783,10 @@ static void _rtl92s_phy_init_register_definition(struct ieee80211_hw *hw) | |||
787 | rtlphy->phyreg_def[RF90_PATH_D].rfagc_control2 = ROFDM0_XDAGCCORE2; | 783 | rtlphy->phyreg_def[RF90_PATH_D].rfagc_control2 = ROFDM0_XDAGCCORE2; |
788 | 784 | ||
789 | /* RX AFE control 1 */ | 785 | /* RX AFE control 1 */ |
790 | rtlphy->phyreg_def[RF90_PATH_A].rfrxiq_imbalance = | 786 | rtlphy->phyreg_def[RF90_PATH_A].rfrxiq_imbal = ROFDM0_XARXIQIMBALANCE; |
791 | ROFDM0_XARXIQIMBALANCE; | 787 | rtlphy->phyreg_def[RF90_PATH_B].rfrxiq_imbal = ROFDM0_XBRXIQIMBALANCE; |
792 | rtlphy->phyreg_def[RF90_PATH_B].rfrxiq_imbalance = | 788 | rtlphy->phyreg_def[RF90_PATH_C].rfrxiq_imbal = ROFDM0_XCRXIQIMBALANCE; |
793 | ROFDM0_XBRXIQIMBALANCE; | 789 | rtlphy->phyreg_def[RF90_PATH_D].rfrxiq_imbal = ROFDM0_XDRXIQIMBALANCE; |
794 | rtlphy->phyreg_def[RF90_PATH_C].rfrxiq_imbalance = | ||
795 | ROFDM0_XCRXIQIMBALANCE; | ||
796 | rtlphy->phyreg_def[RF90_PATH_D].rfrxiq_imbalance = | ||
797 | ROFDM0_XDRXIQIMBALANCE; | ||
798 | 790 | ||
799 | /* RX AFE control 1 */ | 791 | /* RX AFE control 1 */ |
800 | rtlphy->phyreg_def[RF90_PATH_A].rfrx_afe = ROFDM0_XARXAFE; | 792 | rtlphy->phyreg_def[RF90_PATH_A].rfrx_afe = ROFDM0_XARXAFE; |
@@ -803,14 +795,10 @@ static void _rtl92s_phy_init_register_definition(struct ieee80211_hw *hw) | |||
803 | rtlphy->phyreg_def[RF90_PATH_D].rfrx_afe = ROFDM0_XDRXAFE; | 795 | rtlphy->phyreg_def[RF90_PATH_D].rfrx_afe = ROFDM0_XDRXAFE; |
804 | 796 | ||
805 | /* Tx AFE control 1 */ | 797 | /* Tx AFE control 1 */ |
806 | rtlphy->phyreg_def[RF90_PATH_A].rftxiq_imbalance = | 798 | rtlphy->phyreg_def[RF90_PATH_A].rftxiq_imbal = ROFDM0_XATXIQIMBALANCE; |
807 | ROFDM0_XATXIQIMBALANCE; | 799 | rtlphy->phyreg_def[RF90_PATH_B].rftxiq_imbal = ROFDM0_XBTXIQIMBALANCE; |
808 | rtlphy->phyreg_def[RF90_PATH_B].rftxiq_imbalance = | 800 | rtlphy->phyreg_def[RF90_PATH_C].rftxiq_imbal = ROFDM0_XCTXIQIMBALANCE; |
809 | ROFDM0_XBTXIQIMBALANCE; | 801 | rtlphy->phyreg_def[RF90_PATH_D].rftxiq_imbal = ROFDM0_XDTXIQIMBALANCE; |
810 | rtlphy->phyreg_def[RF90_PATH_C].rftxiq_imbalance = | ||
811 | ROFDM0_XCTXIQIMBALANCE; | ||
812 | rtlphy->phyreg_def[RF90_PATH_D].rftxiq_imbalance = | ||
813 | ROFDM0_XDTXIQIMBALANCE; | ||
814 | 802 | ||
815 | /* Tx AFE control 2 */ | 803 | /* Tx AFE control 2 */ |
816 | rtlphy->phyreg_def[RF90_PATH_A].rftx_afe = ROFDM0_XATXAFE; | 804 | rtlphy->phyreg_def[RF90_PATH_A].rftx_afe = ROFDM0_XATXAFE; |
@@ -819,20 +807,14 @@ static void _rtl92s_phy_init_register_definition(struct ieee80211_hw *hw) | |||
819 | rtlphy->phyreg_def[RF90_PATH_D].rftx_afe = ROFDM0_XDTXAFE; | 807 | rtlphy->phyreg_def[RF90_PATH_D].rftx_afe = ROFDM0_XDTXAFE; |
820 | 808 | ||
821 | /* Tranceiver LSSI Readback */ | 809 | /* Tranceiver LSSI Readback */ |
822 | rtlphy->phyreg_def[RF90_PATH_A].rflssi_readback = | 810 | rtlphy->phyreg_def[RF90_PATH_A].rf_rb = RFPGA0_XA_LSSIREADBACK; |
823 | RFPGA0_XA_LSSIREADBACK; | 811 | rtlphy->phyreg_def[RF90_PATH_B].rf_rb = RFPGA0_XB_LSSIREADBACK; |
824 | rtlphy->phyreg_def[RF90_PATH_B].rflssi_readback = | 812 | rtlphy->phyreg_def[RF90_PATH_C].rf_rb = RFPGA0_XC_LSSIREADBACK; |
825 | RFPGA0_XB_LSSIREADBACK; | 813 | rtlphy->phyreg_def[RF90_PATH_D].rf_rb = RFPGA0_XD_LSSIREADBACK; |
826 | rtlphy->phyreg_def[RF90_PATH_C].rflssi_readback = | ||
827 | RFPGA0_XC_LSSIREADBACK; | ||
828 | rtlphy->phyreg_def[RF90_PATH_D].rflssi_readback = | ||
829 | RFPGA0_XD_LSSIREADBACK; | ||
830 | 814 | ||
831 | /* Tranceiver LSSI Readback PI mode */ | 815 | /* Tranceiver LSSI Readback PI mode */ |
832 | rtlphy->phyreg_def[RF90_PATH_A].rflssi_readbackpi = | 816 | rtlphy->phyreg_def[RF90_PATH_A].rf_rbpi = TRANSCEIVERA_HSPI_READBACK; |
833 | TRANSCEIVERA_HSPI_READBACK; | 817 | rtlphy->phyreg_def[RF90_PATH_B].rf_rbpi = TRANSCEIVERB_HSPI_READBACK; |
834 | rtlphy->phyreg_def[RF90_PATH_B].rflssi_readbackpi = | ||
835 | TRANSCEIVERB_HSPI_READBACK; | ||
836 | } | 818 | } |
837 | 819 | ||
838 | 820 | ||
diff --git a/drivers/net/wireless/rtlwifi/rtl8192se/rf.c b/drivers/net/wireless/rtlwifi/rtl8192se/rf.c index 08c2f5625129..5061f1db3f02 100644 --- a/drivers/net/wireless/rtlwifi/rtl8192se/rf.c +++ b/drivers/net/wireless/rtlwifi/rtl8192se/rf.c | |||
@@ -192,8 +192,7 @@ static void _rtl92s_get_txpower_writeval_byregulatory(struct ieee80211_hw *hw, | |||
192 | * defined by Realtek for large power */ | 192 | * defined by Realtek for large power */ |
193 | chnlgroup = 0; | 193 | chnlgroup = 0; |
194 | 194 | ||
195 | writeval = rtlphy->mcs_txpwrlevel_origoffset | 195 | writeval = rtlphy->mcs_offset[chnlgroup][index] + |
196 | [chnlgroup][index] + | ||
197 | ((index < 2) ? pwrbase0 : pwrbase1); | 196 | ((index < 2) ? pwrbase0 : pwrbase1); |
198 | 197 | ||
199 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, | 198 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, |
@@ -223,8 +222,7 @@ static void _rtl92s_get_txpower_writeval_byregulatory(struct ieee80211_hw *hw, | |||
223 | chnlgroup++; | 222 | chnlgroup++; |
224 | } | 223 | } |
225 | 224 | ||
226 | writeval = rtlphy->mcs_txpwrlevel_origoffset | 225 | writeval = rtlphy->mcs_offset[chnlgroup][index] |
227 | [chnlgroup][index] | ||
228 | + ((index < 2) ? | 226 | + ((index < 2) ? |
229 | pwrbase0 : pwrbase1); | 227 | pwrbase0 : pwrbase1); |
230 | 228 | ||
@@ -257,8 +255,7 @@ static void _rtl92s_get_txpower_writeval_byregulatory(struct ieee80211_hw *hw, | |||
257 | } | 255 | } |
258 | 256 | ||
259 | for (i = 0; i < 4; i++) { | 257 | for (i = 0; i < 4; i++) { |
260 | pwrdiff_limit[i] = | 258 | pwrdiff_limit[i] = (u8)((rtlphy->mcs_offset |
261 | (u8)((rtlphy->mcs_txpwrlevel_origoffset | ||
262 | [chnlgroup][index] & (0x7f << (i * 8))) | 259 | [chnlgroup][index] & (0x7f << (i * 8))) |
263 | >> (i * 8)); | 260 | >> (i * 8)); |
264 | 261 | ||
@@ -296,7 +293,7 @@ static void _rtl92s_get_txpower_writeval_byregulatory(struct ieee80211_hw *hw, | |||
296 | break; | 293 | break; |
297 | default: | 294 | default: |
298 | chnlgroup = 0; | 295 | chnlgroup = 0; |
299 | writeval = rtlphy->mcs_txpwrlevel_origoffset[chnlgroup][index] + | 296 | writeval = rtlphy->mcs_offset[chnlgroup][index] + |
300 | ((index < 2) ? pwrbase0 : pwrbase1); | 297 | ((index < 2) ? pwrbase0 : pwrbase1); |
301 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, | 298 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, |
302 | "RTK better performance, writeval = 0x%x\n", writeval); | 299 | "RTK better performance, writeval = 0x%x\n", writeval); |
diff --git a/drivers/net/wireless/rtlwifi/rtl8192se/trx.c b/drivers/net/wireless/rtlwifi/rtl8192se/trx.c index e3cf4c02122a..1ad51e711a32 100644 --- a/drivers/net/wireless/rtlwifi/rtl8192se/trx.c +++ b/drivers/net/wireless/rtlwifi/rtl8192se/trx.c | |||
@@ -129,8 +129,8 @@ static void _rtl92se_query_rxphystatus(struct ieee80211_hw *hw, | |||
129 | pstats->packet_matchbssid = packet_match_bssid; | 129 | pstats->packet_matchbssid = packet_match_bssid; |
130 | pstats->packet_toself = packet_toself; | 130 | pstats->packet_toself = packet_toself; |
131 | pstats->packet_beacon = packet_beacon; | 131 | pstats->packet_beacon = packet_beacon; |
132 | pstats->rx_mimo_signalquality[0] = -1; | 132 | pstats->rx_mimo_sig_qual[0] = -1; |
133 | pstats->rx_mimo_signalquality[1] = -1; | 133 | pstats->rx_mimo_sig_qual[1] = -1; |
134 | 134 | ||
135 | if (is_cck) { | 135 | if (is_cck) { |
136 | u8 report, cck_highpwr; | 136 | u8 report, cck_highpwr; |
@@ -216,8 +216,8 @@ static void _rtl92se_query_rxphystatus(struct ieee80211_hw *hw, | |||
216 | } | 216 | } |
217 | 217 | ||
218 | pstats->signalquality = sq; | 218 | pstats->signalquality = sq; |
219 | pstats->rx_mimo_signalquality[0] = sq; | 219 | pstats->rx_mimo_sig_qual[0] = sq; |
220 | pstats->rx_mimo_signalquality[1] = -1; | 220 | pstats->rx_mimo_sig_qual[1] = -1; |
221 | } | 221 | } |
222 | } else { | 222 | } else { |
223 | rtlpriv->dm.rfpath_rxenable[0] = | 223 | rtlpriv->dm.rfpath_rxenable[0] = |
@@ -256,8 +256,7 @@ static void _rtl92se_query_rxphystatus(struct ieee80211_hw *hw, | |||
256 | if (i == 0) | 256 | if (i == 0) |
257 | pstats->signalquality = (u8)(evm & | 257 | pstats->signalquality = (u8)(evm & |
258 | 0xff); | 258 | 0xff); |
259 | pstats->rx_mimo_signalquality[i] = | 259 | pstats->rx_mimo_sig_qual[i] = (u8) (evm & 0xff); |
260 | (u8) (evm & 0xff); | ||
261 | } | 260 | } |
262 | } | 261 | } |
263 | } | 262 | } |
@@ -366,7 +365,7 @@ static void _rtl92se_process_pwdb(struct ieee80211_hw *hw, | |||
366 | return; | 365 | return; |
367 | } else { | 366 | } else { |
368 | undec_sm_pwdb = | 367 | undec_sm_pwdb = |
369 | rtlpriv->dm.undecorated_smoothed_pwdb; | 368 | rtlpriv->dm.undec_sm_pwdb; |
370 | } | 369 | } |
371 | 370 | ||
372 | if (pstats->packet_toself || pstats->packet_beacon) { | 371 | if (pstats->packet_toself || pstats->packet_beacon) { |
@@ -386,7 +385,7 @@ static void _rtl92se_process_pwdb(struct ieee80211_hw *hw, | |||
386 | (RX_SMOOTH_FACTOR); | 385 | (RX_SMOOTH_FACTOR); |
387 | } | 386 | } |
388 | 387 | ||
389 | rtlpriv->dm.undecorated_smoothed_pwdb = undec_sm_pwdb; | 388 | rtlpriv->dm.undec_sm_pwdb = undec_sm_pwdb; |
390 | _rtl92se_update_rxsignalstatistics(hw, pstats); | 389 | _rtl92se_update_rxsignalstatistics(hw, pstats); |
391 | } | 390 | } |
392 | } | 391 | } |
@@ -398,16 +397,16 @@ static void rtl_92s_process_streams(struct ieee80211_hw *hw, | |||
398 | u32 stream; | 397 | u32 stream; |
399 | 398 | ||
400 | for (stream = 0; stream < 2; stream++) { | 399 | for (stream = 0; stream < 2; stream++) { |
401 | if (pstats->rx_mimo_signalquality[stream] != -1) { | 400 | if (pstats->rx_mimo_sig_qual[stream] != -1) { |
402 | if (rtlpriv->stats.rx_evm_percentage[stream] == 0) { | 401 | if (rtlpriv->stats.rx_evm_percentage[stream] == 0) { |
403 | rtlpriv->stats.rx_evm_percentage[stream] = | 402 | rtlpriv->stats.rx_evm_percentage[stream] = |
404 | pstats->rx_mimo_signalquality[stream]; | 403 | pstats->rx_mimo_sig_qual[stream]; |
405 | } | 404 | } |
406 | 405 | ||
407 | rtlpriv->stats.rx_evm_percentage[stream] = | 406 | rtlpriv->stats.rx_evm_percentage[stream] = |
408 | ((rtlpriv->stats.rx_evm_percentage[stream] * | 407 | ((rtlpriv->stats.rx_evm_percentage[stream] * |
409 | (RX_SMOOTH_FACTOR - 1)) + | 408 | (RX_SMOOTH_FACTOR - 1)) + |
410 | (pstats->rx_mimo_signalquality[stream] * | 409 | (pstats->rx_mimo_sig_qual[stream] * |
411 | 1)) / (RX_SMOOTH_FACTOR); | 410 | 1)) / (RX_SMOOTH_FACTOR); |
412 | } | 411 | } |
413 | } | 412 | } |
diff --git a/drivers/net/wireless/rtlwifi/wifi.h b/drivers/net/wireless/rtlwifi/wifi.h index f1b6bc693b0a..6794b688dd7d 100644 --- a/drivers/net/wireless/rtlwifi/wifi.h +++ b/drivers/net/wireless/rtlwifi/wifi.h | |||
@@ -198,15 +198,15 @@ struct bb_reg_def { | |||
198 | u32 rftxgain_stage; | 198 | u32 rftxgain_stage; |
199 | u32 rfhssi_para1; | 199 | u32 rfhssi_para1; |
200 | u32 rfhssi_para2; | 200 | u32 rfhssi_para2; |
201 | u32 rfswitch_control; | 201 | u32 rfsw_ctrl; |
202 | u32 rfagc_control1; | 202 | u32 rfagc_control1; |
203 | u32 rfagc_control2; | 203 | u32 rfagc_control2; |
204 | u32 rfrxiq_imbalance; | 204 | u32 rfrxiq_imbal; |
205 | u32 rfrx_afe; | 205 | u32 rfrx_afe; |
206 | u32 rftxiq_imbalance; | 206 | u32 rftxiq_imbal; |
207 | u32 rftx_afe; | 207 | u32 rftx_afe; |
208 | u32 rflssi_readback; | 208 | u32 rf_rb; /* rflssi_readback */ |
209 | u32 rflssi_readbackpi; | 209 | u32 rf_rbpi; /* rflssi_readbackpi */ |
210 | }; | 210 | }; |
211 | 211 | ||
212 | enum io_type { | 212 | enum io_type { |
@@ -885,7 +885,7 @@ struct rtl_phy { | |||
885 | u8 pwrgroup_cnt; | 885 | u8 pwrgroup_cnt; |
886 | u8 cck_high_power; | 886 | u8 cck_high_power; |
887 | /* MAX_PG_GROUP groups of pwr diff by rates */ | 887 | /* MAX_PG_GROUP groups of pwr diff by rates */ |
888 | u32 mcs_txpwrlevel_origoffset[MAX_PG_GROUP][16]; | 888 | u32 mcs_offset[MAX_PG_GROUP][16]; |
889 | u8 default_initialgain[4]; | 889 | u8 default_initialgain[4]; |
890 | 890 | ||
891 | /* the current Tx power level */ | 891 | /* the current Tx power level */ |
@@ -933,7 +933,7 @@ struct rtl_tid_data { | |||
933 | }; | 933 | }; |
934 | 934 | ||
935 | struct rssi_sta { | 935 | struct rssi_sta { |
936 | long undecorated_smoothed_pwdb; | 936 | long undec_sm_pwdb; |
937 | }; | 937 | }; |
938 | 938 | ||
939 | struct rtl_sta_info { | 939 | struct rtl_sta_info { |
@@ -1131,9 +1131,9 @@ struct rtl_security { | |||
1131 | 1131 | ||
1132 | struct rtl_dm { | 1132 | struct rtl_dm { |
1133 | /*PHY status for Dynamic Management */ | 1133 | /*PHY status for Dynamic Management */ |
1134 | long entry_min_undecoratedsmoothed_pwdb; | 1134 | long entry_min_undec_sm_pwdb; |
1135 | long undecorated_smoothed_pwdb; /*out dm */ | 1135 | long undec_sm_pwdb; /*out dm */ |
1136 | long entry_max_undecoratedsmoothed_pwdb; | 1136 | long entry_max_undec_sm_pwdb; |
1137 | bool dm_initialgain_enable; | 1137 | bool dm_initialgain_enable; |
1138 | bool dynamic_txpower_enable; | 1138 | bool dynamic_txpower_enable; |
1139 | bool current_turbo_edca; | 1139 | bool current_turbo_edca; |
@@ -1209,7 +1209,7 @@ struct rtl_efuse { | |||
1209 | u8 eeprom_pwrlimit_ht40[CHANNEL_GROUP_MAX]; | 1209 | u8 eeprom_pwrlimit_ht40[CHANNEL_GROUP_MAX]; |
1210 | u8 eeprom_chnlarea_txpwr_cck[2][CHANNEL_GROUP_MAX_2G]; | 1210 | u8 eeprom_chnlarea_txpwr_cck[2][CHANNEL_GROUP_MAX_2G]; |
1211 | u8 eeprom_chnlarea_txpwr_ht40_1s[2][CHANNEL_GROUP_MAX]; | 1211 | u8 eeprom_chnlarea_txpwr_ht40_1s[2][CHANNEL_GROUP_MAX]; |
1212 | u8 eeprom_chnlarea_txpwr_ht40_2sdiif[2][CHANNEL_GROUP_MAX]; | 1212 | u8 eprom_chnl_txpwr_ht40_2sdf[2][CHANNEL_GROUP_MAX]; |
1213 | u8 txpwrlevel_cck[2][CHANNEL_MAX_NUMBER_2G]; | 1213 | u8 txpwrlevel_cck[2][CHANNEL_MAX_NUMBER_2G]; |
1214 | u8 txpwrlevel_ht40_1s[2][CHANNEL_MAX_NUMBER]; /*For HT 40MHZ pwr */ | 1214 | u8 txpwrlevel_ht40_1s[2][CHANNEL_MAX_NUMBER]; /*For HT 40MHZ pwr */ |
1215 | u8 txpwrlevel_ht40_2s[2][CHANNEL_MAX_NUMBER]; /*For HT 40MHZ pwr */ | 1215 | u8 txpwrlevel_ht40_2s[2][CHANNEL_MAX_NUMBER]; /*For HT 40MHZ pwr */ |
@@ -1351,7 +1351,7 @@ struct rtl_stats { | |||
1351 | bool rx_is40Mhzpacket; | 1351 | bool rx_is40Mhzpacket; |
1352 | u32 rx_pwdb_all; | 1352 | u32 rx_pwdb_all; |
1353 | u8 rx_mimo_signalstrength[4]; /*in 0~100 index */ | 1353 | u8 rx_mimo_signalstrength[4]; /*in 0~100 index */ |
1354 | s8 rx_mimo_signalquality[2]; | 1354 | s8 rx_mimo_sig_qual[2]; |
1355 | bool packet_matchbssid; | 1355 | bool packet_matchbssid; |
1356 | bool is_cck; | 1356 | bool is_cck; |
1357 | bool is_ht; | 1357 | bool is_ht; |
@@ -1503,6 +1503,9 @@ struct rtl_hal_ops { | |||
1503 | void (*phy_lc_calibrate) (struct ieee80211_hw *hw, bool is2t); | 1503 | void (*phy_lc_calibrate) (struct ieee80211_hw *hw, bool is2t); |
1504 | void (*phy_set_bw_mode_callback) (struct ieee80211_hw *hw); | 1504 | void (*phy_set_bw_mode_callback) (struct ieee80211_hw *hw); |
1505 | void (*dm_dynamic_txpower) (struct ieee80211_hw *hw); | 1505 | void (*dm_dynamic_txpower) (struct ieee80211_hw *hw); |
1506 | void (*bt_wifi_media_status_notify) (struct ieee80211_hw *hw, | ||
1507 | bool mstate); | ||
1508 | void (*bt_coex_off_before_lps) (struct ieee80211_hw *hw); | ||
1506 | }; | 1509 | }; |
1507 | 1510 | ||
1508 | struct rtl_intf_ops { | 1511 | struct rtl_intf_ops { |
@@ -1679,7 +1682,7 @@ struct dig_t { | |||
1679 | u32 rssi_highthresh; | 1682 | u32 rssi_highthresh; |
1680 | u32 fa_lowthresh; | 1683 | u32 fa_lowthresh; |
1681 | u32 fa_highthresh; | 1684 | u32 fa_highthresh; |
1682 | long last_min_undecorated_pwdb_for_dm; | 1685 | long last_min_undec_pwdb_for_dm; |
1683 | long rssi_highpower_lowthresh; | 1686 | long rssi_highpower_lowthresh; |
1684 | long rssi_highpower_highthresh; | 1687 | long rssi_highpower_highthresh; |
1685 | u32 recover_cnt; | 1688 | u32 recover_cnt; |
@@ -1692,15 +1695,15 @@ struct dig_t { | |||
1692 | u8 dig_twoport_algorithm; | 1695 | u8 dig_twoport_algorithm; |
1693 | u8 dig_dbgmode; | 1696 | u8 dig_dbgmode; |
1694 | u8 dig_slgorithm_switch; | 1697 | u8 dig_slgorithm_switch; |
1695 | u8 cursta_connectstate; | 1698 | u8 cursta_cstate; |
1696 | u8 presta_connectstate; | 1699 | u8 presta_cstate; |
1697 | u8 curmultista_connectstate; | 1700 | u8 curmultista_cstate; |
1698 | char backoff_val; | 1701 | char back_val; |
1699 | char backoff_val_range_max; | 1702 | char back_range_max; |
1700 | char backoff_val_range_min; | 1703 | char back_range_min; |
1701 | u8 rx_gain_range_max; | 1704 | u8 rx_gain_range_max; |
1702 | u8 rx_gain_range_min; | 1705 | u8 rx_gain_range_min; |
1703 | u8 min_undecorated_pwdb_for_dm; | 1706 | u8 min_undec_pwdb_for_dm; |
1704 | u8 rssi_val_min; | 1707 | u8 rssi_val_min; |
1705 | u8 pre_cck_pd_state; | 1708 | u8 pre_cck_pd_state; |
1706 | u8 cur_cck_pd_state; | 1709 | u8 cur_cck_pd_state; |
@@ -1712,10 +1715,10 @@ struct dig_t { | |||
1712 | u8 forbidden_igi; | 1715 | u8 forbidden_igi; |
1713 | u8 dig_state; | 1716 | u8 dig_state; |
1714 | u8 dig_highpwrstate; | 1717 | u8 dig_highpwrstate; |
1715 | u8 cur_sta_connectstate; | 1718 | u8 cur_sta_cstate; |
1716 | u8 pre_sta_connectstate; | 1719 | u8 pre_sta_cstate; |
1717 | u8 cur_ap_connectstate; | 1720 | u8 cur_ap_cstate; |
1718 | u8 pre_ap_connectstate; | 1721 | u8 pre_ap_cstate; |
1719 | u8 cur_pd_thstate; | 1722 | u8 cur_pd_thstate; |
1720 | u8 pre_pd_thstate; | 1723 | u8 pre_pd_thstate; |
1721 | u8 cur_cs_ratiostate; | 1724 | u8 cur_cs_ratiostate; |
@@ -1846,7 +1849,7 @@ struct bt_coexist_info { | |||
1846 | u8 eeprom_bt_coexist; | 1849 | u8 eeprom_bt_coexist; |
1847 | u8 eeprom_bt_type; | 1850 | u8 eeprom_bt_type; |
1848 | u8 eeprom_bt_ant_num; | 1851 | u8 eeprom_bt_ant_num; |
1849 | u8 eeprom_bt_ant_isolation; | 1852 | u8 eeprom_bt_ant_isol; |
1850 | u8 eeprom_bt_radio_shared; | 1853 | u8 eeprom_bt_radio_shared; |
1851 | 1854 | ||
1852 | u8 bt_coexistence; | 1855 | u8 bt_coexistence; |