diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2013-08-30 19:18:59 -0400 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2013-08-30 19:18:59 -0400 |
commit | d9eda0fae1394ea1e1c59c94d4a120ad9c06e64a (patch) | |
tree | 8f8f4208a44806bac8d3fa30decb574c4ce85299 | |
parent | 418a95bc0e26c27b693eb6276f92012f45ed568f (diff) | |
parent | f8ab658b5da3fd11893cad085e0e21b67987c10b (diff) |
Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson:
"Two straggling fixes that I had missed as they were posted a couple of
weeks ago, causing problems with interrupts (breaking them completely)
on the CSR SiRF platforms"
* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
arm: prima2: drop nr_irqs in mach as we moved to linear irqdomain
irqchip: sirf: move from legacy mode to linear irqdomain
-rw-r--r-- | arch/arm/mach-prima2/common.c | 2 | ||||
-rw-r--r-- | drivers/irqchip/irq-sirfsoc.c | 18 |
2 files changed, 10 insertions, 10 deletions
diff --git a/arch/arm/mach-prima2/common.c b/arch/arm/mach-prima2/common.c index 2c70f74fed5d..e110b6d4ae8c 100644 --- a/arch/arm/mach-prima2/common.c +++ b/arch/arm/mach-prima2/common.c | |||
@@ -42,7 +42,6 @@ static const char *atlas6_dt_match[] __initdata = { | |||
42 | 42 | ||
43 | DT_MACHINE_START(ATLAS6_DT, "Generic ATLAS6 (Flattened Device Tree)") | 43 | DT_MACHINE_START(ATLAS6_DT, "Generic ATLAS6 (Flattened Device Tree)") |
44 | /* Maintainer: Barry Song <baohua.song@csr.com> */ | 44 | /* Maintainer: Barry Song <baohua.song@csr.com> */ |
45 | .nr_irqs = 128, | ||
46 | .map_io = sirfsoc_map_io, | 45 | .map_io = sirfsoc_map_io, |
47 | .init_time = sirfsoc_init_time, | 46 | .init_time = sirfsoc_init_time, |
48 | .init_late = sirfsoc_init_late, | 47 | .init_late = sirfsoc_init_late, |
@@ -59,7 +58,6 @@ static const char *prima2_dt_match[] __initdata = { | |||
59 | 58 | ||
60 | DT_MACHINE_START(PRIMA2_DT, "Generic PRIMA2 (Flattened Device Tree)") | 59 | DT_MACHINE_START(PRIMA2_DT, "Generic PRIMA2 (Flattened Device Tree)") |
61 | /* Maintainer: Barry Song <baohua.song@csr.com> */ | 60 | /* Maintainer: Barry Song <baohua.song@csr.com> */ |
62 | .nr_irqs = 128, | ||
63 | .map_io = sirfsoc_map_io, | 61 | .map_io = sirfsoc_map_io, |
64 | .init_time = sirfsoc_init_time, | 62 | .init_time = sirfsoc_init_time, |
65 | .dma_zone_size = SZ_256M, | 63 | .dma_zone_size = SZ_256M, |
diff --git a/drivers/irqchip/irq-sirfsoc.c b/drivers/irqchip/irq-sirfsoc.c index 69ea44ebcf61..4851afae38dc 100644 --- a/drivers/irqchip/irq-sirfsoc.c +++ b/drivers/irqchip/irq-sirfsoc.c | |||
@@ -23,7 +23,7 @@ | |||
23 | #define SIRFSOC_INT_RISC_LEVEL1 0x0024 | 23 | #define SIRFSOC_INT_RISC_LEVEL1 0x0024 |
24 | #define SIRFSOC_INIT_IRQ_ID 0x0038 | 24 | #define SIRFSOC_INIT_IRQ_ID 0x0038 |
25 | 25 | ||
26 | #define SIRFSOC_NUM_IRQS 128 | 26 | #define SIRFSOC_NUM_IRQS 64 |
27 | 27 | ||
28 | static struct irq_domain *sirfsoc_irqdomain; | 28 | static struct irq_domain *sirfsoc_irqdomain; |
29 | 29 | ||
@@ -32,15 +32,18 @@ sirfsoc_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num) | |||
32 | { | 32 | { |
33 | struct irq_chip_generic *gc; | 33 | struct irq_chip_generic *gc; |
34 | struct irq_chip_type *ct; | 34 | struct irq_chip_type *ct; |
35 | int ret; | ||
36 | unsigned int clr = IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN; | ||
35 | 37 | ||
36 | gc = irq_alloc_generic_chip("SIRFINTC", 1, irq_start, base, handle_level_irq); | 38 | ret = irq_alloc_domain_generic_chips(sirfsoc_irqdomain, num, 1, "irq_sirfsoc", |
37 | ct = gc->chip_types; | 39 | handle_level_irq, clr, 0, IRQ_GC_INIT_MASK_CACHE); |
38 | 40 | ||
41 | gc = irq_get_domain_generic_chip(sirfsoc_irqdomain, irq_start); | ||
42 | gc->reg_base = base; | ||
43 | ct = gc->chip_types; | ||
39 | ct->chip.irq_mask = irq_gc_mask_clr_bit; | 44 | ct->chip.irq_mask = irq_gc_mask_clr_bit; |
40 | ct->chip.irq_unmask = irq_gc_mask_set_bit; | 45 | ct->chip.irq_unmask = irq_gc_mask_set_bit; |
41 | ct->regs.mask = SIRFSOC_INT_RISC_MASK0; | 46 | ct->regs.mask = SIRFSOC_INT_RISC_MASK0; |
42 | |||
43 | irq_setup_generic_chip(gc, IRQ_MSK(num), IRQ_GC_INIT_MASK_CACHE, IRQ_NOREQUEST, 0); | ||
44 | } | 47 | } |
45 | 48 | ||
46 | static asmlinkage void __exception_irq_entry sirfsoc_handle_irq(struct pt_regs *regs) | 49 | static asmlinkage void __exception_irq_entry sirfsoc_handle_irq(struct pt_regs *regs) |
@@ -60,9 +63,8 @@ static int __init sirfsoc_irq_init(struct device_node *np, struct device_node *p | |||
60 | if (!base) | 63 | if (!base) |
61 | panic("unable to map intc cpu registers\n"); | 64 | panic("unable to map intc cpu registers\n"); |
62 | 65 | ||
63 | /* using legacy because irqchip_generic does not work with linear */ | 66 | sirfsoc_irqdomain = irq_domain_add_linear(np, SIRFSOC_NUM_IRQS, |
64 | sirfsoc_irqdomain = irq_domain_add_legacy(np, SIRFSOC_NUM_IRQS, 0, 0, | 67 | &irq_generic_chip_ops, base); |
65 | &irq_domain_simple_ops, base); | ||
66 | 68 | ||
67 | sirfsoc_alloc_gc(base, 0, 32); | 69 | sirfsoc_alloc_gc(base, 0, 32); |
68 | sirfsoc_alloc_gc(base + 4, 32, SIRFSOC_NUM_IRQS - 32); | 70 | sirfsoc_alloc_gc(base + 4, 32, SIRFSOC_NUM_IRQS - 32); |