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authorRaffaele Recalcati <raffaele.recalcati@bticino.it>2010-07-06 04:39:04 -0400
committerMark Brown <broonie@opensource.wolfsonmicro.com>2010-07-06 10:54:07 -0400
commitd9823ed9fa3126097dfd2bbce6dc33957c1be728 (patch)
treea929aead29f43232b408b182ce5a5e5e4c8654a0
parentec6375533748806a1a49dad7ce124cc02886854a (diff)
ASoC: DaVinci: More accurate continuous serial clock for McBSP (I2S)
i2s_accurate_sck switch can be used to have a better approximate sampling frequency. The clock is an externally visible bit clock and it is named i2s continuous serial clock (I2S_SCK). The trade off is between more accurate clock (fast clock) and less accurate clock (slow clock). The waveform will be not symmetric. Probably it is possible to get a better algorithm for calculating the divider, trying to keep a slower clock as possible. This patch has been developed against the http://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-davinci.git git tree and has been tested on bmx board (similar to dm365 evm, but using uda1345 as external audio codec). Signed-off-by: Raffaele Recalcati <raffaele.recalcati@bticino.it> Signed-off-by: Davide Bonfanti <davide.bonfanti@bticino.it> Acked-by: Liam Girdwood <lrg@slimlogic.co.uk> Acked-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
-rw-r--r--arch/arm/mach-davinci/include/mach/asp.h33
-rw-r--r--sound/soc/davinci/davinci-i2s.c24
2 files changed, 52 insertions, 5 deletions
diff --git a/arch/arm/mach-davinci/include/mach/asp.h b/arch/arm/mach-davinci/include/mach/asp.h
index 0847d2144f1f..b12c69edeea5 100644
--- a/arch/arm/mach-davinci/include/mach/asp.h
+++ b/arch/arm/mach-davinci/include/mach/asp.h
@@ -73,6 +73,39 @@ struct snd_platform_data {
73 */ 73 */
74 int clk_input_pin; 74 int clk_input_pin;
75 75
76 /*
77 * This flag works when both clock and FS are outputs for the cpu
78 * and makes clock more accurate (FS is not symmetrical and the
79 * clock is very fast.
80 * The clock becoming faster is named
81 * i2s continuous serial clock (I2S_SCK) and it is an externally
82 * visible bit clock.
83 *
84 * first line : WordSelect
85 * second line : ContinuousSerialClock
86 * third line: SerialData
87 *
88 * SYMMETRICAL APPROACH:
89 * _______________________ LEFT
90 * _| RIGHT |______________________|
91 * _ _ _ _ _ _ _ _
92 * _| |_| |_ x16 _| |_| |_| |_| |_ x16 _| |_| |_
93 * _ _ _ _ _ _ _ _
94 * _/ \_/ \_ ... _/ \_/ \_/ \_/ \_ ... _/ \_/ \_
95 * \_/ \_/ \_/ \_/ \_/ \_/ \_/ \_/
96 *
97 * ACCURATE CLOCK APPROACH:
98 * ______________ LEFT
99 * _| RIGHT |_______________________________|
100 * _ _ _ _ _ _ _ _ _
101 * _| |_ x16 _| |_| |_ x16 _| |_| |_| |_| |_| |_| |
102 * _ _ _ _ dummy cycles
103 * _/ \_ ... _/ \_/ \_ ... _/ \__________________
104 * \_/ \_/ \_/ \_/
105 *
106 */
107 bool i2s_accurate_sck;
108
76 /* McASP specific fields */ 109 /* McASP specific fields */
77 int tdm_slots; 110 int tdm_slots;
78 u8 op_mode; 111 u8 op_mode;
diff --git a/sound/soc/davinci/davinci-i2s.c b/sound/soc/davinci/davinci-i2s.c
index ba5644b5fbbf..b251bc9a9812 100644
--- a/sound/soc/davinci/davinci-i2s.c
+++ b/sound/soc/davinci/davinci-i2s.c
@@ -155,6 +155,7 @@ struct davinci_mcbsp_dev {
155 unsigned int fmt; 155 unsigned int fmt;
156 int clk_div; 156 int clk_div;
157 int clk_input_pin; 157 int clk_input_pin;
158 bool i2s_accurate_sck;
158}; 159};
159 160
160static inline void davinci_mcbsp_write_reg(struct davinci_mcbsp_dev *dev, 161static inline void davinci_mcbsp_write_reg(struct davinci_mcbsp_dev *dev,
@@ -447,11 +448,23 @@ static int davinci_i2s_hw_params(struct snd_pcm_substream *substream,
447 DAVINCI_MCBSP_SRGR_CLKSM; 448 DAVINCI_MCBSP_SRGR_CLKSM;
448 srgr |= DAVINCI_MCBSP_SRGR_FWID(mcbsp_word_length * 449 srgr |= DAVINCI_MCBSP_SRGR_FWID(mcbsp_word_length *
449 8 - 1); 450 8 - 1);
450 /* symmetric waveforms */ 451 if (dev->i2s_accurate_sck) {
451 clk_div = freq / (mcbsp_word_length * 16) / 452 clk_div = 256;
452 params->rate_num * params->rate_den; 453 do {
453 srgr |= DAVINCI_MCBSP_SRGR_FPER(mcbsp_word_length * 454 framesize = (freq / (--clk_div)) /
454 16 - 1); 455 params->rate_num *
456 params->rate_den;
457 } while (((framesize < 33) || (framesize > 4095)) &&
458 (clk_div));
459 clk_div--;
460 srgr |= DAVINCI_MCBSP_SRGR_FPER(framesize - 1);
461 } else {
462 /* symmetric waveforms */
463 clk_div = freq / (mcbsp_word_length * 16) /
464 params->rate_num * params->rate_den;
465 srgr |= DAVINCI_MCBSP_SRGR_FPER(mcbsp_word_length *
466 16 - 1);
467 }
455 clk_div &= 0xFF; 468 clk_div &= 0xFF;
456 srgr |= clk_div; 469 srgr |= clk_div;
457 break; 470 break;
@@ -662,6 +675,7 @@ static int davinci_i2s_probe(struct platform_device *pdev)
662 dev->dma_params[SNDRV_PCM_STREAM_CAPTURE].sram_size = 675 dev->dma_params[SNDRV_PCM_STREAM_CAPTURE].sram_size =
663 pdata->sram_size_capture; 676 pdata->sram_size_capture;
664 dev->clk_input_pin = pdata->clk_input_pin; 677 dev->clk_input_pin = pdata->clk_input_pin;
678 dev->i2s_accurate_sck = pdata->i2s_accurate_sck;
665 } 679 }
666 dev->clk = clk_get(&pdev->dev, NULL); 680 dev->clk = clk_get(&pdev->dev, NULL);
667 if (IS_ERR(dev->clk)) { 681 if (IS_ERR(dev->clk)) {