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authorLinus Torvalds <torvalds@g5.osdl.org>2006-01-10 12:00:55 -0500
committerLinus Torvalds <torvalds@g5.osdl.org>2006-01-10 12:00:55 -0500
commitd936cfc72032fb4af03d1edd99596d18ea1f081c (patch)
tree6d524c57fbff717ba82c6f4925659f6ec901d45d
parent4f47707b056bd2e3627ef390557ee93d312daba5 (diff)
parentadfc76419bff33542d4fd53dc7f24818f846f194 (diff)
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
Diffstat
-rw-r--r--arch/mips/Kconfig10
-rw-r--r--arch/mips/Makefile1
-rw-r--r--arch/mips/configs/bigsur_defconfig1
-rw-r--r--arch/mips/configs/cobalt_defconfig1
-rw-r--r--arch/mips/configs/ddb5476_defconfig1
-rw-r--r--arch/mips/configs/ddb5477_defconfig1
-rw-r--r--arch/mips/configs/ev64120_defconfig1
-rw-r--r--arch/mips/configs/ev96100_defconfig1
-rw-r--r--arch/mips/configs/ip22_defconfig1
-rw-r--r--arch/mips/configs/ip27_defconfig1
-rw-r--r--arch/mips/configs/ip32_defconfig1
-rw-r--r--arch/mips/configs/it8172_defconfig1
-rw-r--r--arch/mips/configs/ivr_defconfig1
-rw-r--r--arch/mips/configs/jaguar-atx_defconfig1
-rw-r--r--arch/mips/configs/lasat200_defconfig1
-rw-r--r--arch/mips/configs/malta_defconfig10
-rw-r--r--arch/mips/configs/ocelot_3_defconfig1
-rw-r--r--arch/mips/configs/ocelot_c_defconfig1
-rw-r--r--arch/mips/configs/ocelot_defconfig1
-rw-r--r--arch/mips/configs/ocelot_g_defconfig1
-rw-r--r--arch/mips/configs/pnx8550-v2pci_defconfig1
-rw-r--r--arch/mips/configs/rbhma4500_defconfig1
-rw-r--r--arch/mips/configs/rm200_defconfig1
-rw-r--r--arch/mips/configs/sb1250-swarm_defconfig1
-rw-r--r--arch/mips/configs/yosemite_defconfig1
-rw-r--r--arch/mips/defconfig1
-rw-r--r--arch/mips/kernel/cpu-probe.c39
-rw-r--r--arch/mips/kernel/process.c4
-rw-r--r--arch/mips/kernel/ptrace.c8
-rw-r--r--arch/mips/kernel/ptrace32.c8
-rw-r--r--arch/mips/kernel/signal32.c2
-rw-r--r--arch/mips/kernel/time.c32
-rw-r--r--arch/mips/kernel/vpe.c8
-rw-r--r--arch/mips/lib/iomap.c2
-rw-r--r--arch/mips/math-emu/dp_fint.c2
-rw-r--r--arch/mips/math-emu/dp_flong.c2
-rw-r--r--arch/mips/math-emu/sp_fint.c2
-rw-r--r--arch/mips/math-emu/sp_flong.c2
-rw-r--r--arch/mips/mips-boards/generic/time.c33
-rw-r--r--arch/mips/mm/c-r4k.c4
-rw-r--r--arch/mips/oprofile/common.c3
-rw-r--r--arch/mips/oprofile/op_impl.h4
-rw-r--r--arch/mips/oprofile/op_model_mipsxx.c22
-rw-r--r--arch/mips/pci/fixup-capcella.c2
-rw-r--r--arch/mips/pci/fixup-mpc30x.c2
-rw-r--r--arch/mips/pci/fixup-tb0219.c2
-rw-r--r--arch/mips/pci/fixup-tb0226.c2
-rw-r--r--arch/mips/pci/fixup-tb0287.c2
-rw-r--r--arch/mips/pci/ops-vr41xx.c2
-rw-r--r--arch/mips/pci/pci-vr41xx.c2
-rw-r--r--arch/mips/pci/pci-vr41xx.h2
-rw-r--r--arch/mips/vr41xx/casio-e55/setup.c2
-rw-r--r--arch/mips/vr41xx/common/bcu.c4
-rw-r--r--arch/mips/vr41xx/common/cmu.c4
-rw-r--r--arch/mips/vr41xx/common/icu.c4
-rw-r--r--arch/mips/vr41xx/common/init.c2
-rw-r--r--arch/mips/vr41xx/common/int-handler.S2
-rw-r--r--arch/mips/vr41xx/common/irq.c2
-rw-r--r--arch/mips/vr41xx/common/pmu.c2
-rw-r--r--arch/mips/vr41xx/common/type.c2
-rw-r--r--arch/mips/vr41xx/common/vrc4173.c2
-rw-r--r--arch/mips/vr41xx/ibm-workpad/setup.c2
-rw-r--r--drivers/char/tb0219.c4
-rw-r--r--drivers/char/vr41xx_giu.c4
-rw-r--r--drivers/char/vr41xx_rtc.c4
-rw-r--r--drivers/pcmcia/vrc4171_card.c4
-rw-r--r--drivers/pcmcia/vrc4173_cardu.c4
-rw-r--r--drivers/pcmcia/vrc4173_cardu.h2
-rw-r--r--drivers/serial/vr41xx_siu.c2
-rw-r--r--include/asm-mips/atomic.h43
-rw-r--r--include/asm-mips/cpu-features.h21
-rw-r--r--include/asm-mips/cpu.h20
-rw-r--r--include/asm-mips/delay.h6
-rw-r--r--include/asm-mips/dsp.h4
-rw-r--r--include/asm-mips/elf.h4
-rw-r--r--include/asm-mips/hazards.h20
-rw-r--r--include/asm-mips/interrupt.h1
-rw-r--r--include/asm-mips/mach-au1x00/au1000.h7
-rw-r--r--include/asm-mips/mach-ip22/cpu-feature-overrides.h5
-rw-r--r--include/asm-mips/mach-ip27/cpu-feature-overrides.h5
-rw-r--r--include/asm-mips/mach-ip32/cpu-feature-overrides.h5
-rw-r--r--include/asm-mips/mach-ja/cpu-feature-overrides.h5
-rw-r--r--include/asm-mips/mach-ocelot3/cpu-feature-overrides.h5
-rw-r--r--include/asm-mips/mach-rm200/cpu-feature-overrides.h5
-rw-r--r--include/asm-mips/mach-yosemite/cpu-feature-overrides.h5
-rw-r--r--include/asm-mips/mipsregs.h2
-rw-r--r--include/asm-mips/processor.h1
-rw-r--r--include/asm-mips/vr41xx/capcella.h2
-rw-r--r--include/asm-mips/vr41xx/e55.h2
-rw-r--r--include/asm-mips/vr41xx/giu.h2
-rw-r--r--include/asm-mips/vr41xx/mpc30x.h2
-rw-r--r--include/asm-mips/vr41xx/pci.h2
-rw-r--r--include/asm-mips/vr41xx/siu.h2
-rw-r--r--include/asm-mips/vr41xx/tb0219.h2
-rw-r--r--include/asm-mips/vr41xx/tb0226.h2
-rw-r--r--include/asm-mips/vr41xx/vr41xx.h2
-rw-r--r--include/asm-mips/vr41xx/vrc4173.h2
-rw-r--r--include/asm-mips/vr41xx/workpad.h2
98 files changed, 285 insertions, 190 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index b50be449d3f5..c3e852e9953e 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -1471,7 +1471,7 @@ config SB1_PASS_2_1_WORKAROUNDS
1471 1471
1472config 64BIT_PHYS_ADDR 1472config 64BIT_PHYS_ADDR
1473 bool "Support for 64-bit physical address space" 1473 bool "Support for 64-bit physical address space"
1474 depends on (CPU_R4X00 || CPU_R5000 || CPU_RM7000 || CPU_RM9000 || CPU_R10000 || CPU_SB1 || CPU_MIPS32_R1 || CPU_MIPS64_R1) && 32BIT 1474 depends on (CPU_R4X00 || CPU_R5000 || CPU_RM7000 || CPU_RM9000 || CPU_R10000 || CPU_SB1 || CPU_MIPS32 || CPU_MIPS64) && 32BIT
1475 1475
1476config CPU_ADVANCED 1476config CPU_ADVANCED
1477 bool "Override CPU Options" 1477 bool "Override CPU Options"
@@ -1492,14 +1492,6 @@ config CPU_HAS_LLSC
1492 for better performance, N if you don't know. You must say Y here 1492 for better performance, N if you don't know. You must say Y here
1493 for multiprocessor machines. 1493 for multiprocessor machines.
1494 1494
1495config CPU_HAS_LLDSCD
1496 bool "lld/scd Instructions available" if CPU_ADVANCED
1497 default y if !CPU_ADVANCED && !CPU_R3000 && !CPU_VR41XX && !CPU_TX39XX && !CPU_MIPS32_R1
1498 help
1499 Say Y here if your CPU has the lld and scd instructions, the 64-bit
1500 equivalents of ll and sc. Say Y here for better performance, N if
1501 you don't know. You must say Y here for multiprocessor machines.
1502
1503config CPU_HAS_WB 1495config CPU_HAS_WB
1504 bool "Writeback Buffer available" if CPU_ADVANCED 1496 bool "Writeback Buffer available" if CPU_ADVANCED
1505 default y if !CPU_ADVANCED && CPU_R3000 && MACH_DECSTATION 1497 default y if !CPU_ADVANCED && CPU_R3000 && MACH_DECSTATION
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index e14ba5e01a36..2a9f2ef27b29 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -93,7 +93,6 @@ endif
93# 93#
94cflags-y += -I $(TOPDIR)/include/asm/gcc 94cflags-y += -I $(TOPDIR)/include/asm/gcc
95cflags-y += -G 0 -mno-abicalls -fno-pic -pipe 95cflags-y += -G 0 -mno-abicalls -fno-pic -pipe
96cflags-y += $(call cc-option, -finline-limit=100000)
97LDFLAGS_vmlinux += -G 0 -static -n -nostdlib 96LDFLAGS_vmlinux += -G 0 -static -n -nostdlib
98MODFLAGS += -mlong-calls 97MODFLAGS += -mlong-calls
99 98
diff --git a/arch/mips/configs/bigsur_defconfig b/arch/mips/configs/bigsur_defconfig
index 069f9d14983e..6fd353779813 100644
--- a/arch/mips/configs/bigsur_defconfig
+++ b/arch/mips/configs/bigsur_defconfig
@@ -130,7 +130,6 @@ CONFIG_PAGE_SIZE_4KB=y
130# CONFIG_SIBYTE_DMA_PAGEOPS is not set 130# CONFIG_SIBYTE_DMA_PAGEOPS is not set
131# CONFIG_MIPS_MT is not set 131# CONFIG_MIPS_MT is not set
132CONFIG_CPU_HAS_LLSC=y 132CONFIG_CPU_HAS_LLSC=y
133CONFIG_CPU_HAS_LLDSCD=y
134CONFIG_CPU_HAS_SYNC=y 133CONFIG_CPU_HAS_SYNC=y
135CONFIG_GENERIC_HARDIRQS=y 134CONFIG_GENERIC_HARDIRQS=y
136CONFIG_GENERIC_IRQ_PROBE=y 135CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/cobalt_defconfig b/arch/mips/configs/cobalt_defconfig
index 216f4023a81b..1d3ee18ea8bb 100644
--- a/arch/mips/configs/cobalt_defconfig
+++ b/arch/mips/configs/cobalt_defconfig
@@ -115,7 +115,6 @@ CONFIG_PAGE_SIZE_4KB=y
115# CONFIG_MIPS_MT is not set 115# CONFIG_MIPS_MT is not set
116# CONFIG_CPU_ADVANCED is not set 116# CONFIG_CPU_ADVANCED is not set
117CONFIG_CPU_HAS_LLSC=y 117CONFIG_CPU_HAS_LLSC=y
118CONFIG_CPU_HAS_LLDSCD=y
119CONFIG_CPU_HAS_SYNC=y 118CONFIG_CPU_HAS_SYNC=y
120CONFIG_GENERIC_HARDIRQS=y 119CONFIG_GENERIC_HARDIRQS=y
121CONFIG_GENERIC_IRQ_PROBE=y 120CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/ddb5476_defconfig b/arch/mips/configs/ddb5476_defconfig
index bea00a9e9269..a81e2de6947f 100644
--- a/arch/mips/configs/ddb5476_defconfig
+++ b/arch/mips/configs/ddb5476_defconfig
@@ -116,7 +116,6 @@ CONFIG_PAGE_SIZE_4KB=y
116# CONFIG_MIPS_MT is not set 116# CONFIG_MIPS_MT is not set
117# CONFIG_CPU_ADVANCED is not set 117# CONFIG_CPU_ADVANCED is not set
118CONFIG_CPU_HAS_LLSC=y 118CONFIG_CPU_HAS_LLSC=y
119CONFIG_CPU_HAS_LLDSCD=y
120CONFIG_CPU_HAS_SYNC=y 119CONFIG_CPU_HAS_SYNC=y
121CONFIG_GENERIC_HARDIRQS=y 120CONFIG_GENERIC_HARDIRQS=y
122CONFIG_GENERIC_IRQ_PROBE=y 121CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/ddb5477_defconfig b/arch/mips/configs/ddb5477_defconfig
index 61f7171ca7ed..f1c27c2fb033 100644
--- a/arch/mips/configs/ddb5477_defconfig
+++ b/arch/mips/configs/ddb5477_defconfig
@@ -116,7 +116,6 @@ CONFIG_PAGE_SIZE_4KB=y
116# CONFIG_MIPS_MT is not set 116# CONFIG_MIPS_MT is not set
117# CONFIG_CPU_ADVANCED is not set 117# CONFIG_CPU_ADVANCED is not set
118CONFIG_CPU_HAS_LLSC=y 118CONFIG_CPU_HAS_LLSC=y
119CONFIG_CPU_HAS_LLDSCD=y
120CONFIG_CPU_HAS_SYNC=y 119CONFIG_CPU_HAS_SYNC=y
121CONFIG_GENERIC_HARDIRQS=y 120CONFIG_GENERIC_HARDIRQS=y
122CONFIG_GENERIC_IRQ_PROBE=y 121CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/ev64120_defconfig b/arch/mips/configs/ev64120_defconfig
index 14e3815f11e6..aa24d85ea94d 100644
--- a/arch/mips/configs/ev64120_defconfig
+++ b/arch/mips/configs/ev64120_defconfig
@@ -118,7 +118,6 @@ CONFIG_PAGE_SIZE_4KB=y
118# CONFIG_64BIT_PHYS_ADDR is not set 118# CONFIG_64BIT_PHYS_ADDR is not set
119# CONFIG_CPU_ADVANCED is not set 119# CONFIG_CPU_ADVANCED is not set
120CONFIG_CPU_HAS_LLSC=y 120CONFIG_CPU_HAS_LLSC=y
121CONFIG_CPU_HAS_LLDSCD=y
122CONFIG_CPU_HAS_SYNC=y 121CONFIG_CPU_HAS_SYNC=y
123CONFIG_GENERIC_HARDIRQS=y 122CONFIG_GENERIC_HARDIRQS=y
124CONFIG_GENERIC_IRQ_PROBE=y 123CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/ev96100_defconfig b/arch/mips/configs/ev96100_defconfig
index 510819581d8a..eeed0e5ad260 100644
--- a/arch/mips/configs/ev96100_defconfig
+++ b/arch/mips/configs/ev96100_defconfig
@@ -121,7 +121,6 @@ CONFIG_CPU_HAS_PREFETCH=y
121# CONFIG_64BIT_PHYS_ADDR is not set 121# CONFIG_64BIT_PHYS_ADDR is not set
122# CONFIG_CPU_ADVANCED is not set 122# CONFIG_CPU_ADVANCED is not set
123CONFIG_CPU_HAS_LLSC=y 123CONFIG_CPU_HAS_LLSC=y
124CONFIG_CPU_HAS_LLDSCD=y
125CONFIG_CPU_HAS_SYNC=y 124CONFIG_CPU_HAS_SYNC=y
126CONFIG_GENERIC_HARDIRQS=y 125CONFIG_GENERIC_HARDIRQS=y
127CONFIG_GENERIC_IRQ_PROBE=y 126CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/ip22_defconfig b/arch/mips/configs/ip22_defconfig
index 67979e3e606e..e56351abf87a 100644
--- a/arch/mips/configs/ip22_defconfig
+++ b/arch/mips/configs/ip22_defconfig
@@ -123,7 +123,6 @@ CONFIG_IP22_CPU_SCACHE=y
123# CONFIG_64BIT_PHYS_ADDR is not set 123# CONFIG_64BIT_PHYS_ADDR is not set
124# CONFIG_CPU_ADVANCED is not set 124# CONFIG_CPU_ADVANCED is not set
125CONFIG_CPU_HAS_LLSC=y 125CONFIG_CPU_HAS_LLSC=y
126CONFIG_CPU_HAS_LLDSCD=y
127CONFIG_CPU_HAS_SYNC=y 126CONFIG_CPU_HAS_SYNC=y
128CONFIG_GENERIC_HARDIRQS=y 127CONFIG_GENERIC_HARDIRQS=y
129CONFIG_GENERIC_IRQ_PROBE=y 128CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/ip27_defconfig b/arch/mips/configs/ip27_defconfig
index 03af44d1d846..e17d3adff021 100644
--- a/arch/mips/configs/ip27_defconfig
+++ b/arch/mips/configs/ip27_defconfig
@@ -119,7 +119,6 @@ CONFIG_PAGE_SIZE_4KB=y
119CONFIG_CPU_HAS_PREFETCH=y 119CONFIG_CPU_HAS_PREFETCH=y
120# CONFIG_MIPS_MT is not set 120# CONFIG_MIPS_MT is not set
121CONFIG_CPU_HAS_LLSC=y 121CONFIG_CPU_HAS_LLSC=y
122CONFIG_CPU_HAS_LLDSCD=y
123CONFIG_CPU_HAS_SYNC=y 122CONFIG_CPU_HAS_SYNC=y
124CONFIG_GENERIC_HARDIRQS=y 123CONFIG_GENERIC_HARDIRQS=y
125CONFIG_GENERIC_IRQ_PROBE=y 124CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/ip32_defconfig b/arch/mips/configs/ip32_defconfig
index cba2a49cceb1..967e7acd8e1f 100644
--- a/arch/mips/configs/ip32_defconfig
+++ b/arch/mips/configs/ip32_defconfig
@@ -121,7 +121,6 @@ CONFIG_R5000_CPU_SCACHE=y
121CONFIG_RM7000_CPU_SCACHE=y 121CONFIG_RM7000_CPU_SCACHE=y
122# CONFIG_MIPS_MT is not set 122# CONFIG_MIPS_MT is not set
123CONFIG_CPU_HAS_LLSC=y 123CONFIG_CPU_HAS_LLSC=y
124CONFIG_CPU_HAS_LLDSCD=y
125CONFIG_CPU_HAS_SYNC=y 124CONFIG_CPU_HAS_SYNC=y
126CONFIG_GENERIC_HARDIRQS=y 125CONFIG_GENERIC_HARDIRQS=y
127CONFIG_GENERIC_IRQ_PROBE=y 126CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/it8172_defconfig b/arch/mips/configs/it8172_defconfig
index e7ee1679af90..b5fa9639db6f 100644
--- a/arch/mips/configs/it8172_defconfig
+++ b/arch/mips/configs/it8172_defconfig
@@ -117,7 +117,6 @@ CONFIG_PAGE_SIZE_4KB=y
117# CONFIG_MIPS_MT is not set 117# CONFIG_MIPS_MT is not set
118# CONFIG_CPU_ADVANCED is not set 118# CONFIG_CPU_ADVANCED is not set
119CONFIG_CPU_HAS_LLSC=y 119CONFIG_CPU_HAS_LLSC=y
120CONFIG_CPU_HAS_LLDSCD=y
121CONFIG_CPU_HAS_SYNC=y 120CONFIG_CPU_HAS_SYNC=y
122CONFIG_GENERIC_HARDIRQS=y 121CONFIG_GENERIC_HARDIRQS=y
123CONFIG_GENERIC_IRQ_PROBE=y 122CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/ivr_defconfig b/arch/mips/configs/ivr_defconfig
index 138c8a60a4dc..71386938d47f 100644
--- a/arch/mips/configs/ivr_defconfig
+++ b/arch/mips/configs/ivr_defconfig
@@ -114,7 +114,6 @@ CONFIG_PAGE_SIZE_4KB=y
114# CONFIG_MIPS_MT is not set 114# CONFIG_MIPS_MT is not set
115# CONFIG_CPU_ADVANCED is not set 115# CONFIG_CPU_ADVANCED is not set
116CONFIG_CPU_HAS_LLSC=y 116CONFIG_CPU_HAS_LLSC=y
117CONFIG_CPU_HAS_LLDSCD=y
118CONFIG_CPU_HAS_SYNC=y 117CONFIG_CPU_HAS_SYNC=y
119CONFIG_GENERIC_HARDIRQS=y 118CONFIG_GENERIC_HARDIRQS=y
120CONFIG_GENERIC_IRQ_PROBE=y 119CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/jaguar-atx_defconfig b/arch/mips/configs/jaguar-atx_defconfig
index 6238e0d6a430..14fb46886708 100644
--- a/arch/mips/configs/jaguar-atx_defconfig
+++ b/arch/mips/configs/jaguar-atx_defconfig
@@ -124,7 +124,6 @@ CONFIG_CPU_HAS_PREFETCH=y
124# CONFIG_64BIT_PHYS_ADDR is not set 124# CONFIG_64BIT_PHYS_ADDR is not set
125# CONFIG_CPU_ADVANCED is not set 125# CONFIG_CPU_ADVANCED is not set
126CONFIG_CPU_HAS_LLSC=y 126CONFIG_CPU_HAS_LLSC=y
127CONFIG_CPU_HAS_LLDSCD=y
128CONFIG_CPU_HAS_SYNC=y 127CONFIG_CPU_HAS_SYNC=y
129CONFIG_GENERIC_HARDIRQS=y 128CONFIG_GENERIC_HARDIRQS=y
130CONFIG_GENERIC_IRQ_PROBE=y 129CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/lasat200_defconfig b/arch/mips/configs/lasat200_defconfig
index a7ad99b12fe5..6c5df76d48d9 100644
--- a/arch/mips/configs/lasat200_defconfig
+++ b/arch/mips/configs/lasat200_defconfig
@@ -121,7 +121,6 @@ CONFIG_R5000_CPU_SCACHE=y
121# CONFIG_64BIT_PHYS_ADDR is not set 121# CONFIG_64BIT_PHYS_ADDR is not set
122# CONFIG_CPU_ADVANCED is not set 122# CONFIG_CPU_ADVANCED is not set
123CONFIG_CPU_HAS_LLSC=y 123CONFIG_CPU_HAS_LLSC=y
124CONFIG_CPU_HAS_LLDSCD=y
125CONFIG_CPU_HAS_SYNC=y 124CONFIG_CPU_HAS_SYNC=y
126CONFIG_GENERIC_HARDIRQS=y 125CONFIG_GENERIC_HARDIRQS=y
127CONFIG_GENERIC_IRQ_PROBE=y 126CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/malta_defconfig b/arch/mips/configs/malta_defconfig
index d1c44216f1c1..da0677a03c1d 100644
--- a/arch/mips/configs/malta_defconfig
+++ b/arch/mips/configs/malta_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.15-rc2 3# Linux kernel version: 2.6.15-rc5
4# Thu Nov 24 01:06:35 2005 4# Fri Dec 23 02:21:03 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7 7
@@ -87,8 +87,8 @@ CONFIG_HAVE_STD_PC_SERIAL_PORT=y
87# 87#
88# CPU selection 88# CPU selection
89# 89#
90CONFIG_CPU_MIPS32_R1=y 90# CONFIG_CPU_MIPS32_R1 is not set
91# CONFIG_CPU_MIPS32_R2 is not set 91CONFIG_CPU_MIPS32_R2=y
92# CONFIG_CPU_MIPS64_R1 is not set 92# CONFIG_CPU_MIPS64_R1 is not set
93# CONFIG_CPU_MIPS64_R2 is not set 93# CONFIG_CPU_MIPS64_R2 is not set
94# CONFIG_CPU_R3000 is not set 94# CONFIG_CPU_R3000 is not set
@@ -112,7 +112,7 @@ CONFIG_SYS_HAS_CPU_MIPS64_R1=y
112CONFIG_SYS_HAS_CPU_NEVADA=y 112CONFIG_SYS_HAS_CPU_NEVADA=y
113CONFIG_SYS_HAS_CPU_RM7000=y 113CONFIG_SYS_HAS_CPU_RM7000=y
114CONFIG_CPU_MIPS32=y 114CONFIG_CPU_MIPS32=y
115CONFIG_CPU_MIPSR1=y 115CONFIG_CPU_MIPSR2=y
116CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y 116CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
117CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y 117CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
118CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y 118CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
diff --git a/arch/mips/configs/ocelot_3_defconfig b/arch/mips/configs/ocelot_3_defconfig
index 9081ea5a9dbd..7ad8718c1b69 100644
--- a/arch/mips/configs/ocelot_3_defconfig
+++ b/arch/mips/configs/ocelot_3_defconfig
@@ -122,7 +122,6 @@ CONFIG_CPU_HAS_PREFETCH=y
122# CONFIG_64BIT_PHYS_ADDR is not set 122# CONFIG_64BIT_PHYS_ADDR is not set
123# CONFIG_CPU_ADVANCED is not set 123# CONFIG_CPU_ADVANCED is not set
124CONFIG_CPU_HAS_LLSC=y 124CONFIG_CPU_HAS_LLSC=y
125CONFIG_CPU_HAS_LLDSCD=y
126CONFIG_CPU_HAS_SYNC=y 125CONFIG_CPU_HAS_SYNC=y
127CONFIG_GENERIC_HARDIRQS=y 126CONFIG_GENERIC_HARDIRQS=y
128CONFIG_GENERIC_IRQ_PROBE=y 127CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/ocelot_c_defconfig b/arch/mips/configs/ocelot_c_defconfig
index 570fc4d18166..e8d6bb3551a2 100644
--- a/arch/mips/configs/ocelot_c_defconfig
+++ b/arch/mips/configs/ocelot_c_defconfig
@@ -118,7 +118,6 @@ CONFIG_RM7000_CPU_SCACHE=y
118CONFIG_CPU_HAS_PREFETCH=y 118CONFIG_CPU_HAS_PREFETCH=y
119# CONFIG_MIPS_MT is not set 119# CONFIG_MIPS_MT is not set
120CONFIG_CPU_HAS_LLSC=y 120CONFIG_CPU_HAS_LLSC=y
121CONFIG_CPU_HAS_LLDSCD=y
122CONFIG_CPU_HAS_SYNC=y 121CONFIG_CPU_HAS_SYNC=y
123CONFIG_GENERIC_HARDIRQS=y 122CONFIG_GENERIC_HARDIRQS=y
124CONFIG_GENERIC_IRQ_PROBE=y 123CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/ocelot_defconfig b/arch/mips/configs/ocelot_defconfig
index 6634ab24715c..f3787b68bdd1 100644
--- a/arch/mips/configs/ocelot_defconfig
+++ b/arch/mips/configs/ocelot_defconfig
@@ -123,7 +123,6 @@ CONFIG_CPU_HAS_PREFETCH=y
123# CONFIG_64BIT_PHYS_ADDR is not set 123# CONFIG_64BIT_PHYS_ADDR is not set
124# CONFIG_CPU_ADVANCED is not set 124# CONFIG_CPU_ADVANCED is not set
125CONFIG_CPU_HAS_LLSC=y 125CONFIG_CPU_HAS_LLSC=y
126CONFIG_CPU_HAS_LLDSCD=y
127CONFIG_CPU_HAS_SYNC=y 126CONFIG_CPU_HAS_SYNC=y
128CONFIG_GENERIC_HARDIRQS=y 127CONFIG_GENERIC_HARDIRQS=y
129CONFIG_GENERIC_IRQ_PROBE=y 128CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/ocelot_g_defconfig b/arch/mips/configs/ocelot_g_defconfig
index 4c396e1e2f0a..b6126ad4d06d 100644
--- a/arch/mips/configs/ocelot_g_defconfig
+++ b/arch/mips/configs/ocelot_g_defconfig
@@ -121,7 +121,6 @@ CONFIG_RM7000_CPU_SCACHE=y
121CONFIG_CPU_HAS_PREFETCH=y 121CONFIG_CPU_HAS_PREFETCH=y
122# CONFIG_MIPS_MT is not set 122# CONFIG_MIPS_MT is not set
123CONFIG_CPU_HAS_LLSC=y 123CONFIG_CPU_HAS_LLSC=y
124CONFIG_CPU_HAS_LLDSCD=y
125CONFIG_CPU_HAS_SYNC=y 124CONFIG_CPU_HAS_SYNC=y
126CONFIG_GENERIC_HARDIRQS=y 125CONFIG_GENERIC_HARDIRQS=y
127CONFIG_GENERIC_IRQ_PROBE=y 126CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/pnx8550-v2pci_defconfig b/arch/mips/configs/pnx8550-v2pci_defconfig
index d9a0d2fdba4f..4c650e708133 100644
--- a/arch/mips/configs/pnx8550-v2pci_defconfig
+++ b/arch/mips/configs/pnx8550-v2pci_defconfig
@@ -116,7 +116,6 @@ CONFIG_CPU_HAS_PREFETCH=y
116# CONFIG_64BIT_PHYS_ADDR is not set 116# CONFIG_64BIT_PHYS_ADDR is not set
117CONFIG_CPU_ADVANCED=y 117CONFIG_CPU_ADVANCED=y
118CONFIG_CPU_HAS_LLSC=y 118CONFIG_CPU_HAS_LLSC=y
119# CONFIG_CPU_HAS_LLDSCD is not set
120# CONFIG_CPU_HAS_WB is not set 119# CONFIG_CPU_HAS_WB is not set
121CONFIG_CPU_HAS_SYNC=y 120CONFIG_CPU_HAS_SYNC=y
122CONFIG_GENERIC_HARDIRQS=y 121CONFIG_GENERIC_HARDIRQS=y
diff --git a/arch/mips/configs/rbhma4500_defconfig b/arch/mips/configs/rbhma4500_defconfig
index 1cc145023584..9aaa43024aec 100644
--- a/arch/mips/configs/rbhma4500_defconfig
+++ b/arch/mips/configs/rbhma4500_defconfig
@@ -124,7 +124,6 @@ CONFIG_PAGE_SIZE_4KB=y
124# CONFIG_MIPS_MT is not set 124# CONFIG_MIPS_MT is not set
125CONFIG_CPU_ADVANCED=y 125CONFIG_CPU_ADVANCED=y
126CONFIG_CPU_HAS_LLSC=y 126CONFIG_CPU_HAS_LLSC=y
127CONFIG_CPU_HAS_LLDSCD=y
128CONFIG_CPU_HAS_WB=y 127CONFIG_CPU_HAS_WB=y
129CONFIG_CPU_HAS_SYNC=y 128CONFIG_CPU_HAS_SYNC=y
130CONFIG_GENERIC_HARDIRQS=y 129CONFIG_GENERIC_HARDIRQS=y
diff --git a/arch/mips/configs/rm200_defconfig b/arch/mips/configs/rm200_defconfig
index 30975b305ae5..abf61095931e 100644
--- a/arch/mips/configs/rm200_defconfig
+++ b/arch/mips/configs/rm200_defconfig
@@ -124,7 +124,6 @@ CONFIG_PAGE_SIZE_4KB=y
124# CONFIG_64BIT_PHYS_ADDR is not set 124# CONFIG_64BIT_PHYS_ADDR is not set
125# CONFIG_CPU_ADVANCED is not set 125# CONFIG_CPU_ADVANCED is not set
126CONFIG_CPU_HAS_LLSC=y 126CONFIG_CPU_HAS_LLSC=y
127CONFIG_CPU_HAS_LLDSCD=y
128CONFIG_CPU_HAS_SYNC=y 127CONFIG_CPU_HAS_SYNC=y
129CONFIG_GENERIC_HARDIRQS=y 128CONFIG_GENERIC_HARDIRQS=y
130CONFIG_GENERIC_IRQ_PROBE=y 129CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/sb1250-swarm_defconfig b/arch/mips/configs/sb1250-swarm_defconfig
index 63f1be18e9bf..52048c906079 100644
--- a/arch/mips/configs/sb1250-swarm_defconfig
+++ b/arch/mips/configs/sb1250-swarm_defconfig
@@ -133,7 +133,6 @@ CONFIG_CPU_HAS_PREFETCH=y
133# CONFIG_MIPS_MT is not set 133# CONFIG_MIPS_MT is not set
134CONFIG_SB1_PASS_1_WORKAROUNDS=y 134CONFIG_SB1_PASS_1_WORKAROUNDS=y
135CONFIG_CPU_HAS_LLSC=y 135CONFIG_CPU_HAS_LLSC=y
136CONFIG_CPU_HAS_LLDSCD=y
137CONFIG_CPU_HAS_SYNC=y 136CONFIG_CPU_HAS_SYNC=y
138CONFIG_GENERIC_HARDIRQS=y 137CONFIG_GENERIC_HARDIRQS=y
139CONFIG_GENERIC_IRQ_PROBE=y 138CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/yosemite_defconfig b/arch/mips/configs/yosemite_defconfig
index d51d5d16297c..468c2e443d71 100644
--- a/arch/mips/configs/yosemite_defconfig
+++ b/arch/mips/configs/yosemite_defconfig
@@ -118,7 +118,6 @@ CONFIG_CPU_HAS_PREFETCH=y
118# CONFIG_64BIT_PHYS_ADDR is not set 118# CONFIG_64BIT_PHYS_ADDR is not set
119# CONFIG_CPU_ADVANCED is not set 119# CONFIG_CPU_ADVANCED is not set
120CONFIG_CPU_HAS_LLSC=y 120CONFIG_CPU_HAS_LLSC=y
121CONFIG_CPU_HAS_LLDSCD=y
122CONFIG_CPU_HAS_SYNC=y 121CONFIG_CPU_HAS_SYNC=y
123CONFIG_GENERIC_HARDIRQS=y 122CONFIG_GENERIC_HARDIRQS=y
124CONFIG_GENERIC_IRQ_PROBE=y 123CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/defconfig b/arch/mips/defconfig
index 2a1b844da43f..4f125e9e8e0b 100644
--- a/arch/mips/defconfig
+++ b/arch/mips/defconfig
@@ -123,7 +123,6 @@ CONFIG_IP22_CPU_SCACHE=y
123# CONFIG_64BIT_PHYS_ADDR is not set 123# CONFIG_64BIT_PHYS_ADDR is not set
124# CONFIG_CPU_ADVANCED is not set 124# CONFIG_CPU_ADVANCED is not set
125CONFIG_CPU_HAS_LLSC=y 125CONFIG_CPU_HAS_LLSC=y
126CONFIG_CPU_HAS_LLDSCD=y
127CONFIG_CPU_HAS_SYNC=y 126CONFIG_CPU_HAS_SYNC=y
128CONFIG_GENERIC_HARDIRQS=y 127CONFIG_GENERIC_HARDIRQS=y
129CONFIG_GENERIC_IRQ_PROBE=y 128CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 5e1b08b00a33..fac48ad27b34 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -435,6 +435,9 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
435 } 435 }
436} 436}
437 437
438static char unknown_isa[] __initdata = KERN_ERR \
439 "Unsupported ISA type, c0.config0: %d.";
440
438static inline unsigned int decode_config0(struct cpuinfo_mips *c) 441static inline unsigned int decode_config0(struct cpuinfo_mips *c)
439{ 442{
440 unsigned int config0; 443 unsigned int config0;
@@ -447,16 +450,37 @@ static inline unsigned int decode_config0(struct cpuinfo_mips *c)
447 isa = (config0 & MIPS_CONF_AT) >> 13; 450 isa = (config0 & MIPS_CONF_AT) >> 13;
448 switch (isa) { 451 switch (isa) {
449 case 0: 452 case 0:
450 c->isa_level = MIPS_CPU_ISA_M32; 453 switch ((config0 >> 10) & 7) {
454 case 0:
455 c->isa_level = MIPS_CPU_ISA_M32R1;
456 break;
457 case 1:
458 c->isa_level = MIPS_CPU_ISA_M32R2;
459 break;
460 default:
461 goto unknown;
462 }
451 break; 463 break;
452 case 2: 464 case 2:
453 c->isa_level = MIPS_CPU_ISA_M64; 465 switch ((config0 >> 10) & 7) {
466 case 0:
467 c->isa_level = MIPS_CPU_ISA_M64R1;
468 break;
469 case 1:
470 c->isa_level = MIPS_CPU_ISA_M64R2;
471 break;
472 default:
473 goto unknown;
474 }
454 break; 475 break;
455 default: 476 default:
456 panic("Unsupported ISA type, cp0.config0.at: %d.", isa); 477 goto unknown;
457 } 478 }
458 479
459 return config0 & MIPS_CONF_M; 480 return config0 & MIPS_CONF_M;
481
482unknown:
483 panic(unknown_isa, config0);
460} 484}
461 485
462static inline unsigned int decode_config1(struct cpuinfo_mips *c) 486static inline unsigned int decode_config1(struct cpuinfo_mips *c)
@@ -568,7 +592,6 @@ static inline void cpu_probe_mips(struct cpuinfo_mips *c)
568 break; 592 break;
569 case PRID_IMP_34K: 593 case PRID_IMP_34K:
570 c->cputype = CPU_34K; 594 c->cputype = CPU_34K;
571 c->isa_level = MIPS_CPU_ISA_M32;
572 break; 595 break;
573 } 596 }
574} 597}
@@ -647,7 +670,7 @@ static inline void cpu_probe_philips(struct cpuinfo_mips *c)
647 switch (c->processor_id & 0xff00) { 670 switch (c->processor_id & 0xff00) {
648 case PRID_IMP_PR4450: 671 case PRID_IMP_PR4450:
649 c->cputype = CPU_PR4450; 672 c->cputype = CPU_PR4450;
650 c->isa_level = MIPS_CPU_ISA_M32; 673 c->isa_level = MIPS_CPU_ISA_M32R1;
651 break; 674 break;
652 default: 675 default:
653 panic("Unknown Philips Core!"); /* REVISIT: die? */ 676 panic("Unknown Philips Core!"); /* REVISIT: die? */
@@ -690,8 +713,10 @@ __init void cpu_probe(void)
690 if (c->options & MIPS_CPU_FPU) { 713 if (c->options & MIPS_CPU_FPU) {
691 c->fpu_id = cpu_get_fpu_id(); 714 c->fpu_id = cpu_get_fpu_id();
692 715
693 if (c->isa_level == MIPS_CPU_ISA_M32 || 716 if (c->isa_level == MIPS_CPU_ISA_M32R1 ||
694 c->isa_level == MIPS_CPU_ISA_M64) { 717 c->isa_level == MIPS_CPU_ISA_M32R2 ||
718 c->isa_level == MIPS_CPU_ISA_M64R1 ||
719 c->isa_level == MIPS_CPU_ISA_M64R2) {
695 if (c->fpu_id & MIPS_FPIR_3D) 720 if (c->fpu_id & MIPS_FPIR_3D)
696 c->ases |= MIPS_ASE_MIPS3D; 721 c->ases |= MIPS_ASE_MIPS3D;
697 } 722 }
diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c
index dd725779d91f..0476a4dce14e 100644
--- a/arch/mips/kernel/process.c
+++ b/arch/mips/kernel/process.c
@@ -205,7 +205,7 @@ int dump_fpu(struct pt_regs *regs, elf_fpregset_t *r)
205 return 1; 205 return 1;
206} 206}
207 207
208void dump_regs(elf_greg_t *gp, struct pt_regs *regs) 208void elf_dump_regs(elf_greg_t *gp, struct pt_regs *regs)
209{ 209{
210 int i; 210 int i;
211 211
@@ -231,7 +231,7 @@ int dump_task_regs (struct task_struct *tsk, elf_gregset_t *regs)
231{ 231{
232 struct thread_info *ti = tsk->thread_info; 232 struct thread_info *ti = tsk->thread_info;
233 long ksp = (unsigned long)ti + THREAD_SIZE - 32; 233 long ksp = (unsigned long)ti + THREAD_SIZE - 32;
234 dump_regs(&(*regs)[0], (struct pt_regs *) ksp - 1); 234 elf_dump_regs(&(*regs)[0], (struct pt_regs *) ksp - 1);
235 return 1; 235 return 1;
236} 236}
237 237
diff --git a/arch/mips/kernel/ptrace.c b/arch/mips/kernel/ptrace.c
index 510da5fda567..8d2549335304 100644
--- a/arch/mips/kernel/ptrace.c
+++ b/arch/mips/kernel/ptrace.c
@@ -280,12 +280,8 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
280 ret = -EIO; 280 ret = -EIO;
281 goto out; 281 goto out;
282 } 282 }
283 if (child->thread.dsp.used_dsp) { 283 dregs = __get_dsp_regs(child);
284 dregs = __get_dsp_regs(child); 284 tmp = (unsigned long) (dregs[addr - DSP_BASE]);
285 tmp = (unsigned long) (dregs[addr - DSP_BASE]);
286 } else {
287 tmp = -1; /* DSP registers yet used */
288 }
289 break; 285 break;
290 } 286 }
291 case DSP_CONTROL: 287 case DSP_CONTROL:
diff --git a/arch/mips/kernel/ptrace32.c b/arch/mips/kernel/ptrace32.c
index 7e55457a491f..1f998bfde165 100644
--- a/arch/mips/kernel/ptrace32.c
+++ b/arch/mips/kernel/ptrace32.c
@@ -201,12 +201,8 @@ asmlinkage int sys32_ptrace(int request, int pid, int addr, int data)
201 ret = -EIO; 201 ret = -EIO;
202 goto out_tsk; 202 goto out_tsk;
203 } 203 }
204 if (child->thread.dsp.used_dsp) { 204 dspreg_t *dregs = __get_dsp_regs(child);
205 dspreg_t *dregs = __get_dsp_regs(child); 205 tmp = (unsigned long) (dregs[addr - DSP_BASE]);
206 tmp = (unsigned long) (dregs[addr - DSP_BASE]);
207 } else {
208 tmp = -1; /* DSP registers yet used */
209 }
210 break; 206 break;
211 case DSP_CONTROL: 207 case DSP_CONTROL:
212 if (!cpu_has_dsp) { 208 if (!cpu_has_dsp) {
diff --git a/arch/mips/kernel/signal32.c b/arch/mips/kernel/signal32.c
index c856dbc52abb..98b185bbc947 100644
--- a/arch/mips/kernel/signal32.c
+++ b/arch/mips/kernel/signal32.c
@@ -588,7 +588,7 @@ static inline int setup_sigcontext32(struct pt_regs *regs,
588 err |= __put_user(regs->hi, &sc->sc_mdhi); 588 err |= __put_user(regs->hi, &sc->sc_mdhi);
589 err |= __put_user(regs->lo, &sc->sc_mdlo); 589 err |= __put_user(regs->lo, &sc->sc_mdlo);
590 if (cpu_has_dsp) { 590 if (cpu_has_dsp) {
591 err |= __put_user(rddsp(DSP_MASK), &sc->sc_hi1); 591 err |= __put_user(rddsp(DSP_MASK), &sc->sc_dsp);
592 err |= __put_user(mfhi1(), &sc->sc_hi1); 592 err |= __put_user(mfhi1(), &sc->sc_hi1);
593 err |= __put_user(mflo1(), &sc->sc_lo1); 593 err |= __put_user(mflo1(), &sc->sc_lo1);
594 err |= __put_user(mfhi2(), &sc->sc_hi2); 594 err |= __put_user(mfhi2(), &sc->sc_hi2);
diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c
index 787ed541d442..7050b4ffffcd 100644
--- a/arch/mips/kernel/time.c
+++ b/arch/mips/kernel/time.c
@@ -507,14 +507,38 @@ irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
507 return IRQ_HANDLED; 507 return IRQ_HANDLED;
508} 508}
509 509
510int null_perf_irq(struct pt_regs *regs)
511{
512 return 0;
513}
514
515int (*perf_irq)(struct pt_regs *regs) = null_perf_irq;
516
517EXPORT_SYMBOL(null_perf_irq);
518EXPORT_SYMBOL(perf_irq);
519
510asmlinkage void ll_timer_interrupt(int irq, struct pt_regs *regs) 520asmlinkage void ll_timer_interrupt(int irq, struct pt_regs *regs)
511{ 521{
522 int r2 = cpu_has_mips_r2;
523
512 irq_enter(); 524 irq_enter();
513 kstat_this_cpu.irqs[irq]++; 525 kstat_this_cpu.irqs[irq]++;
514 526
527 /*
528 * Suckage alert:
529 * Before R2 of the architecture there was no way to see if a
530 * performance counter interrupt was pending, so we have to run the
531 * performance counter interrupt handler anyway.
532 */
533 if (!r2 || (read_c0_cause() & (1 << 26)))
534 if (perf_irq(regs))
535 goto out;
536
515 /* we keep interrupt disabled all the time */ 537 /* we keep interrupt disabled all the time */
516 timer_interrupt(irq, NULL, regs); 538 if (!r2 || (read_c0_cause() & (1 << 30)))
539 timer_interrupt(irq, NULL, regs);
517 540
541out:
518 irq_exit(); 542 irq_exit();
519} 543}
520 544
@@ -628,9 +652,9 @@ void __init time_init(void)
628 mips_hpt_init = c0_hpt_init; 652 mips_hpt_init = c0_hpt_init;
629 } 653 }
630 654
631 if ((current_cpu_data.isa_level == MIPS_CPU_ISA_M32) || 655 if (cpu_has_mips32r1 || cpu_has_mips32r2 ||
632 (current_cpu_data.isa_level == MIPS_CPU_ISA_I) || 656 (current_cpu_data.isa_level == MIPS_CPU_ISA_I) ||
633 (current_cpu_data.isa_level == MIPS_CPU_ISA_II)) 657 (current_cpu_data.isa_level == MIPS_CPU_ISA_II))
634 /* 658 /*
635 * We need to calibrate the counter but we don't have 659 * We need to calibrate the counter but we don't have
636 * 64-bit division. 660 * 64-bit division.
diff --git a/arch/mips/kernel/vpe.c b/arch/mips/kernel/vpe.c
index 9c89eebc356f..ae83b755cf4a 100644
--- a/arch/mips/kernel/vpe.c
+++ b/arch/mips/kernel/vpe.c
@@ -99,9 +99,9 @@ struct vpe {
99 99
100 /* elfloader stuff */ 100 /* elfloader stuff */
101 void *load_addr; 101 void *load_addr;
102 u32 len; 102 unsigned long len;
103 char *pbuffer; 103 char *pbuffer;
104 u32 plen; 104 unsigned long plen;
105 105
106 unsigned long __start; 106 unsigned long __start;
107 107
@@ -253,11 +253,11 @@ void dump_mtregs(void)
253} 253}
254 254
255/* Find some VPE program space */ 255/* Find some VPE program space */
256static void *alloc_progmem(u32 len) 256static void *alloc_progmem(unsigned long len)
257{ 257{
258#ifdef CONFIG_MIPS_VPE_LOADER_TOM 258#ifdef CONFIG_MIPS_VPE_LOADER_TOM
259 /* this means you must tell linux to use less memory than you physically have */ 259 /* this means you must tell linux to use less memory than you physically have */
260 return (void *)((max_pfn * PAGE_SIZE) + KSEG0); 260 return pfn_to_kaddr(max_pfn);
261#else 261#else
262 // simple grab some mem for now 262 // simple grab some mem for now
263 return kmalloc(len, GFP_KERNEL); 263 return kmalloc(len, GFP_KERNEL);
diff --git a/arch/mips/lib/iomap.c b/arch/mips/lib/iomap.c
index b5d5fa833762..7e2ced715cfb 100644
--- a/arch/mips/lib/iomap.c
+++ b/arch/mips/lib/iomap.c
@@ -3,7 +3,7 @@
3 * 3 *
4 * This code is based on lib/iomap.c, by Linus Torvalds. 4 * This code is based on lib/iomap.c, by Linus Torvalds.
5 * 5 *
6 * Copyright (C) 2004-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> 6 * Copyright (C) 2004-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
7 * 7 *
8 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by 9 * it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/math-emu/dp_fint.c b/arch/mips/math-emu/dp_fint.c
index 0065deaee24b..a1962eb460f8 100644
--- a/arch/mips/math-emu/dp_fint.c
+++ b/arch/mips/math-emu/dp_fint.c
@@ -33,8 +33,6 @@ ieee754dp ieee754dp_fint(int x)
33 33
34 CLEARCX; 34 CLEARCX;
35 35
36 xc = ( 0 ? xc : xc );
37
38 if (x == 0) 36 if (x == 0)
39 return ieee754dp_zero(0); 37 return ieee754dp_zero(0);
40 if (x == 1 || x == -1) 38 if (x == 1 || x == -1)
diff --git a/arch/mips/math-emu/dp_flong.c b/arch/mips/math-emu/dp_flong.c
index cb105b1dd860..eae90a866aa1 100644
--- a/arch/mips/math-emu/dp_flong.c
+++ b/arch/mips/math-emu/dp_flong.c
@@ -33,8 +33,6 @@ ieee754dp ieee754dp_flong(s64 x)
33 33
34 CLEARCX; 34 CLEARCX;
35 35
36 xc = ( 0 ? xc : xc );
37
38 if (x == 0) 36 if (x == 0)
39 return ieee754dp_zero(0); 37 return ieee754dp_zero(0);
40 if (x == 1 || x == -1) 38 if (x == 1 || x == -1)
diff --git a/arch/mips/math-emu/sp_fint.c b/arch/mips/math-emu/sp_fint.c
index 42d9ed4b9a94..7aac13afb09a 100644
--- a/arch/mips/math-emu/sp_fint.c
+++ b/arch/mips/math-emu/sp_fint.c
@@ -33,8 +33,6 @@ ieee754sp ieee754sp_fint(int x)
33 33
34 CLEARCX; 34 CLEARCX;
35 35
36 xc = ( 0 ? xc : xc );
37
38 if (x == 0) 36 if (x == 0)
39 return ieee754sp_zero(0); 37 return ieee754sp_zero(0);
40 if (x == 1 || x == -1) 38 if (x == 1 || x == -1)
diff --git a/arch/mips/math-emu/sp_flong.c b/arch/mips/math-emu/sp_flong.c
index 1e26795ccecb..3d6c1d11c178 100644
--- a/arch/mips/math-emu/sp_flong.c
+++ b/arch/mips/math-emu/sp_flong.c
@@ -33,8 +33,6 @@ ieee754sp ieee754sp_flong(s64 x)
33 33
34 CLEARCX; 34 CLEARCX;
35 35
36 xc = ( 0 ? xc : xc );
37
38 if (x == 0) 36 if (x == 0)
39 return ieee754sp_zero(0); 37 return ieee754sp_zero(0);
40 if (x == 1 || x == -1) 38 if (x == 1 || x == -1)
diff --git a/arch/mips/mips-boards/generic/time.c b/arch/mips/mips-boards/generic/time.c
index 72a12d931cba..93f3bf2c2b22 100644
--- a/arch/mips/mips-boards/generic/time.c
+++ b/arch/mips/mips-boards/generic/time.c
@@ -75,20 +75,31 @@ static void mips_timer_dispatch (struct pt_regs *regs)
75 do_IRQ (mips_cpu_timer_irq, regs); 75 do_IRQ (mips_cpu_timer_irq, regs);
76} 76}
77 77
78extern int null_perf_irq(struct pt_regs *regs);
79
80extern int (*perf_irq)(struct pt_regs *regs);
81
78irqreturn_t mips_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) 82irqreturn_t mips_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
79{ 83{
80#ifdef CONFIG_SMP 84 int r2 = cpu_has_mips_r2;
81 int cpu = smp_processor_id(); 85 int cpu = smp_processor_id();
82 86
83 if (cpu == 0) { 87 if (cpu == 0) {
84 /* 88 /*
85 * CPU 0 handles the global timer interrupt job and process accounting 89 * CPU 0 handles the global timer interrupt job and process
86 * resets count/compare registers to trigger next timer int. 90 * accounting resets count/compare registers to trigger next
91 * timer int.
87 */ 92 */
88 (void) timer_interrupt(irq, dev_id, regs); 93 if (!r2 || (read_c0_cause() & (1 << 26)))
94 if (perf_irq(regs))
95 goto out;
96
97 /* we keep interrupt disabled all the time */
98 if (!r2 || (read_c0_cause() & (1 << 30)))
99 timer_interrupt(irq, NULL, regs);
100
89 scroll_display_message(); 101 scroll_display_message();
90 } 102 } else {
91 else {
92 /* Everyone else needs to reset the timer int here as 103 /* Everyone else needs to reset the timer int here as
93 ll_local_timer_interrupt doesn't */ 104 ll_local_timer_interrupt doesn't */
94 /* 105 /*
@@ -103,16 +114,8 @@ irqreturn_t mips_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
103 local_timer_interrupt (irq, dev_id, regs); 114 local_timer_interrupt (irq, dev_id, regs);
104 } 115 }
105 116
117out:
106 return IRQ_HANDLED; 118 return IRQ_HANDLED;
107#else
108 irqreturn_t r;
109
110 r = timer_interrupt(irq, dev_id, regs);
111
112 scroll_display_message();
113
114 return r;
115#endif
116} 119}
117 120
118/* 121/*
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index 38223b44d962..422b55fab07a 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -1183,8 +1183,8 @@ static void __init setup_scache(void)
1183 if (!sc_present) 1183 if (!sc_present)
1184 return; 1184 return;
1185 1185
1186 if ((c->isa_level == MIPS_CPU_ISA_M32 || 1186 if ((c->isa_level == MIPS_CPU_ISA_M32R1 ||
1187 c->isa_level == MIPS_CPU_ISA_M64) && 1187 c->isa_level == MIPS_CPU_ISA_M64R1) &&
1188 !(c->scache.flags & MIPS_CACHE_NOT_PRESENT)) 1188 !(c->scache.flags & MIPS_CACHE_NOT_PRESENT))
1189 panic("Dunno how to handle MIPS32 / MIPS64 second level cache"); 1189 panic("Dunno how to handle MIPS32 / MIPS64 second level cache");
1190 1190
diff --git a/arch/mips/oprofile/common.c b/arch/mips/oprofile/common.c
index dd2cc42f1b6d..53f9889b30ed 100644
--- a/arch/mips/oprofile/common.c
+++ b/arch/mips/oprofile/common.c
@@ -75,7 +75,10 @@ int __init oprofile_arch_init(struct oprofile_operations *ops)
75 int res; 75 int res;
76 76
77 switch (current_cpu_data.cputype) { 77 switch (current_cpu_data.cputype) {
78 case CPU_5KC:
79 case CPU_20KC:
78 case CPU_24K: 80 case CPU_24K:
81 case CPU_25KF:
79 lmodel = &op_model_mipsxx; 82 lmodel = &op_model_mipsxx;
80 break; 83 break;
81 84
diff --git a/arch/mips/oprofile/op_impl.h b/arch/mips/oprofile/op_impl.h
index f0121557047d..5cfce7d87a4d 100644
--- a/arch/mips/oprofile/op_impl.h
+++ b/arch/mips/oprofile/op_impl.h
@@ -12,8 +12,8 @@
12 12
13struct pt_regs; 13struct pt_regs;
14 14
15extern void null_perf_irq(struct pt_regs *regs); 15extern int null_perf_irq(struct pt_regs *regs);
16extern void (*perf_irq)(struct pt_regs *regs); 16extern int (*perf_irq)(struct pt_regs *regs);
17 17
18/* Per-counter configuration as set via oprofilefs. */ 18/* Per-counter configuration as set via oprofilefs. */
19struct op_counter_config { 19struct op_counter_config {
diff --git a/arch/mips/oprofile/op_model_mipsxx.c b/arch/mips/oprofile/op_model_mipsxx.c
index d36b64dfcb2f..1d1eee407faf 100644
--- a/arch/mips/oprofile/op_model_mipsxx.c
+++ b/arch/mips/oprofile/op_model_mipsxx.c
@@ -114,11 +114,12 @@ static void mipsxx_cpu_stop(void *args)
114 } 114 }
115} 115}
116 116
117static void mipsxx_perfcount_handler(struct pt_regs *regs) 117static int mipsxx_perfcount_handler(struct pt_regs *regs)
118{ 118{
119 unsigned int counters = op_model_mipsxx.num_counters; 119 unsigned int counters = op_model_mipsxx.num_counters;
120 unsigned int control; 120 unsigned int control;
121 unsigned int counter; 121 unsigned int counter;
122 int handled = 0;
122 123
123 switch (counters) { 124 switch (counters) {
124#define HANDLE_COUNTER(n) \ 125#define HANDLE_COUNTER(n) \
@@ -129,12 +130,15 @@ static void mipsxx_perfcount_handler(struct pt_regs *regs)
129 (counter & M_COUNTER_OVERFLOW)) { \ 130 (counter & M_COUNTER_OVERFLOW)) { \
130 oprofile_add_sample(regs, n); \ 131 oprofile_add_sample(regs, n); \
131 write_c0_perfcntr ## n(reg.counter[n]); \ 132 write_c0_perfcntr ## n(reg.counter[n]); \
133 handled = 1; \
132 } 134 }
133 HANDLE_COUNTER(3) 135 HANDLE_COUNTER(3)
134 HANDLE_COUNTER(2) 136 HANDLE_COUNTER(2)
135 HANDLE_COUNTER(1) 137 HANDLE_COUNTER(1)
136 HANDLE_COUNTER(0) 138 HANDLE_COUNTER(0)
137 } 139 }
140
141 return handled;
138} 142}
139 143
140#define M_CONFIG1_PC (1 << 4) 144#define M_CONFIG1_PC (1 << 4)
@@ -176,17 +180,31 @@ static int __init mipsxx_init(void)
176 int counters; 180 int counters;
177 181
178 counters = n_counters(); 182 counters = n_counters();
179 if (counters == 0) 183 if (counters == 0) {
184 printk(KERN_ERR "Oprofile: CPU has no performance counters\n");
180 return -ENODEV; 185 return -ENODEV;
186 }
181 187
182 reset_counters(counters); 188 reset_counters(counters);
183 189
184 op_model_mipsxx.num_counters = counters; 190 op_model_mipsxx.num_counters = counters;
185 switch (current_cpu_data.cputype) { 191 switch (current_cpu_data.cputype) {
192 case CPU_20KC:
193 op_model_mipsxx.cpu_type = "mips/20K";
194 break;
195
186 case CPU_24K: 196 case CPU_24K:
187 op_model_mipsxx.cpu_type = "mips/24K"; 197 op_model_mipsxx.cpu_type = "mips/24K";
188 break; 198 break;
189 199
200 case CPU_25KF:
201 op_model_mipsxx.cpu_type = "mips/25K";
202 break;
203
204 case CPU_5KC:
205 op_model_mipsxx.cpu_type = "mips/5K";
206 break;
207
190 default: 208 default:
191 printk(KERN_ERR "Profiling unsupported for this CPU\n"); 209 printk(KERN_ERR "Profiling unsupported for this CPU\n");
192 210
diff --git a/arch/mips/pci/fixup-capcella.c b/arch/mips/pci/fixup-capcella.c
index f2fc82c1c7c5..1e530751936c 100644
--- a/arch/mips/pci/fixup-capcella.c
+++ b/arch/mips/pci/fixup-capcella.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * fixup-cappcela.c, The ZAO Networks Capcella specific PCI fixups. 2 * fixup-cappcela.c, The ZAO Networks Capcella specific PCI fixups.
3 * 3 *
4 * Copyright (C) 2002,2004 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> 4 * Copyright (C) 2002,2004 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by 7 * it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/pci/fixup-mpc30x.c b/arch/mips/pci/fixup-mpc30x.c
index 4975846da75a..b67ddaa47122 100644
--- a/arch/mips/pci/fixup-mpc30x.c
+++ b/arch/mips/pci/fixup-mpc30x.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * fixup-mpc30x.c, The Victor MP-C303/304 specific PCI fixups. 2 * fixup-mpc30x.c, The Victor MP-C303/304 specific PCI fixups.
3 * 3 *
4 * Copyright (C) 2002,2004 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> 4 * Copyright (C) 2002,2004 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by 7 * it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/pci/fixup-tb0219.c b/arch/mips/pci/fixup-tb0219.c
index bc55b06e1904..734f2b71e164 100644
--- a/arch/mips/pci/fixup-tb0219.c
+++ b/arch/mips/pci/fixup-tb0219.c
@@ -2,7 +2,7 @@
2 * fixup-tb0219.c, The TANBAC TB0219 specific PCI fixups. 2 * fixup-tb0219.c, The TANBAC TB0219 specific PCI fixups.
3 * 3 *
4 * Copyright (C) 2003 Megasolution Inc. <matsu@megasolution.jp> 4 * Copyright (C) 2003 Megasolution Inc. <matsu@megasolution.jp>
5 * Copyright (C) 2004 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> 5 * Copyright (C) 2004 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
6 * 6 *
7 * This program is free software; you can redistribute it and/or modify 7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by 8 * it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/pci/fixup-tb0226.c b/arch/mips/pci/fixup-tb0226.c
index b5d42b12de10..c9e7cb4361a1 100644
--- a/arch/mips/pci/fixup-tb0226.c
+++ b/arch/mips/pci/fixup-tb0226.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * fixup-tb0226.c, The TANBAC TB0226 specific PCI fixups. 2 * fixup-tb0226.c, The TANBAC TB0226 specific PCI fixups.
3 * 3 *
4 * Copyright (C) 2002-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> 4 * Copyright (C) 2002-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by 7 * it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/pci/fixup-tb0287.c b/arch/mips/pci/fixup-tb0287.c
index 8436d7f1fdb2..fbe6bcb28199 100644
--- a/arch/mips/pci/fixup-tb0287.c
+++ b/arch/mips/pci/fixup-tb0287.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * fixup-tb0287.c, The TANBAC TB0287 specific PCI fixups. 2 * fixup-tb0287.c, The TANBAC TB0287 specific PCI fixups.
3 * 3 *
4 * Copyright (C) 2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> 4 * Copyright (C) 2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by 7 * it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/pci/ops-vr41xx.c b/arch/mips/pci/ops-vr41xx.c
index 430429b22ae1..900c6b32576c 100644
--- a/arch/mips/pci/ops-vr41xx.c
+++ b/arch/mips/pci/ops-vr41xx.c
@@ -3,7 +3,7 @@
3 * 3 *
4 * Copyright (C) 2001-2003 MontaVista Software Inc. 4 * Copyright (C) 2001-2003 MontaVista Software Inc.
5 * Author: Yoichi Yuasa <yyuasa@mvista.com or source@mvista.com> 5 * Author: Yoichi Yuasa <yyuasa@mvista.com or source@mvista.com>
6 * Copyright (C) 2004-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> 6 * Copyright (C) 2004-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
7 * 7 *
8 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by 9 * it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/pci/pci-vr41xx.c b/arch/mips/pci/pci-vr41xx.c
index 91df4da7ddb9..9885fa403603 100644
--- a/arch/mips/pci/pci-vr41xx.c
+++ b/arch/mips/pci/pci-vr41xx.c
@@ -3,7 +3,7 @@
3 * 3 *
4 * Copyright (C) 2001-2003 MontaVista Software Inc. 4 * Copyright (C) 2001-2003 MontaVista Software Inc.
5 * Author: Yoichi Yuasa <yyuasa@mvista.com or source@mvista.com> 5 * Author: Yoichi Yuasa <yyuasa@mvista.com or source@mvista.com>
6 * Copyright (C) 2004-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> 6 * Copyright (C) 2004-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
7 * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org) 7 * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
8 * 8 *
9 * This program is free software; you can redistribute it and/or modify 9 * This program is free software; you can redistribute it and/or modify
diff --git a/arch/mips/pci/pci-vr41xx.h b/arch/mips/pci/pci-vr41xx.h
index e087ec55641d..8a35e32b8376 100644
--- a/arch/mips/pci/pci-vr41xx.h
+++ b/arch/mips/pci/pci-vr41xx.h
@@ -3,7 +3,7 @@
3 * 3 *
4 * Copyright (C) 2002 MontaVista Software Inc. 4 * Copyright (C) 2002 MontaVista Software Inc.
5 * Author: Yoichi Yuasa <yyuasa@mvista.com or source@mvista.com> 5 * Author: Yoichi Yuasa <yyuasa@mvista.com or source@mvista.com>
6 * Copyright (C) 2004-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> 6 * Copyright (C) 2004-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
7 * 7 *
8 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by 9 * it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/vr41xx/casio-e55/setup.c b/arch/mips/vr41xx/casio-e55/setup.c
index d29201acc4f3..814900915c28 100644
--- a/arch/mips/vr41xx/casio-e55/setup.c
+++ b/arch/mips/vr41xx/casio-e55/setup.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * setup.c, Setup for the CASIO CASSIOPEIA E-11/15/55/65. 2 * setup.c, Setup for the CASIO CASSIOPEIA E-11/15/55/65.
3 * 3 *
4 * Copyright (C) 2002-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> 4 * Copyright (C) 2002-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by 7 * it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/vr41xx/common/bcu.c b/arch/mips/vr41xx/common/bcu.c
index cdfa4273a1c5..de0c1b35f11c 100644
--- a/arch/mips/vr41xx/common/bcu.c
+++ b/arch/mips/vr41xx/common/bcu.c
@@ -3,7 +3,7 @@
3 * 3 *
4 * Copyright (C) 2002 MontaVista Software Inc. 4 * Copyright (C) 2002 MontaVista Software Inc.
5 * Author: Yoichi Yuasa <yyuasa@mvista.com, or source@mvista.com> 5 * Author: Yoichi Yuasa <yyuasa@mvista.com, or source@mvista.com>
6 * Copyright (C) 2003-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> 6 * Copyright (C) 2003-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
7 * 7 *
8 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by 9 * it under the terms of the GNU General Public License as published by
@@ -25,7 +25,7 @@
25 * - New creation, NEC VR4122 and VR4131 are supported. 25 * - New creation, NEC VR4122 and VR4131 are supported.
26 * - Added support for NEC VR4111 and VR4121. 26 * - Added support for NEC VR4111 and VR4121.
27 * 27 *
28 * Yoichi Yuasa <yuasa@hh.iij4u.or.jp> 28 * Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
29 * - Added support for NEC VR4133. 29 * - Added support for NEC VR4133.
30 */ 30 */
31#include <linux/kernel.h> 31#include <linux/kernel.h>
diff --git a/arch/mips/vr41xx/common/cmu.c b/arch/mips/vr41xx/common/cmu.c
index d758e432961b..657c5133c933 100644
--- a/arch/mips/vr41xx/common/cmu.c
+++ b/arch/mips/vr41xx/common/cmu.c
@@ -3,7 +3,7 @@
3 * 3 *
4 * Copyright (C) 2001-2002 MontaVista Software Inc. 4 * Copyright (C) 2001-2002 MontaVista Software Inc.
5 * Author: Yoichi Yuasa <yyuasa@mvista.com or source@mvista.com> 5 * Author: Yoichi Yuasa <yyuasa@mvista.com or source@mvista.com>
6 * Copuright (C) 2003-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> 6 * Copuright (C) 2003-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
7 * 7 *
8 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by 9 * it under the terms of the GNU General Public License as published by
@@ -25,7 +25,7 @@
25 * - New creation, NEC VR4122 and VR4131 are supported. 25 * - New creation, NEC VR4122 and VR4131 are supported.
26 * - Added support for NEC VR4111 and VR4121. 26 * - Added support for NEC VR4111 and VR4121.
27 * 27 *
28 * Yoichi Yuasa <yuasa@hh.iij4u.or.jp> 28 * Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
29 * - Added support for NEC VR4133. 29 * - Added support for NEC VR4133.
30 */ 30 */
31#include <linux/init.h> 31#include <linux/init.h>
diff --git a/arch/mips/vr41xx/common/icu.c b/arch/mips/vr41xx/common/icu.c
index 0b73c5ab3c0c..07ae19cf0c29 100644
--- a/arch/mips/vr41xx/common/icu.c
+++ b/arch/mips/vr41xx/common/icu.c
@@ -3,7 +3,7 @@
3 * 3 *
4 * Copyright (C) 2001-2002 MontaVista Software Inc. 4 * Copyright (C) 2001-2002 MontaVista Software Inc.
5 * Author: Yoichi Yuasa <yyuasa@mvista.com or source@mvista.com> 5 * Author: Yoichi Yuasa <yyuasa@mvista.com or source@mvista.com>
6 * Copyright (C) 2003-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> 6 * Copyright (C) 2003-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
7 * 7 *
8 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by 9 * it under the terms of the GNU General Public License as published by
@@ -25,7 +25,7 @@
25 * - New creation, NEC VR4122 and VR4131 are supported. 25 * - New creation, NEC VR4122 and VR4131 are supported.
26 * - Added support for NEC VR4111 and VR4121. 26 * - Added support for NEC VR4111 and VR4121.
27 * 27 *
28 * Yoichi Yuasa <yuasa@hh.iij4u.or.jp> 28 * Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
29 * - Coped with INTASSIGN of NEC VR4133. 29 * - Coped with INTASSIGN of NEC VR4133.
30 */ 30 */
31#include <linux/errno.h> 31#include <linux/errno.h>
diff --git a/arch/mips/vr41xx/common/init.c b/arch/mips/vr41xx/common/init.c
index 578f6496ffd4..707bd0933eed 100644
--- a/arch/mips/vr41xx/common/init.c
+++ b/arch/mips/vr41xx/common/init.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * init.c, Common initialization routines for NEC VR4100 series. 2 * init.c, Common initialization routines for NEC VR4100 series.
3 * 3 *
4 * Copyright (C) 2003-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> 4 * Copyright (C) 2003-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by 7 * it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/vr41xx/common/int-handler.S b/arch/mips/vr41xx/common/int-handler.S
index 272c13aee4fd..2b6043f16d09 100644
--- a/arch/mips/vr41xx/common/int-handler.S
+++ b/arch/mips/vr41xx/common/int-handler.S
@@ -35,7 +35,7 @@
35 * MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com> 35 * MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com>
36 * - New creation, NEC VR4100 series are supported. 36 * - New creation, NEC VR4100 series are supported.
37 * 37 *
38 * Yoichi Yuasa <yuasa@hh.iij4u.or.jp> 38 * Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
39 * - Coped with INTASSIGN of NEC VR4133. 39 * - Coped with INTASSIGN of NEC VR4133.
40 */ 40 */
41#include <asm/asm.h> 41#include <asm/asm.h>
diff --git a/arch/mips/vr41xx/common/irq.c b/arch/mips/vr41xx/common/irq.c
index 43b214d39438..61aa264275ff 100644
--- a/arch/mips/vr41xx/common/irq.c
+++ b/arch/mips/vr41xx/common/irq.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * Interrupt handing routines for NEC VR4100 series. 2 * Interrupt handing routines for NEC VR4100 series.
3 * 3 *
4 * Copyright (C) 2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> 4 * Copyright (C) 2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by 7 * it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/vr41xx/common/pmu.c b/arch/mips/vr41xx/common/pmu.c
index 53166f3598b2..02bf4f7d06ba 100644
--- a/arch/mips/vr41xx/common/pmu.c
+++ b/arch/mips/vr41xx/common/pmu.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * pmu.c, Power Management Unit routines for NEC VR4100 series. 2 * pmu.c, Power Management Unit routines for NEC VR4100 series.
3 * 3 *
4 * Copyright (C) 2003-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> 4 * Copyright (C) 2003-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by 7 * it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/vr41xx/common/type.c b/arch/mips/vr41xx/common/type.c
index bcb5f71b5026..e0c1ac5e988e 100644
--- a/arch/mips/vr41xx/common/type.c
+++ b/arch/mips/vr41xx/common/type.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * type.c, System type for NEC VR4100 series. 2 * type.c, System type for NEC VR4100 series.
3 * 3 *
4 * Copyright (C) 2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> 4 * Copyright (C) 2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by 7 * it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/vr41xx/common/vrc4173.c b/arch/mips/vr41xx/common/vrc4173.c
index cc52e75e14e7..3e31f8193d21 100644
--- a/arch/mips/vr41xx/common/vrc4173.c
+++ b/arch/mips/vr41xx/common/vrc4173.c
@@ -3,7 +3,7 @@
3 * 3 *
4 * Copyright (C) 2001-2003 MontaVista Software Inc. 4 * Copyright (C) 2001-2003 MontaVista Software Inc.
5 * Author: Yoichi Yuasa <yyuasa@mvista.com, or source@mvista.com> 5 * Author: Yoichi Yuasa <yyuasa@mvista.com, or source@mvista.com>
6 * Copyright (C) 2004 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> 6 * Copyright (C) 2004 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
7 * Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org) 7 * Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org)
8 * 8 *
9 * This program is free software; you can redistribute it and/or modify 9 * This program is free software; you can redistribute it and/or modify
diff --git a/arch/mips/vr41xx/ibm-workpad/setup.c b/arch/mips/vr41xx/ibm-workpad/setup.c
index e4b34ad6ea61..50fe8af4c52c 100644
--- a/arch/mips/vr41xx/ibm-workpad/setup.c
+++ b/arch/mips/vr41xx/ibm-workpad/setup.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * setup.c, Setup for the IBM WorkPad z50. 2 * setup.c, Setup for the IBM WorkPad z50.
3 * 3 *
4 * Copyright (C) 2002-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> 4 * Copyright (C) 2002-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by 7 * it under the terms of the GNU General Public License as published by
diff --git a/drivers/char/tb0219.c b/drivers/char/tb0219.c
index b3d411a756fe..ac2a297ce37c 100644
--- a/drivers/char/tb0219.c
+++ b/drivers/char/tb0219.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * Driver for TANBAC TB0219 base board. 2 * Driver for TANBAC TB0219 base board.
3 * 3 *
4 * Copyright (C) 2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> 4 * Copyright (C) 2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by 7 * it under the terms of the GNU General Public License as published by
@@ -27,7 +27,7 @@
27#include <asm/vr41xx/giu.h> 27#include <asm/vr41xx/giu.h>
28#include <asm/vr41xx/tb0219.h> 28#include <asm/vr41xx/tb0219.h>
29 29
30MODULE_AUTHOR("Yoichi Yuasa <yuasa@hh.iij4u.or.jp>"); 30MODULE_AUTHOR("Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>");
31MODULE_DESCRIPTION("TANBAC TB0219 base board driver"); 31MODULE_DESCRIPTION("TANBAC TB0219 base board driver");
32MODULE_LICENSE("GPL"); 32MODULE_LICENSE("GPL");
33 33
diff --git a/drivers/char/vr41xx_giu.c b/drivers/char/vr41xx_giu.c
index a5b18e086a94..2267c7b81799 100644
--- a/drivers/char/vr41xx_giu.c
+++ b/drivers/char/vr41xx_giu.c
@@ -3,7 +3,7 @@
3 * 3 *
4 * Copyright (C) 2002 MontaVista Software Inc. 4 * Copyright (C) 2002 MontaVista Software Inc.
5 * Author: Yoichi Yuasa <yyuasa@mvista.com or source@mvista.com> 5 * Author: Yoichi Yuasa <yyuasa@mvista.com or source@mvista.com>
6 * Copyright (C) 2003-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> 6 * Copyright (C) 2003-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
7 * 7 *
8 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by 9 * it under the terms of the GNU General Public License as published by
@@ -35,7 +35,7 @@
35#include <asm/vr41xx/giu.h> 35#include <asm/vr41xx/giu.h>
36#include <asm/vr41xx/vr41xx.h> 36#include <asm/vr41xx/vr41xx.h>
37 37
38MODULE_AUTHOR("Yoichi Yuasa <yuasa@hh.iij4u.or.jp>"); 38MODULE_AUTHOR("Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>");
39MODULE_DESCRIPTION("NEC VR4100 series General-purpose I/O Unit driver"); 39MODULE_DESCRIPTION("NEC VR4100 series General-purpose I/O Unit driver");
40MODULE_LICENSE("GPL"); 40MODULE_LICENSE("GPL");
41 41
diff --git a/drivers/char/vr41xx_rtc.c b/drivers/char/vr41xx_rtc.c
index 159acd8b7788..bc1b4a15212c 100644
--- a/drivers/char/vr41xx_rtc.c
+++ b/drivers/char/vr41xx_rtc.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * Driver for NEC VR4100 series Real Time Clock unit. 2 * Driver for NEC VR4100 series Real Time Clock unit.
3 * 3 *
4 * Copyright (C) 2003-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> 4 * Copyright (C) 2003-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by 7 * it under the terms of the GNU General Public License as published by
@@ -37,7 +37,7 @@
37#include <asm/uaccess.h> 37#include <asm/uaccess.h>
38#include <asm/vr41xx/vr41xx.h> 38#include <asm/vr41xx/vr41xx.h>
39 39
40MODULE_AUTHOR("Yoichi Yuasa <yuasa@hh.iij4u.or.jp>"); 40MODULE_AUTHOR("Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>");
41MODULE_DESCRIPTION("NEC VR4100 series RTC driver"); 41MODULE_DESCRIPTION("NEC VR4100 series RTC driver");
42MODULE_LICENSE("GPL"); 42MODULE_LICENSE("GPL");
43 43
diff --git a/drivers/pcmcia/vrc4171_card.c b/drivers/pcmcia/vrc4171_card.c
index 24c547ef512b..0574efd7828a 100644
--- a/drivers/pcmcia/vrc4171_card.c
+++ b/drivers/pcmcia/vrc4171_card.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * vrc4171_card.c, NEC VRC4171 Card Controller driver for Socket Services. 2 * vrc4171_card.c, NEC VRC4171 Card Controller driver for Socket Services.
3 * 3 *
4 * Copyright (C) 2003-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> 4 * Copyright (C) 2003-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by 7 * it under the terms of the GNU General Public License as published by
@@ -33,7 +33,7 @@
33#include "i82365.h" 33#include "i82365.h"
34 34
35MODULE_DESCRIPTION("NEC VRC4171 Card Controllers driver for Socket Services"); 35MODULE_DESCRIPTION("NEC VRC4171 Card Controllers driver for Socket Services");
36MODULE_AUTHOR("Yoichi Yuasa <yuasa@hh.iij4u.or.jp>"); 36MODULE_AUTHOR("Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>");
37MODULE_LICENSE("GPL"); 37MODULE_LICENSE("GPL");
38 38
39#define CARD_MAX_SLOTS 2 39#define CARD_MAX_SLOTS 2
diff --git a/drivers/pcmcia/vrc4173_cardu.c b/drivers/pcmcia/vrc4173_cardu.c
index b502db2790e0..57f38dba0a48 100644
--- a/drivers/pcmcia/vrc4173_cardu.c
+++ b/drivers/pcmcia/vrc4173_cardu.c
@@ -6,7 +6,7 @@
6 * NEC VRC4173 CARDU driver for Socket Services 6 * NEC VRC4173 CARDU driver for Socket Services
7 * (This device doesn't support CardBus. it is supporting only 16bit PC Card.) 7 * (This device doesn't support CardBus. it is supporting only 16bit PC Card.)
8 * 8 *
9 * Copyright 2002,2003 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> 9 * Copyright 2002,2003 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
10 * 10 *
11 * This program is free software; you can redistribute it and/or modify it 11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the 12 * under the terms of the GNU General Public License as published by the
@@ -41,7 +41,7 @@
41#include "vrc4173_cardu.h" 41#include "vrc4173_cardu.h"
42 42
43MODULE_DESCRIPTION("NEC VRC4173 CARDU driver for Socket Services"); 43MODULE_DESCRIPTION("NEC VRC4173 CARDU driver for Socket Services");
44MODULE_AUTHOR("Yoichi Yuasa <yuasa@hh.iij4u.or.jp>"); 44MODULE_AUTHOR("Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>");
45MODULE_LICENSE("GPL"); 45MODULE_LICENSE("GPL");
46 46
47static int vrc4173_cardu_slots; 47static int vrc4173_cardu_slots;
diff --git a/drivers/pcmcia/vrc4173_cardu.h b/drivers/pcmcia/vrc4173_cardu.h
index 113726f7cf92..7d77c74120c1 100644
--- a/drivers/pcmcia/vrc4173_cardu.h
+++ b/drivers/pcmcia/vrc4173_cardu.h
@@ -5,7 +5,7 @@
5 * BRIEF MODULE DESCRIPTION 5 * BRIEF MODULE DESCRIPTION
6 * Include file for NEC VRC4173 CARDU. 6 * Include file for NEC VRC4173 CARDU.
7 * 7 *
8 * Copyright 2002 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> 8 * Copyright 2002 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
9 * 9 *
10 * This program is free software; you can redistribute it and/or modify it 10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the 11 * under the terms of the GNU General Public License as published by the
diff --git a/drivers/serial/vr41xx_siu.c b/drivers/serial/vr41xx_siu.c
index 0a28deeb098d..d61494d185cd 100644
--- a/drivers/serial/vr41xx_siu.c
+++ b/drivers/serial/vr41xx_siu.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * Driver for NEC VR4100 series Serial Interface Unit. 2 * Driver for NEC VR4100 series Serial Interface Unit.
3 * 3 *
4 * Copyright (C) 2004-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> 4 * Copyright (C) 2004-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
5 * 5 *
6 * Based on drivers/serial/8250.c, by Russell King. 6 * Based on drivers/serial/8250.c, by Russell King.
7 * 7 *
diff --git a/include/asm-mips/atomic.h b/include/asm-mips/atomic.h
index 94a95872d727..654b97d3e13a 100644
--- a/include/asm-mips/atomic.h
+++ b/include/asm-mips/atomic.h
@@ -24,10 +24,9 @@
24#define _ASM_ATOMIC_H 24#define _ASM_ATOMIC_H
25 25
26#include <asm/cpu-features.h> 26#include <asm/cpu-features.h>
27#include <asm/interrupt.h>
27#include <asm/war.h> 28#include <asm/war.h>
28 29
29extern spinlock_t atomic_lock;
30
31typedef struct { volatile int counter; } atomic_t; 30typedef struct { volatile int counter; } atomic_t;
32 31
33#define ATOMIC_INIT(i) { (i) } 32#define ATOMIC_INIT(i) { (i) }
@@ -85,9 +84,9 @@ static __inline__ void atomic_add(int i, atomic_t * v)
85 } else { 84 } else {
86 unsigned long flags; 85 unsigned long flags;
87 86
88 spin_lock_irqsave(&atomic_lock, flags); 87 local_irq_save(flags);
89 v->counter += i; 88 v->counter += i;
90 spin_unlock_irqrestore(&atomic_lock, flags); 89 local_irq_restore(flags);
91 } 90 }
92} 91}
93 92
@@ -127,9 +126,9 @@ static __inline__ void atomic_sub(int i, atomic_t * v)
127 } else { 126 } else {
128 unsigned long flags; 127 unsigned long flags;
129 128
130 spin_lock_irqsave(&atomic_lock, flags); 129 local_irq_save(flags);
131 v->counter -= i; 130 v->counter -= i;
132 spin_unlock_irqrestore(&atomic_lock, flags); 131 local_irq_restore(flags);
133 } 132 }
134} 133}
135 134
@@ -173,11 +172,11 @@ static __inline__ int atomic_add_return(int i, atomic_t * v)
173 } else { 172 } else {
174 unsigned long flags; 173 unsigned long flags;
175 174
176 spin_lock_irqsave(&atomic_lock, flags); 175 local_irq_save(flags);
177 result = v->counter; 176 result = v->counter;
178 result += i; 177 result += i;
179 v->counter = result; 178 v->counter = result;
180 spin_unlock_irqrestore(&atomic_lock, flags); 179 local_irq_restore(flags);
181 } 180 }
182 181
183 return result; 182 return result;
@@ -220,11 +219,11 @@ static __inline__ int atomic_sub_return(int i, atomic_t * v)
220 } else { 219 } else {
221 unsigned long flags; 220 unsigned long flags;
222 221
223 spin_lock_irqsave(&atomic_lock, flags); 222 local_irq_save(flags);
224 result = v->counter; 223 result = v->counter;
225 result -= i; 224 result -= i;
226 v->counter = result; 225 v->counter = result;
227 spin_unlock_irqrestore(&atomic_lock, flags); 226 local_irq_restore(flags);
228 } 227 }
229 228
230 return result; 229 return result;
@@ -277,12 +276,12 @@ static __inline__ int atomic_sub_if_positive(int i, atomic_t * v)
277 } else { 276 } else {
278 unsigned long flags; 277 unsigned long flags;
279 278
280 spin_lock_irqsave(&atomic_lock, flags); 279 local_irq_save(flags);
281 result = v->counter; 280 result = v->counter;
282 result -= i; 281 result -= i;
283 if (result >= 0) 282 if (result >= 0)
284 v->counter = result; 283 v->counter = result;
285 spin_unlock_irqrestore(&atomic_lock, flags); 284 local_irq_restore(flags);
286 } 285 }
287 286
288 return result; 287 return result;
@@ -433,9 +432,9 @@ static __inline__ void atomic64_add(long i, atomic64_t * v)
433 } else { 432 } else {
434 unsigned long flags; 433 unsigned long flags;
435 434
436 spin_lock_irqsave(&atomic_lock, flags); 435 local_irq_save(flags);
437 v->counter += i; 436 v->counter += i;
438 spin_unlock_irqrestore(&atomic_lock, flags); 437 local_irq_restore(flags);
439 } 438 }
440} 439}
441 440
@@ -475,9 +474,9 @@ static __inline__ void atomic64_sub(long i, atomic64_t * v)
475 } else { 474 } else {
476 unsigned long flags; 475 unsigned long flags;
477 476
478 spin_lock_irqsave(&atomic_lock, flags); 477 local_irq_save(flags);
479 v->counter -= i; 478 v->counter -= i;
480 spin_unlock_irqrestore(&atomic_lock, flags); 479 local_irq_restore(flags);
481 } 480 }
482} 481}
483 482
@@ -521,11 +520,11 @@ static __inline__ long atomic64_add_return(long i, atomic64_t * v)
521 } else { 520 } else {
522 unsigned long flags; 521 unsigned long flags;
523 522
524 spin_lock_irqsave(&atomic_lock, flags); 523 local_irq_save(flags);
525 result = v->counter; 524 result = v->counter;
526 result += i; 525 result += i;
527 v->counter = result; 526 v->counter = result;
528 spin_unlock_irqrestore(&atomic_lock, flags); 527 local_irq_restore(flags);
529 } 528 }
530 529
531 return result; 530 return result;
@@ -568,11 +567,11 @@ static __inline__ long atomic64_sub_return(long i, atomic64_t * v)
568 } else { 567 } else {
569 unsigned long flags; 568 unsigned long flags;
570 569
571 spin_lock_irqsave(&atomic_lock, flags); 570 local_irq_save(flags);
572 result = v->counter; 571 result = v->counter;
573 result -= i; 572 result -= i;
574 v->counter = result; 573 v->counter = result;
575 spin_unlock_irqrestore(&atomic_lock, flags); 574 local_irq_restore(flags);
576 } 575 }
577 576
578 return result; 577 return result;
@@ -625,12 +624,12 @@ static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v)
625 } else { 624 } else {
626 unsigned long flags; 625 unsigned long flags;
627 626
628 spin_lock_irqsave(&atomic_lock, flags); 627 local_irq_save(flags);
629 result = v->counter; 628 result = v->counter;
630 result -= i; 629 result -= i;
631 if (result >= 0) 630 if (result >= 0)
632 v->counter = result; 631 v->counter = result;
633 spin_unlock_irqrestore(&atomic_lock, flags); 632 local_irq_restore(flags);
634 } 633 }
635 634
636 return result; 635 return result;
diff --git a/include/asm-mips/cpu-features.h b/include/asm-mips/cpu-features.h
index 03627cfb3e45..78c9cc2735d5 100644
--- a/include/asm-mips/cpu-features.h
+++ b/include/asm-mips/cpu-features.h
@@ -116,6 +116,27 @@
116#endif 116#endif
117#endif 117#endif
118 118
119# ifndef cpu_has_mips32r1
120# define cpu_has_mips32r1 (cpu_data[0].isa_level & MIPS_CPU_ISA_M32R1)
121# endif
122# ifndef cpu_has_mips32r2
123# define cpu_has_mips32r2 (cpu_data[0].isa_level & MIPS_CPU_ISA_M32R2)
124# endif
125# ifndef cpu_has_mips64r1
126# define cpu_has_mips64r1 (cpu_data[0].isa_level & MIPS_CPU_ISA_M64R1)
127# endif
128# ifndef cpu_has_mips64r2
129# define cpu_has_mips64r2 (cpu_data[0].isa_level & MIPS_CPU_ISA_M64R2)
130# endif
131
132/*
133 * Shortcuts ...
134 */
135#define cpu_has_mips32 (cpu_has_mips32r1 | cpu_has_mips32r2)
136#define cpu_has_mips64 (cpu_has_mips64r1 | cpu_has_mips64r2)
137#define cpu_has_mips_r1 (cpu_has_mips32r1 | cpu_has_mips64r1)
138#define cpu_has_mips_r2 (cpu_has_mips32r2 | cpu_has_mips64r2)
139
119#ifndef cpu_has_dsp 140#ifndef cpu_has_dsp
120#define cpu_has_dsp (cpu_data[0].ases & MIPS_ASE_DSP) 141#define cpu_has_dsp (cpu_data[0].ases & MIPS_ASE_DSP)
121#endif 142#endif
diff --git a/include/asm-mips/cpu.h b/include/asm-mips/cpu.h
index 48eac296060f..934e063e79f1 100644
--- a/include/asm-mips/cpu.h
+++ b/include/asm-mips/cpu.h
@@ -204,16 +204,18 @@
204 */ 204 */
205#define MIPS_CPU_ISA_I 0x00000001 205#define MIPS_CPU_ISA_I 0x00000001
206#define MIPS_CPU_ISA_II 0x00000002 206#define MIPS_CPU_ISA_II 0x00000002
207#define MIPS_CPU_ISA_III 0x00008003 207#define MIPS_CPU_ISA_III 0x00000003
208#define MIPS_CPU_ISA_IV 0x00008004 208#define MIPS_CPU_ISA_IV 0x00000004
209#define MIPS_CPU_ISA_V 0x00008005 209#define MIPS_CPU_ISA_V 0x00000005
210#define MIPS_CPU_ISA_M32 0x00000020 210#define MIPS_CPU_ISA_M32R1 0x00000020
211#define MIPS_CPU_ISA_M64 0x00008040 211#define MIPS_CPU_ISA_M32R2 0x00000040
212#define MIPS_CPU_ISA_M64R1 0x00000080
213#define MIPS_CPU_ISA_M64R2 0x00000100
212 214
213/* 215#define MIPS_CPU_ISA_32BIT (MIPS_CPU_ISA_I | MIPS_CPU_ISA_II | \
214 * Bit 15 encodes if an ISA level supports 64-bit operations. 216 MIPS_CPU_ISA_M32R1 | MIPS_CPU_ISA_M32R2 )
215 */ 217#define MIPS_CPU_ISA_64BIT (MIPS_CPU_ISA_III | MIPS_CPU_ISA_IV | \
216#define MIPS_CPU_ISA_64BIT 0x00008000 218 MIPS_CPU_ISA_V | MIPS_CPU_ISA_M64R1 | MIPS_CPU_ISA_M64R2)
217 219
218/* 220/*
219 * CPU Option encodings 221 * CPU Option encodings
diff --git a/include/asm-mips/delay.h b/include/asm-mips/delay.h
index 48d00cccdafa..64dd45150f64 100644
--- a/include/asm-mips/delay.h
+++ b/include/asm-mips/delay.h
@@ -52,13 +52,11 @@ static inline void __udelay(unsigned long usecs, unsigned long lpj)
52 unsigned long lo; 52 unsigned long lo;
53 53
54 /* 54 /*
55 * The common rates of 1000 and 128 are rounded wrongly by the 55 * The rates of 128 is rounded wrongly by the catchall case
56 * catchall case for 64-bit. Excessive precission? Probably ... 56 * for 64-bit. Excessive precission? Probably ...
57 */ 57 */
58#if defined(CONFIG_64BIT) && (HZ == 128) 58#if defined(CONFIG_64BIT) && (HZ == 128)
59 usecs *= 0x0008637bd05af6c7UL; /* 2**64 / (1000000 / HZ) */ 59 usecs *= 0x0008637bd05af6c7UL; /* 2**64 / (1000000 / HZ) */
60#elif defined(CONFIG_64BIT) && (HZ == 1000)
61 usecs *= 0x004189374BC6A7f0UL; /* 2**64 / (1000000 / HZ) */
62#elif defined(CONFIG_64BIT) 60#elif defined(CONFIG_64BIT)
63 usecs *= (0x8000000000000000UL / (500000 / HZ)); 61 usecs *= (0x8000000000000000UL / (500000 / HZ));
64#else /* 32-bit junk follows here */ 62#else /* 32-bit junk follows here */
diff --git a/include/asm-mips/dsp.h b/include/asm-mips/dsp.h
index 50f556bb4978..e9bfc0813c72 100644
--- a/include/asm-mips/dsp.h
+++ b/include/asm-mips/dsp.h
@@ -16,7 +16,7 @@
16#include <asm/mipsregs.h> 16#include <asm/mipsregs.h>
17 17
18#define DSP_DEFAULT 0x00000000 18#define DSP_DEFAULT 0x00000000
19#define DSP_MASK 0x1f 19#define DSP_MASK 0x3ff
20 20
21#define __enable_dsp_hazard() \ 21#define __enable_dsp_hazard() \
22do { \ 22do { \
@@ -48,6 +48,7 @@ do { \
48 tsk->thread.dsp.dspr[3] = mflo2(); \ 48 tsk->thread.dsp.dspr[3] = mflo2(); \
49 tsk->thread.dsp.dspr[4] = mfhi3(); \ 49 tsk->thread.dsp.dspr[4] = mfhi3(); \
50 tsk->thread.dsp.dspr[5] = mflo3(); \ 50 tsk->thread.dsp.dspr[5] = mflo3(); \
51 tsk->thread.dsp.dspcontrol = rddsp(DSP_MASK); \
51} while (0) 52} while (0)
52 53
53#define save_dsp(tsk) \ 54#define save_dsp(tsk) \
@@ -64,6 +65,7 @@ do { \
64 mtlo2(tsk->thread.dsp.dspr[3]); \ 65 mtlo2(tsk->thread.dsp.dspr[3]); \
65 mthi3(tsk->thread.dsp.dspr[4]); \ 66 mthi3(tsk->thread.dsp.dspr[4]); \
66 mtlo3(tsk->thread.dsp.dspr[5]); \ 67 mtlo3(tsk->thread.dsp.dspr[5]); \
68 wrdsp(tsk->thread.dsp.dspcontrol, DSP_MASK); \
67} while (0) 69} while (0)
68 70
69#define restore_dsp(tsk) \ 71#define restore_dsp(tsk) \
diff --git a/include/asm-mips/elf.h b/include/asm-mips/elf.h
index d2c9a25f8459..851f013adad3 100644
--- a/include/asm-mips/elf.h
+++ b/include/asm-mips/elf.h
@@ -277,12 +277,12 @@ do { \
277 277
278struct task_struct; 278struct task_struct;
279 279
280extern void dump_regs(elf_greg_t *, struct pt_regs *regs); 280extern void elf_dump_regs(elf_greg_t *, struct pt_regs *regs);
281extern int dump_task_regs (struct task_struct *, elf_gregset_t *); 281extern int dump_task_regs (struct task_struct *, elf_gregset_t *);
282extern int dump_task_fpu(struct task_struct *, elf_fpregset_t *); 282extern int dump_task_fpu(struct task_struct *, elf_fpregset_t *);
283 283
284#define ELF_CORE_COPY_REGS(elf_regs, regs) \ 284#define ELF_CORE_COPY_REGS(elf_regs, regs) \
285 dump_regs((elf_greg_t *)&(elf_regs), regs); 285 elf_dump_regs((elf_greg_t *)&(elf_regs), regs);
286#define ELF_CORE_COPY_TASK_REGS(tsk, elf_regs) dump_task_regs(tsk, elf_regs) 286#define ELF_CORE_COPY_TASK_REGS(tsk, elf_regs) dump_task_regs(tsk, elf_regs)
287#define ELF_CORE_COPY_FPREGS(tsk, elf_fpregs) \ 287#define ELF_CORE_COPY_FPREGS(tsk, elf_fpregs) \
288 dump_task_fpu(tsk, elf_fpregs) 288 dump_task_fpu(tsk, elf_fpregs)
diff --git a/include/asm-mips/hazards.h b/include/asm-mips/hazards.h
index 7517189e469f..2fc90632f88c 100644
--- a/include/asm-mips/hazards.h
+++ b/include/asm-mips/hazards.h
@@ -233,15 +233,25 @@ __asm__(
233#endif 233#endif
234 234
235#ifdef CONFIG_CPU_MIPSR2 235#ifdef CONFIG_CPU_MIPSR2
236/*
237 * gcc has a tradition of misscompiling the previous construct using the
238 * address of a label as argument to inline assembler. Gas otoh has the
239 * annoying difference between la and dla which are only usable for 32-bit
240 * rsp. 64-bit code, so can't be used without conditional compilation.
241 * The alterantive is switching the assembler to 64-bit code which happens
242 * to work right even for 32-bit code ...
243 */
236#define instruction_hazard() \ 244#define instruction_hazard() \
237do { \ 245do { \
238__label__ __next; \ 246 unsigned long tmp; \
247 \
239 __asm__ __volatile__( \ 248 __asm__ __volatile__( \
249 " .set mips64r2 \n" \
250 " dla %0, 1f \n" \
240 " jr.hb %0 \n" \ 251 " jr.hb %0 \n" \
241 : \ 252 " .set mips0 \n" \
242 : "r" (&&__next)); \ 253 "1: \n" \
243__next: \ 254 : "=r" (tmp)); \
244 ; \
245} while (0) 255} while (0)
246 256
247#else 257#else
diff --git a/include/asm-mips/interrupt.h b/include/asm-mips/interrupt.h
index a5735761f5e5..abdf54ee64cf 100644
--- a/include/asm-mips/interrupt.h
+++ b/include/asm-mips/interrupt.h
@@ -93,6 +93,7 @@ __asm__ (
93 " .set noat \n" 93 " .set noat \n"
94#ifdef CONFIG_CPU_MIPSR2 94#ifdef CONFIG_CPU_MIPSR2
95 " di \\result \n" 95 " di \\result \n"
96 " andi \\result, 1 \n"
96#else 97#else
97 " mfc0 \\result, $12 \n" 98 " mfc0 \\result, $12 \n"
98 " ori $1, \\result, 1 \n" 99 " ori $1, \\result, 1 \n"
diff --git a/include/asm-mips/mach-au1x00/au1000.h b/include/asm-mips/mach-au1x00/au1000.h
index 8327ec341c18..8e1d7ed7d8e3 100644
--- a/include/asm-mips/mach-au1x00/au1000.h
+++ b/include/asm-mips/mach-au1x00/au1000.h
@@ -838,6 +838,7 @@ extern au1xxx_irq_map_t au1xxx_irq_map[];
838#define UART3_ADDR 0xB1400000 838#define UART3_ADDR 0xB1400000
839 839
840#define USB_OHCI_BASE 0x14020000 // phys addr for ioremap 840#define USB_OHCI_BASE 0x14020000 // phys addr for ioremap
841#define USB_OHCI_LEN 0x00060000
841#define USB_HOST_CONFIG 0xB4027ffc 842#define USB_HOST_CONFIG 0xB4027ffc
842 843
843#define AU1550_ETH0_BASE 0xB0500000 844#define AU1550_ETH0_BASE 0xB0500000
@@ -1017,10 +1018,12 @@ extern au1xxx_irq_map_t au1xxx_irq_map[];
1017 #define I2S_CONTROL_D (1<<1) 1018 #define I2S_CONTROL_D (1<<1)
1018 #define I2S_CONTROL_CE (1<<0) 1019 #define I2S_CONTROL_CE (1<<0)
1019 1020
1020#ifndef CONFIG_SOC_AU1200
1021
1022/* USB Host Controller */ 1021/* USB Host Controller */
1022#ifndef USB_OHCI_LEN
1023#define USB_OHCI_LEN 0x00100000 1023#define USB_OHCI_LEN 0x00100000
1024#endif
1025
1026#ifndef CONFIG_SOC_AU1200
1024 1027
1025/* USB Device Controller */ 1028/* USB Device Controller */
1026#define USBD_EP0RD 0xB0200000 1029#define USBD_EP0RD 0xB0200000
diff --git a/include/asm-mips/mach-ip22/cpu-feature-overrides.h b/include/asm-mips/mach-ip22/cpu-feature-overrides.h
index ab9714668177..2a37bedb4053 100644
--- a/include/asm-mips/mach-ip22/cpu-feature-overrides.h
+++ b/include/asm-mips/mach-ip22/cpu-feature-overrides.h
@@ -34,4 +34,9 @@
34#define cpu_has_nofpuex 0 34#define cpu_has_nofpuex 0
35#define cpu_has_64bits 1 35#define cpu_has_64bits 1
36 36
37#define cpu_has_mips32r1 0
38#define cpu_has_mips32r2 0
39#define cpu_has_mips64r1 0
40#define cpu_has_mips64r2 0
41
37#endif /* __ASM_MACH_IP22_CPU_FEATURE_OVERRIDES_H */ 42#endif /* __ASM_MACH_IP22_CPU_FEATURE_OVERRIDES_H */
diff --git a/include/asm-mips/mach-ip27/cpu-feature-overrides.h b/include/asm-mips/mach-ip27/cpu-feature-overrides.h
index 4c8a90051fd0..2d2f5b91e47f 100644
--- a/include/asm-mips/mach-ip27/cpu-feature-overrides.h
+++ b/include/asm-mips/mach-ip27/cpu-feature-overrides.h
@@ -37,4 +37,9 @@
37#define cpu_icache_line_size() 64 37#define cpu_icache_line_size() 64
38#define cpu_scache_line_size() 128 38#define cpu_scache_line_size() 128
39 39
40#define cpu_has_mips32r1 0
41#define cpu_has_mips32r2 0
42#define cpu_has_mips64r1 0
43#define cpu_has_mips64r2 0
44
40#endif /* __ASM_MACH_IP27_CPU_FEATURE_OVERRIDES_H */ 45#endif /* __ASM_MACH_IP27_CPU_FEATURE_OVERRIDES_H */
diff --git a/include/asm-mips/mach-ip32/cpu-feature-overrides.h b/include/asm-mips/mach-ip32/cpu-feature-overrides.h
index ab37fc1842ba..b80c30725cf6 100644
--- a/include/asm-mips/mach-ip32/cpu-feature-overrides.h
+++ b/include/asm-mips/mach-ip32/cpu-feature-overrides.h
@@ -39,4 +39,9 @@
39#define cpu_has_ic_fills_f_dc 0 39#define cpu_has_ic_fills_f_dc 0
40#define cpu_has_dsp 0 40#define cpu_has_dsp 0
41 41
42#define cpu_has_mips32r1 0
43#define cpu_has_mips32r2 0
44#define cpu_has_mips64r1 0
45#define cpu_has_mips64r2 0
46
42#endif /* __ASM_MACH_IP32_CPU_FEATURE_OVERRIDES_H */ 47#endif /* __ASM_MACH_IP32_CPU_FEATURE_OVERRIDES_H */
diff --git a/include/asm-mips/mach-ja/cpu-feature-overrides.h b/include/asm-mips/mach-ja/cpu-feature-overrides.h
index a0fde405d4c4..90ff087083b9 100644
--- a/include/asm-mips/mach-ja/cpu-feature-overrides.h
+++ b/include/asm-mips/mach-ja/cpu-feature-overrides.h
@@ -37,4 +37,9 @@
37#define cpu_icache_line_size() 32 37#define cpu_icache_line_size() 32
38#define cpu_scache_line_size() 32 38#define cpu_scache_line_size() 32
39 39
40#define cpu_has_mips32r1 0
41#define cpu_has_mips32r2 0
42#define cpu_has_mips64r1 0
43#define cpu_has_mips64r2 0
44
40#endif /* __ASM_MACH_JA_CPU_FEATURE_OVERRIDES_H */ 45#endif /* __ASM_MACH_JA_CPU_FEATURE_OVERRIDES_H */
diff --git a/include/asm-mips/mach-ocelot3/cpu-feature-overrides.h b/include/asm-mips/mach-ocelot3/cpu-feature-overrides.h
index 825c5f674dfc..782b986241dd 100644
--- a/include/asm-mips/mach-ocelot3/cpu-feature-overrides.h
+++ b/include/asm-mips/mach-ocelot3/cpu-feature-overrides.h
@@ -40,4 +40,9 @@
40#define cpu_icache_line_size() 32 40#define cpu_icache_line_size() 32
41#define cpu_scache_line_size() 32 41#define cpu_scache_line_size() 32
42 42
43#define cpu_has_mips32r1 0
44#define cpu_has_mips32r2 0
45#define cpu_has_mips64r1 0
46#define cpu_has_mips64r2 0
47
43#endif /* __ASM_MACH_JA_CPU_FEATURE_OVERRIDES_H */ 48#endif /* __ASM_MACH_JA_CPU_FEATURE_OVERRIDES_H */
diff --git a/include/asm-mips/mach-rm200/cpu-feature-overrides.h b/include/asm-mips/mach-rm200/cpu-feature-overrides.h
index 79f9b064c864..91e7cf5f2bfe 100644
--- a/include/asm-mips/mach-rm200/cpu-feature-overrides.h
+++ b/include/asm-mips/mach-rm200/cpu-feature-overrides.h
@@ -40,4 +40,9 @@
40#define cpu_icache_line_size() 32 40#define cpu_icache_line_size() 32
41#define cpu_scache_line_size() 0 /* No S-cache on R5000 I think ... */ 41#define cpu_scache_line_size() 0 /* No S-cache on R5000 I think ... */
42 42
43#define cpu_has_mips32r1 0
44#define cpu_has_mips32r2 0
45#define cpu_has_mips64r1 0
46#define cpu_has_mips64r2 0
47
43#endif /* __ASM_MACH_RM200_CPU_FEATURE_OVERRIDES_H */ 48#endif /* __ASM_MACH_RM200_CPU_FEATURE_OVERRIDES_H */
diff --git a/include/asm-mips/mach-yosemite/cpu-feature-overrides.h b/include/asm-mips/mach-yosemite/cpu-feature-overrides.h
index 463d051f4683..3073542c93c7 100644
--- a/include/asm-mips/mach-yosemite/cpu-feature-overrides.h
+++ b/include/asm-mips/mach-yosemite/cpu-feature-overrides.h
@@ -37,4 +37,9 @@
37#define cpu_icache_line_size() 32 37#define cpu_icache_line_size() 32
38#define cpu_scache_line_size() 32 38#define cpu_scache_line_size() 32
39 39
40#define cpu_has_mips32r1 0
41#define cpu_has_mips32r2 0
42#define cpu_has_mips64r1 0
43#define cpu_has_mips64r2 0
44
40#endif /* __ASM_MACH_YOSEMITE_CPU_FEATURE_OVERRIDES_H */ 45#endif /* __ASM_MACH_YOSEMITE_CPU_FEATURE_OVERRIDES_H */
diff --git a/include/asm-mips/mipsregs.h b/include/asm-mips/mipsregs.h
index 80370e0a5589..035ba0a9b0df 100644
--- a/include/asm-mips/mipsregs.h
+++ b/include/asm-mips/mipsregs.h
@@ -1059,7 +1059,7 @@ do { \
1059 " .set noat \n" \ 1059 " .set noat \n" \
1060 " move $1, %0 \n" \ 1060 " move $1, %0 \n" \
1061 " # wrdsp $1, %x1 \n" \ 1061 " # wrdsp $1, %x1 \n" \
1062 " .word 0x7c2004f8 | (%x1 << 15) \n" \ 1062 " .word 0x7c2004f8 | (%x1 << 11) \n" \
1063 " .set pop \n" \ 1063 " .set pop \n" \
1064 : \ 1064 : \
1065 : "r" (val), "i" (mask)); \ 1065 : "r" (val), "i" (mask)); \
diff --git a/include/asm-mips/processor.h b/include/asm-mips/processor.h
index f1980c6c3bcc..de53055a62ae 100644
--- a/include/asm-mips/processor.h
+++ b/include/asm-mips/processor.h
@@ -103,7 +103,6 @@ typedef __u32 dspreg_t;
103struct mips_dsp_state { 103struct mips_dsp_state {
104 dspreg_t dspr[NUM_DSP_REGS]; 104 dspreg_t dspr[NUM_DSP_REGS];
105 unsigned int dspcontrol; 105 unsigned int dspcontrol;
106 unsigned short used_dsp;
107}; 106};
108 107
109#define INIT_DSP {{0,},} 108#define INIT_DSP {{0,},}
diff --git a/include/asm-mips/vr41xx/capcella.h b/include/asm-mips/vr41xx/capcella.h
index 5b55083c5281..d10ffda50de7 100644
--- a/include/asm-mips/vr41xx/capcella.h
+++ b/include/asm-mips/vr41xx/capcella.h
@@ -1,7 +1,7 @@
1/* 1/*
2 * capcella.h, Include file for ZAO Networks Capcella. 2 * capcella.h, Include file for ZAO Networks Capcella.
3 * 3 *
4 * Copyright (C) 2002-2004 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> 4 * Copyright (C) 2002-2004 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by 7 * it under the terms of the GNU General Public License as published by
diff --git a/include/asm-mips/vr41xx/e55.h b/include/asm-mips/vr41xx/e55.h
index ea37b56fc66d..558f2269bf37 100644
--- a/include/asm-mips/vr41xx/e55.h
+++ b/include/asm-mips/vr41xx/e55.h
@@ -1,7 +1,7 @@
1/* 1/*
2 * e55.h, Include file for CASIO CASSIOPEIA E-10/15/55/65. 2 * e55.h, Include file for CASIO CASSIOPEIA E-10/15/55/65.
3 * 3 *
4 * Copyright (C) 2002-2004 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> 4 * Copyright (C) 2002-2004 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by 7 * it under the terms of the GNU General Public License as published by
diff --git a/include/asm-mips/vr41xx/giu.h b/include/asm-mips/vr41xx/giu.h
index 8590885a7638..8109cda557dc 100644
--- a/include/asm-mips/vr41xx/giu.h
+++ b/include/asm-mips/vr41xx/giu.h
@@ -1,7 +1,7 @@
1/* 1/*
2 * Include file for NEC VR4100 series General-purpose I/O Unit. 2 * Include file for NEC VR4100 series General-purpose I/O Unit.
3 * 3 *
4 * Copyright (C) 2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> 4 * Copyright (C) 2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by 7 * it under the terms of the GNU General Public License as published by
diff --git a/include/asm-mips/vr41xx/mpc30x.h b/include/asm-mips/vr41xx/mpc30x.h
index e6ac3c8e8bae..a6cbe4da6667 100644
--- a/include/asm-mips/vr41xx/mpc30x.h
+++ b/include/asm-mips/vr41xx/mpc30x.h
@@ -1,7 +1,7 @@
1/* 1/*
2 * mpc30x.h, Include file for Victor MP-C303/304. 2 * mpc30x.h, Include file for Victor MP-C303/304.
3 * 3 *
4 * Copyright (C) 2002-2004 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> 4 * Copyright (C) 2002-2004 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by 7 * it under the terms of the GNU General Public License as published by
diff --git a/include/asm-mips/vr41xx/pci.h b/include/asm-mips/vr41xx/pci.h
index c473aa78d1d4..6fc01ce19777 100644
--- a/include/asm-mips/vr41xx/pci.h
+++ b/include/asm-mips/vr41xx/pci.h
@@ -1,7 +1,7 @@
1/* 1/*
2 * Include file for NEC VR4100 series PCI Control Unit. 2 * Include file for NEC VR4100 series PCI Control Unit.
3 * 3 *
4 * Copyright (C) 2004-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> 4 * Copyright (C) 2004-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by 7 * it under the terms of the GNU General Public License as published by
diff --git a/include/asm-mips/vr41xx/siu.h b/include/asm-mips/vr41xx/siu.h
index 865cc07ddd7f..1fcf6e8082b4 100644
--- a/include/asm-mips/vr41xx/siu.h
+++ b/include/asm-mips/vr41xx/siu.h
@@ -1,7 +1,7 @@
1/* 1/*
2 * Include file for NEC VR4100 series Serial Interface Unit. 2 * Include file for NEC VR4100 series Serial Interface Unit.
3 * 3 *
4 * Copyright (C) 2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> 4 * Copyright (C) 2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by 7 * it under the terms of the GNU General Public License as published by
diff --git a/include/asm-mips/vr41xx/tb0219.h b/include/asm-mips/vr41xx/tb0219.h
index 273c6392688f..b318b9612a83 100644
--- a/include/asm-mips/vr41xx/tb0219.h
+++ b/include/asm-mips/vr41xx/tb0219.h
@@ -1,7 +1,7 @@
1/* 1/*
2 * tb0219.h, Include file for TANBAC TB0219. 2 * tb0219.h, Include file for TANBAC TB0219.
3 * 3 *
4 * Copyright (C) 2002-2004 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> 4 * Copyright (C) 2002-2004 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
5 * 5 *
6 * Modified for TANBAC TB0219: 6 * Modified for TANBAC TB0219:
7 * Copyright (C) 2003 Megasolution Inc. <matsu@megasolution.jp> 7 * Copyright (C) 2003 Megasolution Inc. <matsu@megasolution.jp>
diff --git a/include/asm-mips/vr41xx/tb0226.h b/include/asm-mips/vr41xx/tb0226.h
index 0ff9a60ecacc..2513f450e2d6 100644
--- a/include/asm-mips/vr41xx/tb0226.h
+++ b/include/asm-mips/vr41xx/tb0226.h
@@ -1,7 +1,7 @@
1/* 1/*
2 * tb0226.h, Include file for TANBAC TB0226. 2 * tb0226.h, Include file for TANBAC TB0226.
3 * 3 *
4 * Copyright (C) 2002-2004 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> 4 * Copyright (C) 2002-2004 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by 7 * it under the terms of the GNU General Public License as published by
diff --git a/include/asm-mips/vr41xx/vr41xx.h b/include/asm-mips/vr41xx/vr41xx.h
index bd2723c30901..70828d5fae9c 100644
--- a/include/asm-mips/vr41xx/vr41xx.h
+++ b/include/asm-mips/vr41xx/vr41xx.h
@@ -7,7 +7,7 @@
7 * Copyright (C) 2001, 2002 Paul Mundt 7 * Copyright (C) 2001, 2002 Paul Mundt
8 * Copyright (C) 2002 MontaVista Software, Inc. 8 * Copyright (C) 2002 MontaVista Software, Inc.
9 * Copyright (C) 2002 TimeSys Corp. 9 * Copyright (C) 2002 TimeSys Corp.
10 * Copyright (C) 2003-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> 10 * Copyright (C) 2003-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
11 * 11 *
12 * This program is free software; you can redistribute it and/or modify it 12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the 13 * under the terms of the GNU General Public License as published by the
diff --git a/include/asm-mips/vr41xx/vrc4173.h b/include/asm-mips/vr41xx/vrc4173.h
index bb7a85c186e4..4d41a9c091d4 100644
--- a/include/asm-mips/vr41xx/vrc4173.h
+++ b/include/asm-mips/vr41xx/vrc4173.h
@@ -4,7 +4,7 @@
4 * Copyright (C) 2000 Michael R. McDonald 4 * Copyright (C) 2000 Michael R. McDonald
5 * Copyright (C) 2001-2003 Montavista Software Inc. 5 * Copyright (C) 2001-2003 Montavista Software Inc.
6 * Author: Yoichi Yuasa <yyuasa@mvista.com, or source@mvista.com> 6 * Author: Yoichi Yuasa <yyuasa@mvista.com, or source@mvista.com>
7 * Copyright (C) 2004 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> 7 * Copyright (C) 2004 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
8 * Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org) 8 * Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org)
9 * 9 *
10 * This program is free software; you can redistribute it and/or modify 10 * This program is free software; you can redistribute it and/or modify
diff --git a/include/asm-mips/vr41xx/workpad.h b/include/asm-mips/vr41xx/workpad.h
index dfe01b43fb79..6bfa9c009a9b 100644
--- a/include/asm-mips/vr41xx/workpad.h
+++ b/include/asm-mips/vr41xx/workpad.h
@@ -1,7 +1,7 @@
1/* 1/*
2 * workpad.h, Include file for IBM WorkPad z50. 2 * workpad.h, Include file for IBM WorkPad z50.
3 * 3 *
4 * Copyright (C) 2002-2004 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> 4 * Copyright (C) 2002-2004 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by 7 * it under the terms of the GNU General Public License as published by
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-11 04:59:42 -0500