diff options
author | David Miller <davem@davemloft.net> | 2011-01-11 18:51:08 -0500 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2011-03-22 02:47:03 -0400 |
commit | d907ec04cc498e11e039e0fff8eb58cf01e885da (patch) | |
tree | e6c2f96da0807b3a4bdf60dc4c1d4c323b0fa519 | |
parent | a4ade83948e0ffc317b8227d92107271a0acdda5 (diff) |
svga: Make svga_wseq_mask() take an iomem regbase pointer.
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-rw-r--r-- | drivers/video/arkfb.c | 16 | ||||
-rw-r--r-- | drivers/video/s3fb.c | 20 | ||||
-rw-r--r-- | drivers/video/svgalib.c | 2 | ||||
-rw-r--r-- | drivers/video/vt8623fb.c | 43 | ||||
-rw-r--r-- | include/linux/svga.h | 4 |
5 files changed, 46 insertions, 39 deletions
diff --git a/drivers/video/arkfb.c b/drivers/video/arkfb.c index 4cc412126ad3..c351b184b1bd 100644 --- a/drivers/video/arkfb.c +++ b/drivers/video/arkfb.c | |||
@@ -649,7 +649,7 @@ static int arkfb_set_par(struct fb_info *info) | |||
649 | svga_wcrt_mask(0x11, 0x00, 0x80); | 649 | svga_wcrt_mask(0x11, 0x00, 0x80); |
650 | 650 | ||
651 | /* Blank screen and turn off sync */ | 651 | /* Blank screen and turn off sync */ |
652 | svga_wseq_mask(0x01, 0x20, 0x20); | 652 | svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); |
653 | svga_wcrt_mask(0x17, 0x00, 0x80); | 653 | svga_wcrt_mask(0x17, 0x00, 0x80); |
654 | 654 | ||
655 | /* Set default values */ | 655 | /* Set default values */ |
@@ -661,8 +661,8 @@ static int arkfb_set_par(struct fb_info *info) | |||
661 | svga_wcrt_multi(par->state.vgabase, ark_start_address_regs, 0); | 661 | svga_wcrt_multi(par->state.vgabase, ark_start_address_regs, 0); |
662 | 662 | ||
663 | /* ARK specific initialization */ | 663 | /* ARK specific initialization */ |
664 | svga_wseq_mask(0x10, 0x1F, 0x1F); /* enable linear framebuffer and full memory access */ | 664 | svga_wseq_mask(par->state.vgabase, 0x10, 0x1F, 0x1F); /* enable linear framebuffer and full memory access */ |
665 | svga_wseq_mask(0x12, 0x03, 0x03); /* 4 MB linear framebuffer size */ | 665 | svga_wseq_mask(par->state.vgabase, 0x12, 0x03, 0x03); /* 4 MB linear framebuffer size */ |
666 | 666 | ||
667 | vga_wseq(NULL, 0x13, info->fix.smem_start >> 16); | 667 | vga_wseq(NULL, 0x13, info->fix.smem_start >> 16); |
668 | vga_wseq(NULL, 0x14, info->fix.smem_start >> 24); | 668 | vga_wseq(NULL, 0x14, info->fix.smem_start >> 24); |
@@ -787,7 +787,7 @@ static int arkfb_set_par(struct fb_info *info) | |||
787 | memset_io(info->screen_base, 0x00, screen_size); | 787 | memset_io(info->screen_base, 0x00, screen_size); |
788 | /* Device and screen back on */ | 788 | /* Device and screen back on */ |
789 | svga_wcrt_mask(0x17, 0x80, 0x80); | 789 | svga_wcrt_mask(0x17, 0x80, 0x80); |
790 | svga_wseq_mask(0x01, 0x00, 0x20); | 790 | svga_wseq_mask(par->state.vgabase, 0x01, 0x00, 0x20); |
791 | 791 | ||
792 | return 0; | 792 | return 0; |
793 | } | 793 | } |
@@ -857,22 +857,24 @@ static int arkfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, | |||
857 | 857 | ||
858 | static int arkfb_blank(int blank_mode, struct fb_info *info) | 858 | static int arkfb_blank(int blank_mode, struct fb_info *info) |
859 | { | 859 | { |
860 | struct arkfb_info *par = info->par; | ||
861 | |||
860 | switch (blank_mode) { | 862 | switch (blank_mode) { |
861 | case FB_BLANK_UNBLANK: | 863 | case FB_BLANK_UNBLANK: |
862 | pr_debug("fb%d: unblank\n", info->node); | 864 | pr_debug("fb%d: unblank\n", info->node); |
863 | svga_wseq_mask(0x01, 0x00, 0x20); | 865 | svga_wseq_mask(par->state.vgabase, 0x01, 0x00, 0x20); |
864 | svga_wcrt_mask(0x17, 0x80, 0x80); | 866 | svga_wcrt_mask(0x17, 0x80, 0x80); |
865 | break; | 867 | break; |
866 | case FB_BLANK_NORMAL: | 868 | case FB_BLANK_NORMAL: |
867 | pr_debug("fb%d: blank\n", info->node); | 869 | pr_debug("fb%d: blank\n", info->node); |
868 | svga_wseq_mask(0x01, 0x20, 0x20); | 870 | svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); |
869 | svga_wcrt_mask(0x17, 0x80, 0x80); | 871 | svga_wcrt_mask(0x17, 0x80, 0x80); |
870 | break; | 872 | break; |
871 | case FB_BLANK_POWERDOWN: | 873 | case FB_BLANK_POWERDOWN: |
872 | case FB_BLANK_HSYNC_SUSPEND: | 874 | case FB_BLANK_HSYNC_SUSPEND: |
873 | case FB_BLANK_VSYNC_SUSPEND: | 875 | case FB_BLANK_VSYNC_SUSPEND: |
874 | pr_debug("fb%d: sync down\n", info->node); | 876 | pr_debug("fb%d: sync down\n", info->node); |
875 | svga_wseq_mask(0x01, 0x20, 0x20); | 877 | svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); |
876 | svga_wcrt_mask(0x17, 0x00, 0x80); | 878 | svga_wcrt_mask(0x17, 0x00, 0x80); |
877 | break; | 879 | break; |
878 | } | 880 | } |
diff --git a/drivers/video/s3fb.c b/drivers/video/s3fb.c index f37c38bbe879..efe77b683bfa 100644 --- a/drivers/video/s3fb.c +++ b/drivers/video/s3fb.c | |||
@@ -510,7 +510,7 @@ static int s3fb_set_par(struct fb_info *info) | |||
510 | svga_wcrt_mask(0x11, 0x00, 0x80); | 510 | svga_wcrt_mask(0x11, 0x00, 0x80); |
511 | 511 | ||
512 | /* Blank screen and turn off sync */ | 512 | /* Blank screen and turn off sync */ |
513 | svga_wseq_mask(0x01, 0x20, 0x20); | 513 | svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); |
514 | svga_wcrt_mask(0x17, 0x00, 0x80); | 514 | svga_wcrt_mask(0x17, 0x00, 0x80); |
515 | 515 | ||
516 | /* Set default values */ | 516 | /* Set default values */ |
@@ -700,8 +700,8 @@ static int s3fb_set_par(struct fb_info *info) | |||
700 | } | 700 | } |
701 | 701 | ||
702 | if (par->chip != CHIP_988_VIRGE_VX) { | 702 | if (par->chip != CHIP_988_VIRGE_VX) { |
703 | svga_wseq_mask(0x15, multiplex ? 0x10 : 0x00, 0x10); | 703 | svga_wseq_mask(par->state.vgabase, 0x15, multiplex ? 0x10 : 0x00, 0x10); |
704 | svga_wseq_mask(0x18, multiplex ? 0x80 : 0x00, 0x80); | 704 | svga_wseq_mask(par->state.vgabase, 0x18, multiplex ? 0x80 : 0x00, 0x80); |
705 | } | 705 | } |
706 | 706 | ||
707 | s3_set_pixclock(info, info->var.pixclock); | 707 | s3_set_pixclock(info, info->var.pixclock); |
@@ -718,7 +718,7 @@ static int s3fb_set_par(struct fb_info *info) | |||
718 | memset_io(info->screen_base, 0x00, screen_size); | 718 | memset_io(info->screen_base, 0x00, screen_size); |
719 | /* Device and screen back on */ | 719 | /* Device and screen back on */ |
720 | svga_wcrt_mask(0x17, 0x80, 0x80); | 720 | svga_wcrt_mask(0x17, 0x80, 0x80); |
721 | svga_wseq_mask(0x01, 0x00, 0x20); | 721 | svga_wseq_mask(par->state.vgabase, 0x01, 0x00, 0x20); |
722 | 722 | ||
723 | return 0; | 723 | return 0; |
724 | } | 724 | } |
@@ -788,31 +788,33 @@ static int s3fb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, | |||
788 | 788 | ||
789 | static int s3fb_blank(int blank_mode, struct fb_info *info) | 789 | static int s3fb_blank(int blank_mode, struct fb_info *info) |
790 | { | 790 | { |
791 | struct s3fb_info *par = info->par; | ||
792 | |||
791 | switch (blank_mode) { | 793 | switch (blank_mode) { |
792 | case FB_BLANK_UNBLANK: | 794 | case FB_BLANK_UNBLANK: |
793 | pr_debug("fb%d: unblank\n", info->node); | 795 | pr_debug("fb%d: unblank\n", info->node); |
794 | svga_wcrt_mask(0x56, 0x00, 0x06); | 796 | svga_wcrt_mask(0x56, 0x00, 0x06); |
795 | svga_wseq_mask(0x01, 0x00, 0x20); | 797 | svga_wseq_mask(par->state.vgabase, 0x01, 0x00, 0x20); |
796 | break; | 798 | break; |
797 | case FB_BLANK_NORMAL: | 799 | case FB_BLANK_NORMAL: |
798 | pr_debug("fb%d: blank\n", info->node); | 800 | pr_debug("fb%d: blank\n", info->node); |
799 | svga_wcrt_mask(0x56, 0x00, 0x06); | 801 | svga_wcrt_mask(0x56, 0x00, 0x06); |
800 | svga_wseq_mask(0x01, 0x20, 0x20); | 802 | svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); |
801 | break; | 803 | break; |
802 | case FB_BLANK_HSYNC_SUSPEND: | 804 | case FB_BLANK_HSYNC_SUSPEND: |
803 | pr_debug("fb%d: hsync\n", info->node); | 805 | pr_debug("fb%d: hsync\n", info->node); |
804 | svga_wcrt_mask(0x56, 0x02, 0x06); | 806 | svga_wcrt_mask(0x56, 0x02, 0x06); |
805 | svga_wseq_mask(0x01, 0x20, 0x20); | 807 | svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); |
806 | break; | 808 | break; |
807 | case FB_BLANK_VSYNC_SUSPEND: | 809 | case FB_BLANK_VSYNC_SUSPEND: |
808 | pr_debug("fb%d: vsync\n", info->node); | 810 | pr_debug("fb%d: vsync\n", info->node); |
809 | svga_wcrt_mask(0x56, 0x04, 0x06); | 811 | svga_wcrt_mask(0x56, 0x04, 0x06); |
810 | svga_wseq_mask(0x01, 0x20, 0x20); | 812 | svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); |
811 | break; | 813 | break; |
812 | case FB_BLANK_POWERDOWN: | 814 | case FB_BLANK_POWERDOWN: |
813 | pr_debug("fb%d: sync down\n", info->node); | 815 | pr_debug("fb%d: sync down\n", info->node); |
814 | svga_wcrt_mask(0x56, 0x06, 0x06); | 816 | svga_wcrt_mask(0x56, 0x06, 0x06); |
815 | svga_wseq_mask(0x01, 0x20, 0x20); | 817 | svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); |
816 | break; | 818 | break; |
817 | } | 819 | } |
818 | 820 | ||
diff --git a/drivers/video/svgalib.c b/drivers/video/svgalib.c index 6d3d39feb891..ea7490490de6 100644 --- a/drivers/video/svgalib.c +++ b/drivers/video/svgalib.c | |||
@@ -139,7 +139,7 @@ void svga_set_default_crt_regs(void) | |||
139 | 139 | ||
140 | void svga_set_textmode_vga_regs(void) | 140 | void svga_set_textmode_vga_regs(void) |
141 | { | 141 | { |
142 | /* svga_wseq_mask(0x1, 0x00, 0x01); */ /* Switch 8/9 pixel per char */ | 142 | /* svga_wseq_mask(NULL, 0x1, 0x00, 0x01); */ /* Switch 8/9 pixel per char */ |
143 | vga_wseq(NULL, VGA_SEQ_MEMORY_MODE, VGA_SR04_EXT_MEM); | 143 | vga_wseq(NULL, VGA_SEQ_MEMORY_MODE, VGA_SR04_EXT_MEM); |
144 | vga_wseq(NULL, VGA_SEQ_PLANE_WRITE, 0x03); | 144 | vga_wseq(NULL, VGA_SEQ_PLANE_WRITE, 0x03); |
145 | 145 | ||
diff --git a/drivers/video/vt8623fb.c b/drivers/video/vt8623fb.c index 9de76811200e..edcfee8bc90b 100644 --- a/drivers/video/vt8623fb.c +++ b/drivers/video/vt8623fb.c | |||
@@ -253,6 +253,7 @@ static void vt8623fb_fillrect(struct fb_info *info, const struct fb_fillrect *re | |||
253 | 253 | ||
254 | static void vt8623_set_pixclock(struct fb_info *info, u32 pixclock) | 254 | static void vt8623_set_pixclock(struct fb_info *info, u32 pixclock) |
255 | { | 255 | { |
256 | struct vt8623fb_info *par = info->par; | ||
256 | u16 m, n, r; | 257 | u16 m, n, r; |
257 | u8 regval; | 258 | u8 regval; |
258 | int rv; | 259 | int rv; |
@@ -274,8 +275,8 @@ static void vt8623_set_pixclock(struct fb_info *info, u32 pixclock) | |||
274 | udelay(1000); | 275 | udelay(1000); |
275 | 276 | ||
276 | /* PLL reset */ | 277 | /* PLL reset */ |
277 | svga_wseq_mask(0x40, 0x02, 0x02); | 278 | svga_wseq_mask(par->state.vgabase, 0x40, 0x02, 0x02); |
278 | svga_wseq_mask(0x40, 0x00, 0x02); | 279 | svga_wseq_mask(par->state.vgabase, 0x40, 0x00, 0x02); |
279 | } | 280 | } |
280 | 281 | ||
281 | 282 | ||
@@ -415,12 +416,12 @@ static int vt8623fb_set_par(struct fb_info *info) | |||
415 | info->var.activate = FB_ACTIVATE_NOW; | 416 | info->var.activate = FB_ACTIVATE_NOW; |
416 | 417 | ||
417 | /* Unlock registers */ | 418 | /* Unlock registers */ |
418 | svga_wseq_mask(0x10, 0x01, 0x01); | 419 | svga_wseq_mask(par->state.vgabase, 0x10, 0x01, 0x01); |
419 | svga_wcrt_mask(0x11, 0x00, 0x80); | 420 | svga_wcrt_mask(0x11, 0x00, 0x80); |
420 | svga_wcrt_mask(0x47, 0x00, 0x01); | 421 | svga_wcrt_mask(0x47, 0x00, 0x01); |
421 | 422 | ||
422 | /* Device, screen and sync off */ | 423 | /* Device, screen and sync off */ |
423 | svga_wseq_mask(0x01, 0x20, 0x20); | 424 | svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); |
424 | svga_wcrt_mask(0x36, 0x30, 0x30); | 425 | svga_wcrt_mask(0x36, 0x30, 0x30); |
425 | svga_wcrt_mask(0x17, 0x00, 0x80); | 426 | svga_wcrt_mask(0x17, 0x00, 0x80); |
426 | 427 | ||
@@ -444,12 +445,12 @@ static int vt8623fb_set_par(struct fb_info *info) | |||
444 | else | 445 | else |
445 | svga_wcrt_mask(0x09, 0x00, 0x80); | 446 | svga_wcrt_mask(0x09, 0x00, 0x80); |
446 | 447 | ||
447 | svga_wseq_mask(0x1E, 0xF0, 0xF0); // DI/DVP bus | 448 | svga_wseq_mask(par->state.vgabase, 0x1E, 0xF0, 0xF0); // DI/DVP bus |
448 | svga_wseq_mask(0x2A, 0x0F, 0x0F); // DI/DVP bus | 449 | svga_wseq_mask(par->state.vgabase, 0x2A, 0x0F, 0x0F); // DI/DVP bus |
449 | svga_wseq_mask(0x16, 0x08, 0xBF); // FIFO read threshold | 450 | svga_wseq_mask(par->state.vgabase, 0x16, 0x08, 0xBF); // FIFO read threshold |
450 | vga_wseq(NULL, 0x17, 0x1F); // FIFO depth | 451 | vga_wseq(NULL, 0x17, 0x1F); // FIFO depth |
451 | vga_wseq(NULL, 0x18, 0x4E); | 452 | vga_wseq(NULL, 0x18, 0x4E); |
452 | svga_wseq_mask(0x1A, 0x08, 0x08); // enable MMIO ? | 453 | svga_wseq_mask(par->state.vgabase, 0x1A, 0x08, 0x08); // enable MMIO ? |
453 | 454 | ||
454 | vga_wcrt(NULL, 0x32, 0x00); | 455 | vga_wcrt(NULL, 0x32, 0x00); |
455 | vga_wcrt(NULL, 0x34, 0x00); | 456 | vga_wcrt(NULL, 0x34, 0x00); |
@@ -466,31 +467,31 @@ static int vt8623fb_set_par(struct fb_info *info) | |||
466 | case 0: | 467 | case 0: |
467 | pr_debug("fb%d: text mode\n", info->node); | 468 | pr_debug("fb%d: text mode\n", info->node); |
468 | svga_set_textmode_vga_regs(); | 469 | svga_set_textmode_vga_regs(); |
469 | svga_wseq_mask(0x15, 0x00, 0xFE); | 470 | svga_wseq_mask(par->state.vgabase, 0x15, 0x00, 0xFE); |
470 | svga_wcrt_mask(0x11, 0x60, 0x70); | 471 | svga_wcrt_mask(0x11, 0x60, 0x70); |
471 | break; | 472 | break; |
472 | case 1: | 473 | case 1: |
473 | pr_debug("fb%d: 4 bit pseudocolor\n", info->node); | 474 | pr_debug("fb%d: 4 bit pseudocolor\n", info->node); |
474 | vga_wgfx(NULL, VGA_GFX_MODE, 0x40); | 475 | vga_wgfx(NULL, VGA_GFX_MODE, 0x40); |
475 | svga_wseq_mask(0x15, 0x20, 0xFE); | 476 | svga_wseq_mask(par->state.vgabase, 0x15, 0x20, 0xFE); |
476 | svga_wcrt_mask(0x11, 0x00, 0x70); | 477 | svga_wcrt_mask(0x11, 0x00, 0x70); |
477 | break; | 478 | break; |
478 | case 2: | 479 | case 2: |
479 | pr_debug("fb%d: 4 bit pseudocolor, planar\n", info->node); | 480 | pr_debug("fb%d: 4 bit pseudocolor, planar\n", info->node); |
480 | svga_wseq_mask(0x15, 0x00, 0xFE); | 481 | svga_wseq_mask(par->state.vgabase, 0x15, 0x00, 0xFE); |
481 | svga_wcrt_mask(0x11, 0x00, 0x70); | 482 | svga_wcrt_mask(0x11, 0x00, 0x70); |
482 | break; | 483 | break; |
483 | case 3: | 484 | case 3: |
484 | pr_debug("fb%d: 8 bit pseudocolor\n", info->node); | 485 | pr_debug("fb%d: 8 bit pseudocolor\n", info->node); |
485 | svga_wseq_mask(0x15, 0x22, 0xFE); | 486 | svga_wseq_mask(par->state.vgabase, 0x15, 0x22, 0xFE); |
486 | break; | 487 | break; |
487 | case 4: | 488 | case 4: |
488 | pr_debug("fb%d: 5/6/5 truecolor\n", info->node); | 489 | pr_debug("fb%d: 5/6/5 truecolor\n", info->node); |
489 | svga_wseq_mask(0x15, 0xB6, 0xFE); | 490 | svga_wseq_mask(par->state.vgabase, 0x15, 0xB6, 0xFE); |
490 | break; | 491 | break; |
491 | case 5: | 492 | case 5: |
492 | pr_debug("fb%d: 8/8/8 truecolor\n", info->node); | 493 | pr_debug("fb%d: 8/8/8 truecolor\n", info->node); |
493 | svga_wseq_mask(0x15, 0xAE, 0xFE); | 494 | svga_wseq_mask(par->state.vgabase, 0x15, 0xAE, 0xFE); |
494 | break; | 495 | break; |
495 | default: | 496 | default: |
496 | printk(KERN_ERR "vt8623fb: unsupported mode - bug\n"); | 497 | printk(KERN_ERR "vt8623fb: unsupported mode - bug\n"); |
@@ -507,7 +508,7 @@ static int vt8623fb_set_par(struct fb_info *info) | |||
507 | /* Device and screen back on */ | 508 | /* Device and screen back on */ |
508 | svga_wcrt_mask(0x17, 0x80, 0x80); | 509 | svga_wcrt_mask(0x17, 0x80, 0x80); |
509 | svga_wcrt_mask(0x36, 0x00, 0x30); | 510 | svga_wcrt_mask(0x36, 0x00, 0x30); |
510 | svga_wseq_mask(0x01, 0x00, 0x20); | 511 | svga_wseq_mask(par->state.vgabase, 0x01, 0x00, 0x20); |
511 | 512 | ||
512 | return 0; | 513 | return 0; |
513 | } | 514 | } |
@@ -570,31 +571,33 @@ static int vt8623fb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, | |||
570 | 571 | ||
571 | static int vt8623fb_blank(int blank_mode, struct fb_info *info) | 572 | static int vt8623fb_blank(int blank_mode, struct fb_info *info) |
572 | { | 573 | { |
574 | struct vt8623fb_info *par = info->par; | ||
575 | |||
573 | switch (blank_mode) { | 576 | switch (blank_mode) { |
574 | case FB_BLANK_UNBLANK: | 577 | case FB_BLANK_UNBLANK: |
575 | pr_debug("fb%d: unblank\n", info->node); | 578 | pr_debug("fb%d: unblank\n", info->node); |
576 | svga_wcrt_mask(0x36, 0x00, 0x30); | 579 | svga_wcrt_mask(0x36, 0x00, 0x30); |
577 | svga_wseq_mask(0x01, 0x00, 0x20); | 580 | svga_wseq_mask(par->state.vgabase, 0x01, 0x00, 0x20); |
578 | break; | 581 | break; |
579 | case FB_BLANK_NORMAL: | 582 | case FB_BLANK_NORMAL: |
580 | pr_debug("fb%d: blank\n", info->node); | 583 | pr_debug("fb%d: blank\n", info->node); |
581 | svga_wcrt_mask(0x36, 0x00, 0x30); | 584 | svga_wcrt_mask(0x36, 0x00, 0x30); |
582 | svga_wseq_mask(0x01, 0x20, 0x20); | 585 | svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); |
583 | break; | 586 | break; |
584 | case FB_BLANK_HSYNC_SUSPEND: | 587 | case FB_BLANK_HSYNC_SUSPEND: |
585 | pr_debug("fb%d: DPMS standby (hsync off)\n", info->node); | 588 | pr_debug("fb%d: DPMS standby (hsync off)\n", info->node); |
586 | svga_wcrt_mask(0x36, 0x10, 0x30); | 589 | svga_wcrt_mask(0x36, 0x10, 0x30); |
587 | svga_wseq_mask(0x01, 0x20, 0x20); | 590 | svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); |
588 | break; | 591 | break; |
589 | case FB_BLANK_VSYNC_SUSPEND: | 592 | case FB_BLANK_VSYNC_SUSPEND: |
590 | pr_debug("fb%d: DPMS suspend (vsync off)\n", info->node); | 593 | pr_debug("fb%d: DPMS suspend (vsync off)\n", info->node); |
591 | svga_wcrt_mask(0x36, 0x20, 0x30); | 594 | svga_wcrt_mask(0x36, 0x20, 0x30); |
592 | svga_wseq_mask(0x01, 0x20, 0x20); | 595 | svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); |
593 | break; | 596 | break; |
594 | case FB_BLANK_POWERDOWN: | 597 | case FB_BLANK_POWERDOWN: |
595 | pr_debug("fb%d: DPMS off (no sync)\n", info->node); | 598 | pr_debug("fb%d: DPMS off (no sync)\n", info->node); |
596 | svga_wcrt_mask(0x36, 0x30, 0x30); | 599 | svga_wcrt_mask(0x36, 0x30, 0x30); |
597 | svga_wseq_mask(0x01, 0x20, 0x20); | 600 | svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); |
598 | break; | 601 | break; |
599 | } | 602 | } |
600 | 603 | ||
diff --git a/include/linux/svga.h b/include/linux/svga.h index d31a39844019..93f7777b268a 100644 --- a/include/linux/svga.h +++ b/include/linux/svga.h | |||
@@ -76,9 +76,9 @@ static inline void svga_wattr(void __iomem *regbase, u8 index, u8 data) | |||
76 | 76 | ||
77 | /* Write a value to a sequence register with a mask */ | 77 | /* Write a value to a sequence register with a mask */ |
78 | 78 | ||
79 | static inline void svga_wseq_mask(u8 index, u8 data, u8 mask) | 79 | static inline void svga_wseq_mask(void __iomem *regbase, u8 index, u8 data, u8 mask) |
80 | { | 80 | { |
81 | vga_wseq(NULL, index, (data & mask) | (vga_rseq(NULL, index) & ~mask)); | 81 | vga_wseq(regbase, index, (data & mask) | (vga_rseq(regbase, index) & ~mask)); |
82 | } | 82 | } |
83 | 83 | ||
84 | /* Write a value to a CRT register with a mask */ | 84 | /* Write a value to a CRT register with a mask */ |