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authorAlex Deucher <alexander.deucher@amd.com>2015-01-15 10:52:33 -0500
committerAlex Deucher <alexander.deucher@amd.com>2015-01-15 11:11:02 -0500
commitd8a74e186949e1a2c2f1309212478b0659bf9225 (patch)
treeb138d5cf4fde64e288aeb15bdf958a5d7ae24b90
parent5615f890bc6babdc2998dec62f3552326d06eb7b (diff)
drm/radeon: use rv515_ring_start on r5xx
This was accidently lost in 76a0df859def. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
-rw-r--r--drivers/gpu/drm/radeon/radeon_asic.c18
1 files changed, 16 insertions, 2 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c
index 850de57069be..121aff6a3b41 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.c
+++ b/drivers/gpu/drm/radeon/radeon_asic.c
@@ -333,6 +333,20 @@ static struct radeon_asic_ring r300_gfx_ring = {
333 .set_wptr = &r100_gfx_set_wptr, 333 .set_wptr = &r100_gfx_set_wptr,
334}; 334};
335 335
336static struct radeon_asic_ring rv515_gfx_ring = {
337 .ib_execute = &r100_ring_ib_execute,
338 .emit_fence = &r300_fence_ring_emit,
339 .emit_semaphore = &r100_semaphore_ring_emit,
340 .cs_parse = &r300_cs_parse,
341 .ring_start = &rv515_ring_start,
342 .ring_test = &r100_ring_test,
343 .ib_test = &r100_ib_test,
344 .is_lockup = &r100_gpu_is_lockup,
345 .get_rptr = &r100_gfx_get_rptr,
346 .get_wptr = &r100_gfx_get_wptr,
347 .set_wptr = &r100_gfx_set_wptr,
348};
349
336static struct radeon_asic r300_asic = { 350static struct radeon_asic r300_asic = {
337 .init = &r300_init, 351 .init = &r300_init,
338 .fini = &r300_fini, 352 .fini = &r300_fini,
@@ -748,7 +762,7 @@ static struct radeon_asic rv515_asic = {
748 .set_page = &rv370_pcie_gart_set_page, 762 .set_page = &rv370_pcie_gart_set_page,
749 }, 763 },
750 .ring = { 764 .ring = {
751 [RADEON_RING_TYPE_GFX_INDEX] = &r300_gfx_ring 765 [RADEON_RING_TYPE_GFX_INDEX] = &rv515_gfx_ring
752 }, 766 },
753 .irq = { 767 .irq = {
754 .set = &rs600_irq_set, 768 .set = &rs600_irq_set,
@@ -814,7 +828,7 @@ static struct radeon_asic r520_asic = {
814 .set_page = &rv370_pcie_gart_set_page, 828 .set_page = &rv370_pcie_gart_set_page,
815 }, 829 },
816 .ring = { 830 .ring = {
817 [RADEON_RING_TYPE_GFX_INDEX] = &r300_gfx_ring 831 [RADEON_RING_TYPE_GFX_INDEX] = &rv515_gfx_ring
818 }, 832 },
819 .irq = { 833 .irq = {
820 .set = &rs600_irq_set, 834 .set = &rs600_irq_set,