diff options
author | Jarkko Nikula <jarkko.nikula@bitmer.com> | 2013-03-13 16:15:49 -0400 |
---|---|---|
committer | Tony Lindgren <tony@atomide.com> | 2013-03-20 12:41:58 -0400 |
commit | d8443c8e058bb04ba2168936d905e57cc5711d7a (patch) | |
tree | 01b68793c4df460b4b81dcddaca80d699b37c24b | |
parent | f9da561f4e270195dee5875b3ebbac75d65fd2c3 (diff) |
ARM: OMAP2+: Remove unused DMA channel definitions
Many of these channel definitions have became unused or were never used
so remove unused definitions from arch/arm/mach-omap2/dma.h using a script
below. See also notes in commit d5e7c86
("ARM: OMAP2+: DMA: Moving OMAP2+ DMA channel definitions to mach-omap2")
for removing remaining ones.
egrep '#define OMAP.*DMA' arch/arm/mach-omap2/dma.h \
|cut -f 1 |cut -d ' ' -f 2 | while read -r i; do \
if [ `git grep -c $i | wc -l` -eq 1 ]; then \
echo "removing" $i; \
sed -i "/${i}/d" arch/arm/mach-omap2/dma.h; \
fi; \
done
Signed-off-by: Jarkko Nikula <jarkko.nikula@bitmer.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
-rw-r--r-- | arch/arm/mach-omap2/dma.h | 70 |
1 files changed, 0 insertions, 70 deletions
diff --git a/arch/arm/mach-omap2/dma.h b/arch/arm/mach-omap2/dma.h index eba80dbc5218..65f80cacf178 100644 --- a/arch/arm/mach-omap2/dma.h +++ b/arch/arm/mach-omap2/dma.h | |||
@@ -22,69 +22,20 @@ | |||
22 | 22 | ||
23 | /* DMA channels for 24xx */ | 23 | /* DMA channels for 24xx */ |
24 | #define OMAP24XX_DMA_NO_DEVICE 0 | 24 | #define OMAP24XX_DMA_NO_DEVICE 0 |
25 | #define OMAP24XX_DMA_XTI_DMA 1 /* S_DMA_0 */ | ||
26 | #define OMAP24XX_DMA_EXT_DMAREQ0 2 /* S_DMA_1 */ | 25 | #define OMAP24XX_DMA_EXT_DMAREQ0 2 /* S_DMA_1 */ |
27 | #define OMAP24XX_DMA_EXT_DMAREQ1 3 /* S_DMA_2 */ | 26 | #define OMAP24XX_DMA_EXT_DMAREQ1 3 /* S_DMA_2 */ |
28 | #define OMAP24XX_DMA_GPMC 4 /* S_DMA_3 */ | 27 | #define OMAP24XX_DMA_GPMC 4 /* S_DMA_3 */ |
29 | #define OMAP24XX_DMA_GFX 5 /* S_DMA_4 */ | ||
30 | #define OMAP24XX_DMA_DSS 6 /* S_DMA_5 */ | ||
31 | #define OMAP242X_DMA_VLYNQ_TX 7 /* S_DMA_6 */ | ||
32 | #define OMAP24XX_DMA_EXT_DMAREQ2 7 /* S_DMA_6 */ | ||
33 | #define OMAP24XX_DMA_CWT 8 /* S_DMA_7 */ | ||
34 | #define OMAP24XX_DMA_AES_TX 9 /* S_DMA_8 */ | 28 | #define OMAP24XX_DMA_AES_TX 9 /* S_DMA_8 */ |
35 | #define OMAP24XX_DMA_AES_RX 10 /* S_DMA_9 */ | 29 | #define OMAP24XX_DMA_AES_RX 10 /* S_DMA_9 */ |
36 | #define OMAP24XX_DMA_DES_TX 11 /* S_DMA_10 */ | ||
37 | #define OMAP24XX_DMA_DES_RX 12 /* S_DMA_11 */ | ||
38 | #define OMAP24XX_DMA_SHA1MD5_RX 13 /* S_DMA_12 */ | ||
39 | #define OMAP34XX_DMA_SHA2MD5_RX 13 /* S_DMA_12 */ | ||
40 | #define OMAP242X_DMA_EXT_DMAREQ2 14 /* S_DMA_13 */ | 30 | #define OMAP242X_DMA_EXT_DMAREQ2 14 /* S_DMA_13 */ |
41 | #define OMAP242X_DMA_EXT_DMAREQ3 15 /* S_DMA_14 */ | 31 | #define OMAP242X_DMA_EXT_DMAREQ3 15 /* S_DMA_14 */ |
42 | #define OMAP242X_DMA_EXT_DMAREQ4 16 /* S_DMA_15 */ | 32 | #define OMAP242X_DMA_EXT_DMAREQ4 16 /* S_DMA_15 */ |
43 | #define OMAP242X_DMA_EAC_AC_RD 17 /* S_DMA_16 */ | ||
44 | #define OMAP242X_DMA_EAC_AC_WR 18 /* S_DMA_17 */ | ||
45 | #define OMAP242X_DMA_EAC_MD_UL_RD 19 /* S_DMA_18 */ | ||
46 | #define OMAP242X_DMA_EAC_MD_UL_WR 20 /* S_DMA_19 */ | ||
47 | #define OMAP242X_DMA_EAC_MD_DL_RD 21 /* S_DMA_20 */ | ||
48 | #define OMAP242X_DMA_EAC_MD_DL_WR 22 /* S_DMA_21 */ | ||
49 | #define OMAP242X_DMA_EAC_BT_UL_RD 23 /* S_DMA_22 */ | ||
50 | #define OMAP242X_DMA_EAC_BT_UL_WR 24 /* S_DMA_23 */ | ||
51 | #define OMAP242X_DMA_EAC_BT_DL_RD 25 /* S_DMA_24 */ | ||
52 | #define OMAP242X_DMA_EAC_BT_DL_WR 26 /* S_DMA_25 */ | ||
53 | #define OMAP243X_DMA_EXT_DMAREQ3 14 /* S_DMA_13 */ | ||
54 | #define OMAP24XX_DMA_SPI3_TX0 15 /* S_DMA_14 */ | ||
55 | #define OMAP24XX_DMA_SPI3_RX0 16 /* S_DMA_15 */ | ||
56 | #define OMAP24XX_DMA_MCBSP3_TX 17 /* S_DMA_16 */ | ||
57 | #define OMAP24XX_DMA_MCBSP3_RX 18 /* S_DMA_17 */ | ||
58 | #define OMAP24XX_DMA_MCBSP4_TX 19 /* S_DMA_18 */ | ||
59 | #define OMAP24XX_DMA_MCBSP4_RX 20 /* S_DMA_19 */ | ||
60 | #define OMAP24XX_DMA_MCBSP5_TX 21 /* S_DMA_20 */ | ||
61 | #define OMAP24XX_DMA_MCBSP5_RX 22 /* S_DMA_21 */ | ||
62 | #define OMAP24XX_DMA_SPI3_TX1 23 /* S_DMA_22 */ | ||
63 | #define OMAP24XX_DMA_SPI3_RX1 24 /* S_DMA_23 */ | ||
64 | #define OMAP243X_DMA_EXT_DMAREQ4 25 /* S_DMA_24 */ | ||
65 | #define OMAP243X_DMA_EXT_DMAREQ5 26 /* S_DMA_25 */ | ||
66 | #define OMAP34XX_DMA_I2C3_TX 25 /* S_DMA_24 */ | 33 | #define OMAP34XX_DMA_I2C3_TX 25 /* S_DMA_24 */ |
67 | #define OMAP34XX_DMA_I2C3_RX 26 /* S_DMA_25 */ | 34 | #define OMAP34XX_DMA_I2C3_RX 26 /* S_DMA_25 */ |
68 | #define OMAP24XX_DMA_I2C1_TX 27 /* S_DMA_26 */ | 35 | #define OMAP24XX_DMA_I2C1_TX 27 /* S_DMA_26 */ |
69 | #define OMAP24XX_DMA_I2C1_RX 28 /* S_DMA_27 */ | 36 | #define OMAP24XX_DMA_I2C1_RX 28 /* S_DMA_27 */ |
70 | #define OMAP24XX_DMA_I2C2_TX 29 /* S_DMA_28 */ | 37 | #define OMAP24XX_DMA_I2C2_TX 29 /* S_DMA_28 */ |
71 | #define OMAP24XX_DMA_I2C2_RX 30 /* S_DMA_29 */ | 38 | #define OMAP24XX_DMA_I2C2_RX 30 /* S_DMA_29 */ |
72 | #define OMAP24XX_DMA_MCBSP1_TX 31 /* S_DMA_30 */ | ||
73 | #define OMAP24XX_DMA_MCBSP1_RX 32 /* S_DMA_31 */ | ||
74 | #define OMAP24XX_DMA_MCBSP2_TX 33 /* S_DMA_32 */ | ||
75 | #define OMAP24XX_DMA_MCBSP2_RX 34 /* S_DMA_33 */ | ||
76 | #define OMAP24XX_DMA_SPI1_TX0 35 /* S_DMA_34 */ | ||
77 | #define OMAP24XX_DMA_SPI1_RX0 36 /* S_DMA_35 */ | ||
78 | #define OMAP24XX_DMA_SPI1_TX1 37 /* S_DMA_36 */ | ||
79 | #define OMAP24XX_DMA_SPI1_RX1 38 /* S_DMA_37 */ | ||
80 | #define OMAP24XX_DMA_SPI1_TX2 39 /* S_DMA_38 */ | ||
81 | #define OMAP24XX_DMA_SPI1_RX2 40 /* S_DMA_39 */ | ||
82 | #define OMAP24XX_DMA_SPI1_TX3 41 /* S_DMA_40 */ | ||
83 | #define OMAP24XX_DMA_SPI1_RX3 42 /* S_DMA_41 */ | ||
84 | #define OMAP24XX_DMA_SPI2_TX0 43 /* S_DMA_42 */ | ||
85 | #define OMAP24XX_DMA_SPI2_RX0 44 /* S_DMA_43 */ | ||
86 | #define OMAP24XX_DMA_SPI2_TX1 45 /* S_DMA_44 */ | ||
87 | #define OMAP24XX_DMA_SPI2_RX1 46 /* S_DMA_45 */ | ||
88 | #define OMAP24XX_DMA_MMC2_TX 47 /* S_DMA_46 */ | 39 | #define OMAP24XX_DMA_MMC2_TX 47 /* S_DMA_46 */ |
89 | #define OMAP24XX_DMA_MMC2_RX 48 /* S_DMA_47 */ | 40 | #define OMAP24XX_DMA_MMC2_RX 48 /* S_DMA_47 */ |
90 | #define OMAP24XX_DMA_UART1_TX 49 /* S_DMA_48 */ | 41 | #define OMAP24XX_DMA_UART1_TX 49 /* S_DMA_48 */ |
@@ -93,33 +44,12 @@ | |||
93 | #define OMAP24XX_DMA_UART2_RX 52 /* S_DMA_51 */ | 44 | #define OMAP24XX_DMA_UART2_RX 52 /* S_DMA_51 */ |
94 | #define OMAP24XX_DMA_UART3_TX 53 /* S_DMA_52 */ | 45 | #define OMAP24XX_DMA_UART3_TX 53 /* S_DMA_52 */ |
95 | #define OMAP24XX_DMA_UART3_RX 54 /* S_DMA_53 */ | 46 | #define OMAP24XX_DMA_UART3_RX 54 /* S_DMA_53 */ |
96 | #define OMAP24XX_DMA_USB_W2FC_TX0 55 /* S_DMA_54 */ | ||
97 | #define OMAP24XX_DMA_USB_W2FC_RX0 56 /* S_DMA_55 */ | ||
98 | #define OMAP24XX_DMA_USB_W2FC_TX1 57 /* S_DMA_56 */ | ||
99 | #define OMAP24XX_DMA_USB_W2FC_RX1 58 /* S_DMA_57 */ | ||
100 | #define OMAP24XX_DMA_USB_W2FC_TX2 59 /* S_DMA_58 */ | ||
101 | #define OMAP24XX_DMA_USB_W2FC_RX2 60 /* S_DMA_59 */ | ||
102 | #define OMAP24XX_DMA_MMC1_TX 61 /* S_DMA_60 */ | 47 | #define OMAP24XX_DMA_MMC1_TX 61 /* S_DMA_60 */ |
103 | #define OMAP24XX_DMA_MMC1_RX 62 /* S_DMA_61 */ | 48 | #define OMAP24XX_DMA_MMC1_RX 62 /* S_DMA_61 */ |
104 | #define OMAP24XX_DMA_MS 63 /* S_DMA_62 */ | ||
105 | #define OMAP242X_DMA_EXT_DMAREQ5 64 /* S_DMA_63 */ | 49 | #define OMAP242X_DMA_EXT_DMAREQ5 64 /* S_DMA_63 */ |
106 | #define OMAP243X_DMA_EXT_DMAREQ6 64 /* S_DMA_63 */ | ||
107 | #define OMAP34XX_DMA_EXT_DMAREQ3 64 /* S_DMA_63 */ | ||
108 | #define OMAP34XX_DMA_AES2_TX 65 /* S_DMA_64 */ | 50 | #define OMAP34XX_DMA_AES2_TX 65 /* S_DMA_64 */ |
109 | #define OMAP34XX_DMA_AES2_RX 66 /* S_DMA_65 */ | 51 | #define OMAP34XX_DMA_AES2_RX 66 /* S_DMA_65 */ |
110 | #define OMAP34XX_DMA_DES2_TX 67 /* S_DMA_66 */ | ||
111 | #define OMAP34XX_DMA_DES2_RX 68 /* S_DMA_67 */ | ||
112 | #define OMAP34XX_DMA_SHA1MD5_RX 69 /* S_DMA_68 */ | 52 | #define OMAP34XX_DMA_SHA1MD5_RX 69 /* S_DMA_68 */ |
113 | #define OMAP34XX_DMA_SPI4_TX0 70 /* S_DMA_69 */ | ||
114 | #define OMAP34XX_DMA_SPI4_RX0 71 /* S_DMA_70 */ | ||
115 | #define OMAP34XX_DSS_DMA0 72 /* S_DMA_71 */ | ||
116 | #define OMAP34XX_DSS_DMA1 73 /* S_DMA_72 */ | ||
117 | #define OMAP34XX_DSS_DMA2 74 /* S_DMA_73 */ | ||
118 | #define OMAP34XX_DSS_DMA3 75 /* S_DMA_74 */ | ||
119 | #define OMAP34XX_DMA_MMC3_TX 77 /* S_DMA_76 */ | ||
120 | #define OMAP34XX_DMA_MMC3_RX 78 /* S_DMA_77 */ | ||
121 | #define OMAP34XX_DMA_USIM_TX 79 /* S_DMA_78 */ | ||
122 | #define OMAP34XX_DMA_USIM_RX 80 /* S_DMA_79 */ | ||
123 | 53 | ||
124 | #define OMAP36XX_DMA_UART4_TX 81 /* S_DMA_80 */ | 54 | #define OMAP36XX_DMA_UART4_TX 81 /* S_DMA_80 */ |
125 | #define OMAP36XX_DMA_UART4_RX 82 /* S_DMA_81 */ | 55 | #define OMAP36XX_DMA_UART4_RX 82 /* S_DMA_81 */ |