bq24190_charger: Add support for TI BQ24190 Battery Charger

Add driver support for the Texas Instruments BQ24190 battery charger.
Some of the information provided by the device is about the charger and
other information is about the battery so create two power_supply objects
(one for each) and provide the appropriate information for each one.

The device has many fields that go beyond what is reasonable to report or
modify using the existing 'POWER_SUPPLY_PROP_*' properties so the driver
exports the register fields via sysfs.  They are prefixed by 'f_' (for
'field') to make it easier to distinguish between a register field and a
"normal" sysfs file exported by the power_supply infrastructure.

Signed-off-by: Mark A. Greer <mgreer@animalcreek.com>
Signed-off-by: Anton Vorontsov <anton@enomsg.org>

4 files changed, 1569 insertions, 0 deletions

diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig
index dcc0d9e5817d..e8970a65ba52 100644
--- a/drivers/power/Kconfig
+++ b/drivers/power/Kconfig
@@ -334,6 +334,12 @@ config CHARGER_BQ2415X
           You'll need this driver to charge batteries on e.g. Nokia
           RX-51/N900.
 
+config CHARGER_BQ24190
+        tristate "TI BQ24190 battery charger driver"
+        depends on I2C && GPIOLIB
+        help
+          Say Y to enable support for the TI BQ24190 battery charger.
+
 config CHARGER_SMB347
         tristate "Summit Microelectronics SMB347 Battery Charger"
         depends on I2C
diff --git a/drivers/power/Makefile b/drivers/power/Makefile
index 653bf6ceff30..4ae45339e32c 100644
--- a/drivers/power/Makefile
+++ b/drivers/power/Makefile
@@ -50,6 +50,7 @@ obj-$(CONFIG_CHARGER_MANAGER)	+= charger-manager.o
 obj-$(CONFIG_CHARGER_MAX8997)   += max8997_charger.o
 obj-$(CONFIG_CHARGER_MAX8998)   += max8998_charger.o
 obj-$(CONFIG_CHARGER_BQ2415X)   += bq2415x_charger.o
+obj-$(CONFIG_CHARGER_BQ24190)   += bq24190_charger.o
 obj-$(CONFIG_POWER_AVS)         += avs/
 obj-$(CONFIG_CHARGER_SMB347)    += smb347-charger.o
 obj-$(CONFIG_CHARGER_TPS65090)  += tps65090-charger.o
diff --git a/drivers/power/bq24190_charger.c b/drivers/power/bq24190_charger.c
new file mode 100644
index 000000000000..2b0f0e0b58a2
--- /dev/null
+++ b/drivers/power/bq24190_charger.c
@@ -0,0 +1,1546 @@
+/*
+ * Driver for the TI bq24190 battery charger.
+ *
+ * Author: Mark A. Greer <mgreer@animalcreek.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/module.h>
+#include <linux/interrupt.h>
+#include <linux/delay.h>
+#include <linux/of_irq.h>
+#include <linux/of_device.h>
+#include <linux/pm_runtime.h>
+#include <linux/power_supply.h>
+#include <linux/gpio.h>
+#include <linux/i2c.h>
+
+#include <linux/power/bq24190_charger.h>
+
+
+#define BQ24190_MANUFACTURER    "Texas Instruments"
+
+#define BQ24190_REG_ISC         0x00 /* Input Source Control */
+#define BQ24190_REG_ISC_EN_HIZ_MASK             BIT(7)
+#define BQ24190_REG_ISC_EN_HIZ_SHIFT            7
+#define BQ24190_REG_ISC_VINDPM_MASK             (BIT(6) | BIT(5) | BIT(4) | \
+                                                 BIT(3))
+#define BQ24190_REG_ISC_VINDPM_SHIFT            3
+#define BQ24190_REG_ISC_IINLIM_MASK             (BIT(2) | BIT(1) | BIT(0))
+#define BQ24190_REG_ISC_IINLIM_SHIFT            0
+
+#define BQ24190_REG_POC         0x01 /* Power-On Configuration */
+#define BQ24190_REG_POC_RESET_MASK              BIT(7)
+#define BQ24190_REG_POC_RESET_SHIFT             7
+#define BQ24190_REG_POC_WDT_RESET_MASK          BIT(6)
+#define BQ24190_REG_POC_WDT_RESET_SHIFT         6
+#define BQ24190_REG_POC_CHG_CONFIG_MASK         (BIT(5) | BIT(4))
+#define BQ24190_REG_POC_CHG_CONFIG_SHIFT        4
+#define BQ24190_REG_POC_SYS_MIN_MASK            (BIT(3) | BIT(2) | BIT(1))
+#define BQ24190_REG_POC_SYS_MIN_SHIFT           1
+#define BQ24190_REG_POC_BOOST_LIM_MASK          BIT(0)
+#define BQ24190_REG_POC_BOOST_LIM_SHIFT         0
+
+#define BQ24190_REG_CCC         0x02 /* Charge Current Control */
+#define BQ24190_REG_CCC_ICHG_MASK               (BIT(7) | BIT(6) | BIT(5) | \
+                                                 BIT(4) | BIT(3) | BIT(2))
+#define BQ24190_REG_CCC_ICHG_SHIFT              2
+#define BQ24190_REG_CCC_FORCE_20PCT_MASK        BIT(0)
+#define BQ24190_REG_CCC_FORCE_20PCT_SHIFT       0
+
+#define BQ24190_REG_PCTCC       0x03 /* Pre-charge/Termination Current Cntl */
+#define BQ24190_REG_PCTCC_IPRECHG_MASK          (BIT(7) | BIT(6) | BIT(5) | \
+                                                 BIT(4))
+#define BQ24190_REG_PCTCC_IPRECHG_SHIFT         4
+#define BQ24190_REG_PCTCC_ITERM_MASK            (BIT(3) | BIT(2) | BIT(1) | \
+                                                 BIT(0))
+#define BQ24190_REG_PCTCC_ITERM_SHIFT           0
+
+#define BQ24190_REG_CVC         0x04 /* Charge Voltage Control */
+#define BQ24190_REG_CVC_VREG_MASK               (BIT(7) | BIT(6) | BIT(5) | \
+                                                 BIT(4) | BIT(3) | BIT(2))
+#define BQ24190_REG_CVC_VREG_SHIFT              2
+#define BQ24190_REG_CVC_BATLOWV_MASK            BIT(1)
+#define BQ24190_REG_CVC_BATLOWV_SHIFT           1
+#define BQ24190_REG_CVC_VRECHG_MASK             BIT(0)
+#define BQ24190_REG_CVC_VRECHG_SHIFT            0
+
+#define BQ24190_REG_CTTC        0x05 /* Charge Term/Timer Control */
+#define BQ24190_REG_CTTC_EN_TERM_MASK           BIT(7)
+#define BQ24190_REG_CTTC_EN_TERM_SHIFT          7
+#define BQ24190_REG_CTTC_TERM_STAT_MASK         BIT(6)
+#define BQ24190_REG_CTTC_TERM_STAT_SHIFT        6
+#define BQ24190_REG_CTTC_WATCHDOG_MASK          (BIT(5) | BIT(4))
+#define BQ24190_REG_CTTC_WATCHDOG_SHIFT         4
+#define BQ24190_REG_CTTC_EN_TIMER_MASK          BIT(3)
+#define BQ24190_REG_CTTC_EN_TIMER_SHIFT         3
+#define BQ24190_REG_CTTC_CHG_TIMER_MASK         (BIT(2) | BIT(1))
+#define BQ24190_REG_CTTC_CHG_TIMER_SHIFT        1
+#define BQ24190_REG_CTTC_JEITA_ISET_MASK        BIT(0)
+#define BQ24190_REG_CTTC_JEITA_ISET_SHIFT       0
+
+#define BQ24190_REG_ICTRC       0x06 /* IR Comp/Thermal Regulation Control */
+#define BQ24190_REG_ICTRC_BAT_COMP_MASK         (BIT(7) | BIT(6) | BIT(5))
+#define BQ24190_REG_ICTRC_BAT_COMP_SHIFT        5
+#define BQ24190_REG_ICTRC_VCLAMP_MASK           (BIT(4) | BIT(3) | BIT(2))
+#define BQ24190_REG_ICTRC_VCLAMP_SHIFT          2
+#define BQ24190_REG_ICTRC_TREG_MASK             (BIT(1) | BIT(0))
+#define BQ24190_REG_ICTRC_TREG_SHIFT            0
+
+#define BQ24190_REG_MOC         0x07 /* Misc. Operation Control */
+#define BQ24190_REG_MOC_DPDM_EN_MASK            BIT(7)
+#define BQ24190_REG_MOC_DPDM_EN_SHIFT           7
+#define BQ24190_REG_MOC_TMR2X_EN_MASK           BIT(6)
+#define BQ24190_REG_MOC_TMR2X_EN_SHIFT          6
+#define BQ24190_REG_MOC_BATFET_DISABLE_MASK     BIT(5)
+#define BQ24190_REG_MOC_BATFET_DISABLE_SHIFT    5
+#define BQ24190_REG_MOC_JEITA_VSET_MASK         BIT(4)
+#define BQ24190_REG_MOC_JEITA_VSET_SHIFT        4
+#define BQ24190_REG_MOC_INT_MASK_MASK           (BIT(1) | BIT(0))
+#define BQ24190_REG_MOC_INT_MASK_SHIFT          0
+
+#define BQ24190_REG_SS          0x08 /* System Status */
+#define BQ24190_REG_SS_VBUS_STAT_MASK           (BIT(7) | BIT(6))
+#define BQ24190_REG_SS_VBUS_STAT_SHIFT          6
+#define BQ24190_REG_SS_CHRG_STAT_MASK           (BIT(5) | BIT(4))
+#define BQ24190_REG_SS_CHRG_STAT_SHIFT          4
+#define BQ24190_REG_SS_DPM_STAT_MASK            BIT(3)
+#define BQ24190_REG_SS_DPM_STAT_SHIFT           3
+#define BQ24190_REG_SS_PG_STAT_MASK             BIT(2)
+#define BQ24190_REG_SS_PG_STAT_SHIFT            2
+#define BQ24190_REG_SS_THERM_STAT_MASK          BIT(1)
+#define BQ24190_REG_SS_THERM_STAT_SHIFT         1
+#define BQ24190_REG_SS_VSYS_STAT_MASK           BIT(0)
+#define BQ24190_REG_SS_VSYS_STAT_SHIFT          0
+
+#define BQ24190_REG_F           0x09 /* Fault */
+#define BQ24190_REG_F_WATCHDOG_FAULT_MASK       BIT(7)
+#define BQ24190_REG_F_WATCHDOG_FAULT_SHIFT      7
+#define BQ24190_REG_F_BOOST_FAULT_MASK          BIT(6)
+#define BQ24190_REG_F_BOOST_FAULT_SHIFT         6
+#define BQ24190_REG_F_CHRG_FAULT_MASK           (BIT(5) | BIT(4))
+#define BQ24190_REG_F_CHRG_FAULT_SHIFT          4
+#define BQ24190_REG_F_BAT_FAULT_MASK            BIT(3)
+#define BQ24190_REG_F_BAT_FAULT_SHIFT           3
+#define BQ24190_REG_F_NTC_FAULT_MASK            (BIT(2) | BIT(1) | BIT(0))
+#define BQ24190_REG_F_NTC_FAULT_SHIFT           0
+
+#define BQ24190_REG_VPRS        0x0A /* Vendor/Part/Revision Status */
+#define BQ24190_REG_VPRS_PN_MASK                (BIT(5) | BIT(4) | BIT(3))
+#define BQ24190_REG_VPRS_PN_SHIFT               3
+#define BQ24190_REG_VPRS_PN_24190                       0x4
+#define BQ24190_REG_VPRS_PN_24192                       0x5 /* Also 24193 */
+#define BQ24190_REG_VPRS_PN_24192I                      0x3
+#define BQ24190_REG_VPRS_TS_PROFILE_MASK        BIT(2)
+#define BQ24190_REG_VPRS_TS_PROFILE_SHIFT       2
+#define BQ24190_REG_VPRS_DEV_REG_MASK           (BIT(1) | BIT(0))
+#define BQ24190_REG_VPRS_DEV_REG_SHIFT          0
+
+/*
+ * The FAULT register is latched by the bq24190 (except for NTC_FAULT)
+ * so the first read after a fault returns the latched value and subsequent
+ * reads return the current value.  In order to return the fault status
+ * to the user, have the interrupt handler save the reg's value and retrieve
+ * it in the appropriate health/status routine.  Each routine has its own
+ * flag indicating whether it should use the value stored by the last run
+ * of the interrupt handler or do an actual reg read.  That way each routine