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authorRajendra Nayak <rnayak@ti.com>2009-12-08 13:31:44 -0500
committerpaul <paul@twilight.(none)>2009-12-11 19:00:46 -0500
commitd79b126724554122d9598834ef39fb0bb4fc132d (patch)
treef8844ee1cd9698fead9eeea016cdf8abdc62ed01
parent972c542746904b5f418284946728a61b783275ef (diff)
ARM: OMAP4: PM: Add dummy hooks for OMAP4 dpll api's
This patch adds dummy hooks for OMAP4 dpll api's. Removes dummy hooks for clkdev api's and enables CLKDEV for OMAP4. Also comments clockdomain calls from within the clock framework as its not supported yet for OMAP4. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Benoit Cousson <b-cousson@ti.com>
-rw-r--r--arch/arm/mach-omap2/Makefile3
-rw-r--r--arch/arm/mach-omap2/clock.c8
-rw-r--r--arch/arm/mach-omap2/clock44xx.c58
-rw-r--r--arch/arm/mach-omap2/cm.h4
-rw-r--r--arch/arm/mach-omap2/gpmc.c2
-rw-r--r--arch/arm/mach-omap2/io.c4
-rw-r--r--arch/arm/plat-omap/Kconfig1
-rw-r--r--arch/arm/plat-omap/clock.c21
8 files changed, 75 insertions, 26 deletions
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index c638fe0d84e8..3078ff4d3c71 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -11,7 +11,7 @@ clock-common = clock.o clock_common_data.o clockdomain.o
11 11
12obj-$(CONFIG_ARCH_OMAP2) += $(omap-2-3-common) $(prcm-common) $(clock-common) 12obj-$(CONFIG_ARCH_OMAP2) += $(omap-2-3-common) $(prcm-common) $(clock-common)
13obj-$(CONFIG_ARCH_OMAP3) += $(omap-2-3-common) $(prcm-common) $(clock-common) 13obj-$(CONFIG_ARCH_OMAP3) += $(omap-2-3-common) $(prcm-common) $(clock-common)
14obj-$(CONFIG_ARCH_OMAP4) += prcm.o 14obj-$(CONFIG_ARCH_OMAP4) += prcm.o clock.o
15 15
16obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o 16obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o
17 17
@@ -46,6 +46,7 @@ obj-$(CONFIG_ARCH_OMAP2) += clock2xxx.o clock2xxx_data.o
46obj-$(CONFIG_ARCH_OMAP2420) += opp2420_data.o 46obj-$(CONFIG_ARCH_OMAP2420) += opp2420_data.o
47obj-$(CONFIG_ARCH_OMAP3) += clock34xx.o clock34xx_data.o 47obj-$(CONFIG_ARCH_OMAP3) += clock34xx.o clock34xx_data.o
48obj-$(CONFIG_ARCH_OMAP2430) += opp2430_data.o 48obj-$(CONFIG_ARCH_OMAP2430) += opp2430_data.o
49obj-$(CONFIG_ARCH_OMAP4) += clock44xx.o clock44xx_data.o
49 50
50# EMU peripherals 51# EMU peripherals
51obj-$(CONFIG_OMAP3_EMU) += emu.o 52obj-$(CONFIG_OMAP3_EMU) += emu.o
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index 4716206547ac..5cb2dcb5b23e 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -149,6 +149,7 @@ static int _dpll_test_fint(struct clk *clk, u8 n)
149 * clockdomain pointer, and save it into the struct clk. Intended to be 149 * clockdomain pointer, and save it into the struct clk. Intended to be
150 * called during clk_register(). No return value. 150 * called during clk_register(). No return value.
151 */ 151 */
152#ifndef CONFIG_ARCH_OMAP4 /* FIXME: Remove this once clkdm f/w is in place */
152void omap2_init_clk_clkdm(struct clk *clk) 153void omap2_init_clk_clkdm(struct clk *clk)
153{ 154{
154 struct clockdomain *clkdm; 155 struct clockdomain *clkdm;
@@ -166,6 +167,7 @@ void omap2_init_clk_clkdm(struct clk *clk)
166 "clkdm %s\n", clk->name, clk->clkdm_name); 167 "clkdm %s\n", clk->name, clk->clkdm_name);
167 } 168 }
168} 169}
170#endif
169 171
170/** 172/**
171 * omap2_init_clksel_parent - set a clksel clk's parent field from the hardware 173 * omap2_init_clksel_parent - set a clksel clk's parent field from the hardware
@@ -437,8 +439,10 @@ void omap2_clk_disable(struct clk *clk)
437 _omap2_clk_disable(clk); 439 _omap2_clk_disable(clk);
438 if (clk->parent) 440 if (clk->parent)
439 omap2_clk_disable(clk->parent); 441 omap2_clk_disable(clk->parent);
442#ifndef CONFIG_ARCH_OMAP4 /* FIXME: Remove this once clkdm f/w is in place */
440 if (clk->clkdm) 443 if (clk->clkdm)
441 omap2_clkdm_clk_disable(clk->clkdm, clk); 444 omap2_clkdm_clk_disable(clk->clkdm, clk);
445#endif
442 446
443 } 447 }
444} 448}
@@ -448,8 +452,10 @@ int omap2_clk_enable(struct clk *clk)
448 int ret = 0; 452 int ret = 0;
449 453
450 if (clk->usecount++ == 0) { 454 if (clk->usecount++ == 0) {
455#ifndef CONFIG_ARCH_OMAP4 /* FIXME: Remove this once clkdm f/w is in place */
451 if (clk->clkdm) 456 if (clk->clkdm)
452 omap2_clkdm_clk_enable(clk->clkdm, clk); 457 omap2_clkdm_clk_enable(clk->clkdm, clk);
458#endif
453 459
454 if (clk->parent) { 460 if (clk->parent) {
455 ret = omap2_clk_enable(clk->parent); 461 ret = omap2_clk_enable(clk->parent);
@@ -468,8 +474,10 @@ int omap2_clk_enable(struct clk *clk)
468 return ret; 474 return ret;
469 475
470err: 476err:
477#ifndef CONFIG_ARCH_OMAP4 /* FIXME: Remove this once clkdm f/w is in place */
471 if (clk->clkdm) 478 if (clk->clkdm)
472 omap2_clkdm_clk_disable(clk->clkdm, clk); 479 omap2_clkdm_clk_disable(clk->clkdm, clk);
480#endif
473 clk->usecount--; 481 clk->usecount--;
474 return ret; 482 return ret;
475} 483}
diff --git a/arch/arm/mach-omap2/clock44xx.c b/arch/arm/mach-omap2/clock44xx.c
new file mode 100644
index 000000000000..5b25d38d542e
--- /dev/null
+++ b/arch/arm/mach-omap2/clock44xx.c
@@ -0,0 +1,58 @@
1/*
2 * OMAP4-specific clock framework functions
3 *
4 * Copyright (C) 2009 Texas Instruments, Inc.
5 *
6 * Rajendra Nayak (rnayak@ti.com)
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/errno.h>
14#include "clock.h"
15
16struct clk_functions omap2_clk_functions = {
17 .clk_enable = omap2_clk_enable,
18 .clk_disable = omap2_clk_disable,
19 .clk_round_rate = omap2_clk_round_rate,
20 .clk_set_rate = omap2_clk_set_rate,
21 .clk_set_parent = omap2_clk_set_parent,
22 .clk_disable_unused = omap2_clk_disable_unused,
23};
24
25/*
26 * Dummy functions for DPLL control. Plan is to re-use
27 * existing OMAP3 dpll control functions.
28 */
29
30unsigned long omap3_dpll_recalc(struct clk *clk)
31{
32 return 0;
33}
34
35int omap3_noncore_dpll_set_rate(struct clk *clk, unsigned long rate)
36{
37 return 0;
38}
39
40int omap3_noncore_dpll_enable(struct clk *clk)
41{
42 return 0;
43}
44
45void omap3_noncore_dpll_disable(struct clk *clk)
46{
47 return;
48}
49
50const struct clkops clkops_noncore_dpll_ops = {
51 .enable = &omap3_noncore_dpll_enable,
52 .disable = &omap3_noncore_dpll_disable,
53};
54
55void omap2_clk_prepare_for_reboot(void)
56{
57 return;
58}
diff --git a/arch/arm/mach-omap2/cm.h b/arch/arm/mach-omap2/cm.h
index e8814a60ccf7..90a4086fbdf4 100644
--- a/arch/arm/mach-omap2/cm.h
+++ b/arch/arm/mach-omap2/cm.h
@@ -97,6 +97,10 @@
97 97
98/* CM2.CEFUSE_CM2 register offsets */ 98/* CM2.CEFUSE_CM2 register offsets */
99 99
100/* OMAP4 modulemode control */
101#define OMAP4430_MODULEMODE_HWCTRL 0
102#define OMAP4430_MODULEMODE_SWCTRL 1
103
100/* Clock management domain register get/set */ 104/* Clock management domain register get/set */
101 105
102#ifndef __ASSEMBLER__ 106#ifndef __ASSEMBLER__
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index e86f5ca180ea..bd8cb5974726 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -517,7 +517,7 @@ void __init gpmc_init(void)
517 ck = "gpmc_fck"; 517 ck = "gpmc_fck";
518 l = OMAP34XX_GPMC_BASE; 518 l = OMAP34XX_GPMC_BASE;
519 } else if (cpu_is_omap44xx()) { 519 } else if (cpu_is_omap44xx()) {
520 ck = "gpmc_fck"; 520 ck = "gpmc_ck";
521 l = OMAP44XX_GPMC_BASE; 521 l = OMAP44XX_GPMC_BASE;
522 } 522 }
523 523
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 6a4d8e468703..ac9ea6007f27 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -35,7 +35,6 @@
35#include <plat/serial.h> 35#include <plat/serial.h>
36#include <plat/vram.h> 36#include <plat/vram.h>
37 37
38#ifndef CONFIG_ARCH_OMAP4 /* FIXME: Remove this once clkdev is ready */
39#include "clock.h" 38#include "clock.h"
40 39
41#include <plat/omap-pm.h> 40#include <plat/omap-pm.h>
@@ -44,7 +43,6 @@
44 43
45#include <plat/clockdomain.h> 44#include <plat/clockdomain.h>
46#include "clockdomains.h" 45#include "clockdomains.h"
47#endif
48#include <plat/omap_hwmod.h> 46#include <plat/omap_hwmod.h>
49#include "omap_hwmod_2420.h" 47#include "omap_hwmod_2420.h"
50#include "omap_hwmod_2430.h" 48#include "omap_hwmod_2430.h"
@@ -321,8 +319,8 @@ void __init omap2_init_common_hw(struct omap_sdrc_params *sdrc_cs0,
321 omap_pm_if_early_init(mpu_opps, dsp_opps, l3_opps); 319 omap_pm_if_early_init(mpu_opps, dsp_opps, l3_opps);
322 pwrdm_init(powerdomains_omap); 320 pwrdm_init(powerdomains_omap);
323 clkdm_init(clockdomains_omap, clkdm_pwrdm_autodeps); 321 clkdm_init(clockdomains_omap, clkdm_pwrdm_autodeps);
324 omap2_clk_init();
325#endif 322#endif
323 omap2_clk_init();
326 omap_serial_early_init(); 324 omap_serial_early_init();
327#ifndef CONFIG_ARCH_OMAP4 325#ifndef CONFIG_ARCH_OMAP4
328 omap_hwmod_late_init(); 326 omap_hwmod_late_init();
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
index 353a7b31c62b..e2ea04a4c8a1 100644
--- a/arch/arm/plat-omap/Kconfig
+++ b/arch/arm/plat-omap/Kconfig
@@ -27,6 +27,7 @@ config ARCH_OMAP4
27 bool "TI OMAP4" 27 bool "TI OMAP4"
28 select CPU_V7 28 select CPU_V7
29 select ARM_GIC 29 select ARM_GIC
30 select COMMON_CLKDEV
30 31
31endchoice 32endchoice
32 33
diff --git a/arch/arm/plat-omap/clock.c b/arch/arm/plat-omap/clock.c
index b857d117a45a..89cafc937249 100644
--- a/arch/arm/plat-omap/clock.c
+++ b/arch/arm/plat-omap/clock.c
@@ -40,31 +40,10 @@ static struct clk_functions *arch_clock;
40 * clock framework is not up , it is defined here to avoid rework in 40 * clock framework is not up , it is defined here to avoid rework in
41 * every driver. Also dummy prcm reset function is added */ 41 * every driver. Also dummy prcm reset function is added */
42 42
43/* Dummy hooks only for OMAP4.For rest OMAPs, common clkdev is used */
44#if defined(CONFIG_ARCH_OMAP4)
45struct clk *clk_get(struct device *dev, const char *id)
46{
47 return NULL;
48}
49EXPORT_SYMBOL(clk_get);
50
51void clk_put(struct clk *clk)
52{
53}
54EXPORT_SYMBOL(clk_put);
55
56void omap2_clk_prepare_for_reboot(void)
57{
58}
59EXPORT_SYMBOL(omap2_clk_prepare_for_reboot);
60#endif
61int clk_enable(struct clk *clk) 43int clk_enable(struct clk *clk)
62{ 44{
63 unsigned long flags; 45 unsigned long flags;
64 int ret = 0; 46 int ret = 0;
65 if (cpu_is_omap44xx())
66 /* OMAP4 clk framework not supported yet */
67 return 0;
68 47
69 if (clk == NULL || IS_ERR(clk)) 48 if (clk == NULL || IS_ERR(clk))
70 return -EINVAL; 49 return -EINVAL;