diff options
| author | Tony Lindgren <tony@atomide.com> | 2013-03-19 14:20:16 -0400 |
|---|---|---|
| committer | Tony Lindgren <tony@atomide.com> | 2013-03-19 14:20:16 -0400 |
| commit | d736f64a1a10fa7ed5761e4954112825c18320c4 (patch) | |
| tree | 8e0d9d6316a7dcbf091b1c67265a71cca474f395 | |
| parent | a937536b868b8369b98967929045f1df54234323 (diff) | |
| parent | 92702df3570e1ccfa050e135e50c450502251b79 (diff) | |
Merge tag 'omap-fixes-a-for-3.9-rc' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into omap-for-v3.9-rc3/fixes
Miscellaneous OMAP fixes for v3.9-rc. These primarily deal with OMAP2+ power
management regressions. There's also a fix for the OMAP1 OHCI controller.
Basic build, boot, and PM test logs are at:
http://www.pwsan.com/omap/testlogs/fixes_a_3.9-rc/20130314101856/
| -rw-r--r-- | arch/arm/mach-omap1/clock_data.c | 12 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/cclock44xx_data.c | 20 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/omap_hwmod.c | 7 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/omap_hwmod.h | 9 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 7 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 6 |
6 files changed, 45 insertions, 16 deletions
diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock_data.c index cb7c6ae2e3fc..6c4f766365a2 100644 --- a/arch/arm/mach-omap1/clock_data.c +++ b/arch/arm/mach-omap1/clock_data.c | |||
| @@ -543,15 +543,6 @@ static struct clk usb_dc_ck = { | |||
| 543 | /* Direct from ULPD, no parent */ | 543 | /* Direct from ULPD, no parent */ |
| 544 | .rate = 48000000, | 544 | .rate = 48000000, |
| 545 | .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG), | 545 | .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG), |
| 546 | .enable_bit = USB_REQ_EN_SHIFT, | ||
| 547 | }; | ||
| 548 | |||
| 549 | static struct clk usb_dc_ck7xx = { | ||
| 550 | .name = "usb_dc_ck", | ||
| 551 | .ops = &clkops_generic, | ||
| 552 | /* Direct from ULPD, no parent */ | ||
| 553 | .rate = 48000000, | ||
| 554 | .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG), | ||
| 555 | .enable_bit = SOFT_USB_OTG_DPLL_REQ_SHIFT, | 546 | .enable_bit = SOFT_USB_OTG_DPLL_REQ_SHIFT, |
| 556 | }; | 547 | }; |
| 557 | 548 | ||
| @@ -727,8 +718,7 @@ static struct omap_clk omap_clks[] = { | |||
| 727 | CLK(NULL, "usb_clko", &usb_clko, CK_16XX | CK_1510 | CK_310), | 718 | CLK(NULL, "usb_clko", &usb_clko, CK_16XX | CK_1510 | CK_310), |
| 728 | CLK(NULL, "usb_hhc_ck", &usb_hhc_ck1510, CK_1510 | CK_310), | 719 | CLK(NULL, "usb_hhc_ck", &usb_hhc_ck1510, CK_1510 | CK_310), |
| 729 | CLK(NULL, "usb_hhc_ck", &usb_hhc_ck16xx, CK_16XX), | 720 | CLK(NULL, "usb_hhc_ck", &usb_hhc_ck16xx, CK_16XX), |
| 730 | CLK(NULL, "usb_dc_ck", &usb_dc_ck, CK_16XX), | 721 | CLK(NULL, "usb_dc_ck", &usb_dc_ck, CK_16XX | CK_7XX), |
| 731 | CLK(NULL, "usb_dc_ck", &usb_dc_ck7xx, CK_7XX), | ||
| 732 | CLK(NULL, "mclk", &mclk_1510, CK_1510 | CK_310), | 722 | CLK(NULL, "mclk", &mclk_1510, CK_1510 | CK_310), |
| 733 | CLK(NULL, "mclk", &mclk_16xx, CK_16XX), | 723 | CLK(NULL, "mclk", &mclk_16xx, CK_16XX), |
| 734 | CLK(NULL, "bclk", &bclk_1510, CK_1510 | CK_310), | 724 | CLK(NULL, "bclk", &bclk_1510, CK_1510 | CK_310), |
diff --git a/arch/arm/mach-omap2/cclock44xx_data.c b/arch/arm/mach-omap2/cclock44xx_data.c index 3d58f335f173..0c6834ae1fc4 100644 --- a/arch/arm/mach-omap2/cclock44xx_data.c +++ b/arch/arm/mach-omap2/cclock44xx_data.c | |||
| @@ -52,6 +52,13 @@ | |||
| 52 | */ | 52 | */ |
| 53 | #define OMAP4_DPLL_ABE_DEFFREQ 98304000 | 53 | #define OMAP4_DPLL_ABE_DEFFREQ 98304000 |
| 54 | 54 | ||
| 55 | /* | ||
| 56 | * OMAP4 USB DPLL default frequency. In OMAP4430 TRM version V, section | ||
| 57 | * "3.6.3.9.5 DPLL_USB Preferred Settings" shows that the preferred | ||
| 58 | * locked frequency for the USB DPLL is 960MHz. | ||
| 59 | */ | ||
| 60 | #define OMAP4_DPLL_USB_DEFFREQ 960000000 | ||
| 61 | |||
| 55 | /* Root clocks */ | 62 | /* Root clocks */ |
| 56 | 63 | ||
| 57 | DEFINE_CLK_FIXED_RATE(extalt_clkin_ck, CLK_IS_ROOT, 59000000, 0x0); | 64 | DEFINE_CLK_FIXED_RATE(extalt_clkin_ck, CLK_IS_ROOT, 59000000, 0x0); |
| @@ -1011,6 +1018,10 @@ DEFINE_CLK_OMAP_MUX(hsmmc2_fclk, "l3_init_clkdm", hsmmc1_fclk_sel, | |||
| 1011 | OMAP4430_CM_L3INIT_MMC2_CLKCTRL, OMAP4430_CLKSEL_MASK, | 1018 | OMAP4430_CM_L3INIT_MMC2_CLKCTRL, OMAP4430_CLKSEL_MASK, |
| 1012 | hsmmc1_fclk_parents, func_dmic_abe_gfclk_ops); | 1019 | hsmmc1_fclk_parents, func_dmic_abe_gfclk_ops); |
| 1013 | 1020 | ||
| 1021 | DEFINE_CLK_GATE(ocp2scp_usb_phy_phy_48m, "func_48m_fclk", &func_48m_fclk, 0x0, | ||
| 1022 | OMAP4430_CM_L3INIT_USBPHYOCP2SCP_CLKCTRL, | ||
| 1023 | OMAP4430_OPTFCLKEN_PHY_48M_SHIFT, 0x0, NULL); | ||
| 1024 | |||
| 1014 | DEFINE_CLK_GATE(sha2md5_fck, "l3_div_ck", &l3_div_ck, 0x0, | 1025 | DEFINE_CLK_GATE(sha2md5_fck, "l3_div_ck", &l3_div_ck, 0x0, |
| 1015 | OMAP4430_CM_L4SEC_SHA2MD51_CLKCTRL, | 1026 | OMAP4430_CM_L4SEC_SHA2MD51_CLKCTRL, |
| 1016 | OMAP4430_MODULEMODE_SWCTRL_SHIFT, 0x0, NULL); | 1027 | OMAP4430_MODULEMODE_SWCTRL_SHIFT, 0x0, NULL); |
| @@ -1538,6 +1549,7 @@ static struct omap_clk omap44xx_clks[] = { | |||
| 1538 | CLK(NULL, "per_mcbsp4_gfclk", &per_mcbsp4_gfclk, CK_443X), | 1549 | CLK(NULL, "per_mcbsp4_gfclk", &per_mcbsp4_gfclk, CK_443X), |
| 1539 | CLK(NULL, "hsmmc1_fclk", &hsmmc1_fclk, CK_443X), | 1550 | CLK(NULL, "hsmmc1_fclk", &hsmmc1_fclk, CK_443X), |
| 1540 | CLK(NULL, "hsmmc2_fclk", &hsmmc2_fclk, CK_443X), | 1551 | CLK(NULL, "hsmmc2_fclk", &hsmmc2_fclk, CK_443X), |
| 1552 | CLK(NULL, "ocp2scp_usb_phy_phy_48m", &ocp2scp_usb_phy_phy_48m, CK_443X), | ||
| 1541 | CLK(NULL, "sha2md5_fck", &sha2md5_fck, CK_443X), | 1553 | CLK(NULL, "sha2md5_fck", &sha2md5_fck, CK_443X), |
| 1542 | CLK(NULL, "slimbus1_fclk_1", &slimbus1_fclk_1, CK_443X), | 1554 | CLK(NULL, "slimbus1_fclk_1", &slimbus1_fclk_1, CK_443X), |
| 1543 | CLK(NULL, "slimbus1_fclk_0", &slimbus1_fclk_0, CK_443X), | 1555 | CLK(NULL, "slimbus1_fclk_0", &slimbus1_fclk_0, CK_443X), |
| @@ -1705,5 +1717,13 @@ int __init omap4xxx_clk_init(void) | |||
| 1705 | if (rc) | 1717 | if (rc) |
| 1706 | pr_err("%s: failed to configure ABE DPLL!\n", __func__); | 1718 | pr_err("%s: failed to configure ABE DPLL!\n", __func__); |
| 1707 | 1719 | ||
| 1720 | /* | ||
| 1721 | * Lock USB DPLL on OMAP4 devices so that the L3INIT power | ||
| 1722 | * domain can transition to retention state when not in use. | ||
| 1723 | */ | ||
| 1724 | rc = clk_set_rate(&dpll_usb_ck, OMAP4_DPLL_USB_DEFFREQ); | ||
| 1725 | if (rc) | ||
| 1726 | pr_err("%s: failed to configure USB DPLL!\n", __func__); | ||
| 1727 | |||
| 1708 | return 0; | 1728 | return 0; |
| 1709 | } | 1729 | } |
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index c2c798c08c2b..a202a4785104 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c | |||
| @@ -1368,7 +1368,9 @@ static void _enable_sysc(struct omap_hwmod *oh) | |||
| 1368 | } | 1368 | } |
| 1369 | 1369 | ||
| 1370 | if (sf & SYSC_HAS_MIDLEMODE) { | 1370 | if (sf & SYSC_HAS_MIDLEMODE) { |
| 1371 | if (oh->flags & HWMOD_SWSUP_MSTANDBY) { | 1371 | if (oh->flags & HWMOD_FORCE_MSTANDBY) { |
| 1372 | idlemode = HWMOD_IDLEMODE_FORCE; | ||
| 1373 | } else if (oh->flags & HWMOD_SWSUP_MSTANDBY) { | ||
| 1372 | idlemode = HWMOD_IDLEMODE_NO; | 1374 | idlemode = HWMOD_IDLEMODE_NO; |
| 1373 | } else { | 1375 | } else { |
| 1374 | if (sf & SYSC_HAS_ENAWAKEUP) | 1376 | if (sf & SYSC_HAS_ENAWAKEUP) |
| @@ -1440,7 +1442,8 @@ static void _idle_sysc(struct omap_hwmod *oh) | |||
| 1440 | } | 1442 | } |
| 1441 | 1443 | ||
| 1442 | if (sf & SYSC_HAS_MIDLEMODE) { | 1444 | if (sf & SYSC_HAS_MIDLEMODE) { |
| 1443 | if (oh->flags & HWMOD_SWSUP_MSTANDBY) { | 1445 | if ((oh->flags & HWMOD_SWSUP_MSTANDBY) || |
| 1446 | (oh->flags & HWMOD_FORCE_MSTANDBY)) { | ||
| 1444 | idlemode = HWMOD_IDLEMODE_FORCE; | 1447 | idlemode = HWMOD_IDLEMODE_FORCE; |
| 1445 | } else { | 1448 | } else { |
| 1446 | if (sf & SYSC_HAS_ENAWAKEUP) | 1449 | if (sf & SYSC_HAS_ENAWAKEUP) |
diff --git a/arch/arm/mach-omap2/omap_hwmod.h b/arch/arm/mach-omap2/omap_hwmod.h index d43d9b608eda..d5dc935f6060 100644 --- a/arch/arm/mach-omap2/omap_hwmod.h +++ b/arch/arm/mach-omap2/omap_hwmod.h | |||
| @@ -427,8 +427,8 @@ struct omap_hwmod_omap4_prcm { | |||
| 427 | * | 427 | * |
| 428 | * HWMOD_SWSUP_SIDLE: omap_hwmod code should manually bring module in and out | 428 | * HWMOD_SWSUP_SIDLE: omap_hwmod code should manually bring module in and out |
| 429 | * of idle, rather than relying on module smart-idle | 429 | * of idle, rather than relying on module smart-idle |
| 430 | * HWMOD_SWSUP_MSTDBY: omap_hwmod code should manually bring module in and out | 430 | * HWMOD_SWSUP_MSTANDBY: omap_hwmod code should manually bring module in and |
| 431 | * of standby, rather than relying on module smart-standby | 431 | * out of standby, rather than relying on module smart-standby |
| 432 | * HWMOD_INIT_NO_RESET: don't reset this module at boot - important for | 432 | * HWMOD_INIT_NO_RESET: don't reset this module at boot - important for |
| 433 | * SDRAM controller, etc. XXX probably belongs outside the main hwmod file | 433 | * SDRAM controller, etc. XXX probably belongs outside the main hwmod file |
| 434 | * XXX Should be HWMOD_SETUP_NO_RESET | 434 | * XXX Should be HWMOD_SETUP_NO_RESET |
| @@ -459,6 +459,10 @@ struct omap_hwmod_omap4_prcm { | |||
| 459 | * correctly, or this is being abused to deal with some PM latency | 459 | * correctly, or this is being abused to deal with some PM latency |
| 460 | * issues -- but we're currently suffering from a shortage of | 460 | * issues -- but we're currently suffering from a shortage of |
| 461 | * folks who are able to track these issues down properly. | 461 | * folks who are able to track these issues down properly. |
| 462 | * HWMOD_FORCE_MSTANDBY: Always keep MIDLEMODE bits cleared so that device | ||
| 463 | * is kept in force-standby mode. Failing to do so causes PM problems | ||
| 464 | * with musb on OMAP3630 at least. Note that musb has a dedicated register | ||
| 465 | * to control MSTANDBY signal when MIDLEMODE is set to force-standby. | ||
| 462 | */ | 466 | */ |
| 463 | #define HWMOD_SWSUP_SIDLE (1 << 0) | 467 | #define HWMOD_SWSUP_SIDLE (1 << 0) |
| 464 | #define HWMOD_SWSUP_MSTANDBY (1 << 1) | 468 | #define HWMOD_SWSUP_MSTANDBY (1 << 1) |
| @@ -471,6 +475,7 @@ struct omap_hwmod_omap4_prcm { | |||
| 471 | #define HWMOD_16BIT_REG (1 << 8) | 475 | #define HWMOD_16BIT_REG (1 << 8) |
| 472 | #define HWMOD_EXT_OPT_MAIN_CLK (1 << 9) | 476 | #define HWMOD_EXT_OPT_MAIN_CLK (1 << 9) |
| 473 | #define HWMOD_BLOCK_WFI (1 << 10) | 477 | #define HWMOD_BLOCK_WFI (1 << 10) |
| 478 | #define HWMOD_FORCE_MSTANDBY (1 << 11) | ||
| 474 | 479 | ||
| 475 | /* | 480 | /* |
| 476 | * omap_hwmod._int_flags definitions | 481 | * omap_hwmod._int_flags definitions |
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index ac7e03ec952f..5112d04e7b79 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | |||
| @@ -1707,9 +1707,14 @@ static struct omap_hwmod omap3xxx_usbhsotg_hwmod = { | |||
| 1707 | * Erratum ID: i479 idle_req / idle_ack mechanism potentially | 1707 | * Erratum ID: i479 idle_req / idle_ack mechanism potentially |
| 1708 | * broken when autoidle is enabled | 1708 | * broken when autoidle is enabled |
| 1709 | * workaround is to disable the autoidle bit at module level. | 1709 | * workaround is to disable the autoidle bit at module level. |
| 1710 | * | ||
| 1711 | * Enabling the device in any other MIDLEMODE setting but force-idle | ||
| 1712 | * causes core_pwrdm not enter idle states at least on OMAP3630. | ||
| 1713 | * Note that musb has OTG_FORCESTDBY register that controls MSTANDBY | ||
| 1714 | * signal when MIDLEMODE is set to force-idle. | ||
| 1710 | */ | 1715 | */ |
| 1711 | .flags = HWMOD_NO_OCP_AUTOIDLE | HWMOD_SWSUP_SIDLE | 1716 | .flags = HWMOD_NO_OCP_AUTOIDLE | HWMOD_SWSUP_SIDLE |
| 1712 | | HWMOD_SWSUP_MSTANDBY, | 1717 | | HWMOD_FORCE_MSTANDBY, |
| 1713 | }; | 1718 | }; |
| 1714 | 1719 | ||
| 1715 | /* usb_otg_hs */ | 1720 | /* usb_otg_hs */ |
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index 0e47d2e1687c..9e0576569e07 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | |||
| @@ -2714,6 +2714,10 @@ static struct omap_ocp2scp_dev ocp2scp_dev_attr[] = { | |||
| 2714 | { } | 2714 | { } |
| 2715 | }; | 2715 | }; |
| 2716 | 2716 | ||
| 2717 | static struct omap_hwmod_opt_clk ocp2scp_usb_phy_opt_clks[] = { | ||
| 2718 | { .role = "48mhz", .clk = "ocp2scp_usb_phy_phy_48m" }, | ||
| 2719 | }; | ||
| 2720 | |||
| 2717 | /* ocp2scp_usb_phy */ | 2721 | /* ocp2scp_usb_phy */ |
| 2718 | static struct omap_hwmod omap44xx_ocp2scp_usb_phy_hwmod = { | 2722 | static struct omap_hwmod omap44xx_ocp2scp_usb_phy_hwmod = { |
| 2719 | .name = "ocp2scp_usb_phy", | 2723 | .name = "ocp2scp_usb_phy", |
| @@ -2728,6 +2732,8 @@ static struct omap_hwmod omap44xx_ocp2scp_usb_phy_hwmod = { | |||
| 2728 | }, | 2732 | }, |
| 2729 | }, | 2733 | }, |
| 2730 | .dev_attr = ocp2scp_dev_attr, | 2734 | .dev_attr = ocp2scp_dev_attr, |
| 2735 | .opt_clks = ocp2scp_usb_phy_opt_clks, | ||
| 2736 | .opt_clks_cnt = ARRAY_SIZE(ocp2scp_usb_phy_opt_clks), | ||
| 2731 | }; | 2737 | }; |
| 2732 | 2738 | ||
| 2733 | /* | 2739 | /* |
