diff options
| author | Sascha Hauer <s.hauer@pengutronix.de> | 2015-05-26 05:37:43 -0400 |
|---|---|---|
| committer | Matthias Brugger <matthias.bgg@gmail.com> | 2015-05-27 08:11:41 -0400 |
| commit | d71c11f3bd2bb0c09e3f08169f5b75dba4b800ea (patch) | |
| tree | b24297c4079d9702257f9fe766f98dd1ecf00e2e | |
| parent | b787f68c36d49bb1d9236f403813641efa74a031 (diff) | |
soc: mediatek: PMIC wrap: Fix clock rate handling
replace chipselect extension values based on SPI clock with hardcoded SoC
specific values.
The PMIC wrapper has the ability of extending the chipselects by configurable
amounts of time. We configured the values based on the rate of SPI clock, but
this is wrong. The delays should be configured based on the internal PMIC clock
that latches the values from the SPI bus to the internal PMIC registers. By
default this clock is 24MHz. Other clock frequencies are for debugging only
and can be removed from the driver.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
| -rw-r--r-- | drivers/soc/mediatek/mtk-pmic-wrap.c | 42 |
1 files changed, 7 insertions, 35 deletions
diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c index db5be1eec54c..642d6a1a2c43 100644 --- a/drivers/soc/mediatek/mtk-pmic-wrap.c +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c | |||
| @@ -563,45 +563,17 @@ static int pwrap_init_sidly(struct pmic_wrapper *wrp) | |||
| 563 | 563 | ||
| 564 | static int pwrap_init_reg_clock(struct pmic_wrapper *wrp) | 564 | static int pwrap_init_reg_clock(struct pmic_wrapper *wrp) |
| 565 | { | 565 | { |
| 566 | unsigned long rate_spi; | 566 | if (pwrap_is_mt8135(wrp)) { |
| 567 | int ck_mhz; | 567 | pwrap_writel(wrp, 0x4, PWRAP_CSHEXT); |
| 568 | |||
| 569 | rate_spi = clk_get_rate(wrp->clk_spi); | ||
| 570 | |||
| 571 | if (rate_spi > 26000000) | ||
| 572 | ck_mhz = 26; | ||
| 573 | else if (rate_spi > 18000000) | ||
| 574 | ck_mhz = 18; | ||
| 575 | else | ||
| 576 | ck_mhz = 0; | ||
| 577 | |||
| 578 | switch (ck_mhz) { | ||
| 579 | case 18: | ||
| 580 | if (pwrap_is_mt8135(wrp)) | ||
| 581 | pwrap_writel(wrp, 0xc, PWRAP_CSHEXT); | ||
| 582 | pwrap_writel(wrp, 0x4, PWRAP_CSHEXT_WRITE); | ||
| 583 | pwrap_writel(wrp, 0xc, PWRAP_CSHEXT_READ); | ||
| 584 | pwrap_writel(wrp, 0x0, PWRAP_CSLEXT_START); | ||
| 585 | pwrap_writel(wrp, 0x0, PWRAP_CSLEXT_END); | ||
| 586 | break; | ||
| 587 | case 26: | ||
| 588 | if (pwrap_is_mt8135(wrp)) | ||
| 589 | pwrap_writel(wrp, 0x4, PWRAP_CSHEXT); | ||
| 590 | pwrap_writel(wrp, 0x0, PWRAP_CSHEXT_WRITE); | 568 | pwrap_writel(wrp, 0x0, PWRAP_CSHEXT_WRITE); |
| 591 | pwrap_writel(wrp, 0x4, PWRAP_CSHEXT_READ); | 569 | pwrap_writel(wrp, 0x4, PWRAP_CSHEXT_READ); |
| 592 | pwrap_writel(wrp, 0x0, PWRAP_CSLEXT_START); | 570 | pwrap_writel(wrp, 0x0, PWRAP_CSLEXT_START); |
| 593 | pwrap_writel(wrp, 0x0, PWRAP_CSLEXT_END); | 571 | pwrap_writel(wrp, 0x0, PWRAP_CSLEXT_END); |
| 594 | break; | 572 | } else { |
| 595 | case 0: | 573 | pwrap_writel(wrp, 0x0, PWRAP_CSHEXT_WRITE); |
| 596 | if (pwrap_is_mt8135(wrp)) | 574 | pwrap_writel(wrp, 0x4, PWRAP_CSHEXT_READ); |
| 597 | pwrap_writel(wrp, 0xf, PWRAP_CSHEXT); | 575 | pwrap_writel(wrp, 0x2, PWRAP_CSLEXT_START); |
| 598 | pwrap_writel(wrp, 0xf, PWRAP_CSHEXT_WRITE); | 576 | pwrap_writel(wrp, 0x2, PWRAP_CSLEXT_END); |
| 599 | pwrap_writel(wrp, 0xf, PWRAP_CSHEXT_READ); | ||
| 600 | pwrap_writel(wrp, 0xf, PWRAP_CSLEXT_START); | ||
| 601 | pwrap_writel(wrp, 0xf, PWRAP_CSLEXT_END); | ||
| 602 | break; | ||
| 603 | default: | ||
| 604 | return -EINVAL; | ||
| 605 | } | 577 | } |
| 606 | 578 | ||
| 607 | return 0; | 579 | return 0; |