diff options
author | Matthijs Kooijman <matthijs@stdin.nl> | 2013-08-30 12:45:15 -0400 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2013-08-30 17:14:52 -0400 |
commit | d6ec53e04bf7906a0fffd8f272d89ab4e04c2cd5 (patch) | |
tree | a7b2507dc5a149e82cb76e42bfafec18c9fea055 | |
parent | 1c58ce133971e7159f51f331717a61632a2a3897 (diff) |
staging: dwc2: simplify register shift expressions
This commit changes expressions from (val >> shift) & (mask >> shift) to
(val & mask) >> shift.
Signed-off-by: Matthijs Kooijman <matthijs@stdin.nl>
Acked-by: Paul Zimmerman <paulz@synopsys.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r-- | drivers/staging/dwc2/core.c | 20 | ||||
-rw-r--r-- | drivers/staging/dwc2/hcd.c | 62 | ||||
-rw-r--r-- | drivers/staging/dwc2/hcd_ddma.c | 8 | ||||
-rw-r--r-- | drivers/staging/dwc2/hcd_intr.c | 22 |
4 files changed, 50 insertions, 62 deletions
diff --git a/drivers/staging/dwc2/core.c b/drivers/staging/dwc2/core.c index 9eabebbc16b8..04c251c82bc8 100644 --- a/drivers/staging/dwc2/core.c +++ b/drivers/staging/dwc2/core.c | |||
@@ -1386,14 +1386,14 @@ void dwc2_hc_start_transfer(struct dwc2_hsotg *hsotg, | |||
1386 | dev_vdbg(hsotg->dev, "%s: Channel %d\n", __func__, | 1386 | dev_vdbg(hsotg->dev, "%s: Channel %d\n", __func__, |
1387 | chan->hc_num); | 1387 | chan->hc_num); |
1388 | dev_vdbg(hsotg->dev, " Xfer Size: %d\n", | 1388 | dev_vdbg(hsotg->dev, " Xfer Size: %d\n", |
1389 | hctsiz >> TSIZ_XFERSIZE_SHIFT & | 1389 | (hctsiz & TSIZ_XFERSIZE_MASK) >> |
1390 | TSIZ_XFERSIZE_MASK >> TSIZ_XFERSIZE_SHIFT); | 1390 | TSIZ_XFERSIZE_SHIFT); |
1391 | dev_vdbg(hsotg->dev, " Num Pkts: %d\n", | 1391 | dev_vdbg(hsotg->dev, " Num Pkts: %d\n", |
1392 | hctsiz >> TSIZ_PKTCNT_SHIFT & | 1392 | (hctsiz & TSIZ_PKTCNT_MASK) >> |
1393 | TSIZ_PKTCNT_MASK >> TSIZ_PKTCNT_SHIFT); | 1393 | TSIZ_PKTCNT_SHIFT); |
1394 | dev_vdbg(hsotg->dev, " Start PID: %d\n", | 1394 | dev_vdbg(hsotg->dev, " Start PID: %d\n", |
1395 | hctsiz >> TSIZ_SC_MC_PID_SHIFT & | 1395 | (hctsiz & TSIZ_SC_MC_PID_MASK) >> |
1396 | TSIZ_SC_MC_PID_MASK >> TSIZ_SC_MC_PID_SHIFT); | 1396 | TSIZ_SC_MC_PID_SHIFT); |
1397 | } | 1397 | } |
1398 | 1398 | ||
1399 | if (hsotg->core_params->dma_enable > 0) { | 1399 | if (hsotg->core_params->dma_enable > 0) { |
@@ -1437,8 +1437,8 @@ void dwc2_hc_start_transfer(struct dwc2_hsotg *hsotg, | |||
1437 | 1437 | ||
1438 | if (dbg_hc(chan)) | 1438 | if (dbg_hc(chan)) |
1439 | dev_vdbg(hsotg->dev, " Multi Cnt: %d\n", | 1439 | dev_vdbg(hsotg->dev, " Multi Cnt: %d\n", |
1440 | hcchar >> HCCHAR_MULTICNT_SHIFT & | 1440 | (hcchar & HCCHAR_MULTICNT_MASK) >> |
1441 | HCCHAR_MULTICNT_MASK >> HCCHAR_MULTICNT_SHIFT); | 1441 | HCCHAR_MULTICNT_SHIFT); |
1442 | 1442 | ||
1443 | writel(hcchar, hsotg->regs + HCCHAR(chan->hc_num)); | 1443 | writel(hcchar, hsotg->regs + HCCHAR(chan->hc_num)); |
1444 | if (dbg_hc(chan)) | 1444 | if (dbg_hc(chan)) |
@@ -1526,8 +1526,8 @@ void dwc2_hc_start_transfer_ddma(struct dwc2_hsotg *hsotg, | |||
1526 | 1526 | ||
1527 | if (dbg_hc(chan)) | 1527 | if (dbg_hc(chan)) |
1528 | dev_vdbg(hsotg->dev, " Multi Cnt: %d\n", | 1528 | dev_vdbg(hsotg->dev, " Multi Cnt: %d\n", |
1529 | hcchar >> HCCHAR_MULTICNT_SHIFT & | 1529 | (hcchar & HCCHAR_MULTICNT_MASK) >> |
1530 | HCCHAR_MULTICNT_MASK >> HCCHAR_MULTICNT_SHIFT); | 1530 | HCCHAR_MULTICNT_SHIFT); |
1531 | 1531 | ||
1532 | writel(hcchar, hsotg->regs + HCCHAR(chan->hc_num)); | 1532 | writel(hcchar, hsotg->regs + HCCHAR(chan->hc_num)); |
1533 | if (dbg_hc(chan)) | 1533 | if (dbg_hc(chan)) |
diff --git a/drivers/staging/dwc2/hcd.c b/drivers/staging/dwc2/hcd.c index d48830414561..f11b4f098006 100644 --- a/drivers/staging/dwc2/hcd.c +++ b/drivers/staging/dwc2/hcd.c | |||
@@ -1005,10 +1005,10 @@ static void dwc2_process_periodic_channels(struct dwc2_hsotg *hsotg) | |||
1005 | dev_vdbg(hsotg->dev, "Queue periodic transactions\n"); | 1005 | dev_vdbg(hsotg->dev, "Queue periodic transactions\n"); |
1006 | 1006 | ||
1007 | tx_status = readl(hsotg->regs + HPTXSTS); | 1007 | tx_status = readl(hsotg->regs + HPTXSTS); |
1008 | qspcavail = tx_status >> TXSTS_QSPCAVAIL_SHIFT & | 1008 | qspcavail = (tx_status & TXSTS_QSPCAVAIL_MASK) >> |
1009 | TXSTS_QSPCAVAIL_MASK >> TXSTS_QSPCAVAIL_SHIFT; | 1009 | TXSTS_QSPCAVAIL_SHIFT; |
1010 | fspcavail = tx_status >> TXSTS_FSPCAVAIL_SHIFT & | 1010 | fspcavail = (tx_status & TXSTS_FSPCAVAIL_MASK) >> |
1011 | TXSTS_FSPCAVAIL_MASK >> TXSTS_FSPCAVAIL_SHIFT; | 1011 | TXSTS_FSPCAVAIL_SHIFT; |
1012 | 1012 | ||
1013 | if (dbg_perio()) { | 1013 | if (dbg_perio()) { |
1014 | dev_vdbg(hsotg->dev, " P Tx Req Queue Space Avail (before queue): %d\n", | 1014 | dev_vdbg(hsotg->dev, " P Tx Req Queue Space Avail (before queue): %d\n", |
@@ -1046,8 +1046,8 @@ static void dwc2_process_periodic_channels(struct dwc2_hsotg *hsotg) | |||
1046 | qh->channel->multi_count > 1) | 1046 | qh->channel->multi_count > 1) |
1047 | hsotg->queuing_high_bandwidth = 1; | 1047 | hsotg->queuing_high_bandwidth = 1; |
1048 | 1048 | ||
1049 | fspcavail = tx_status >> TXSTS_FSPCAVAIL_SHIFT & | 1049 | fspcavail = (tx_status & TXSTS_FSPCAVAIL_MASK) >> |
1050 | TXSTS_FSPCAVAIL_MASK >> TXSTS_FSPCAVAIL_SHIFT; | 1050 | TXSTS_FSPCAVAIL_SHIFT; |
1051 | status = dwc2_queue_transaction(hsotg, qh->channel, fspcavail); | 1051 | status = dwc2_queue_transaction(hsotg, qh->channel, fspcavail); |
1052 | if (status < 0) { | 1052 | if (status < 0) { |
1053 | no_fifo_space = 1; | 1053 | no_fifo_space = 1; |
@@ -1078,10 +1078,10 @@ static void dwc2_process_periodic_channels(struct dwc2_hsotg *hsotg) | |||
1078 | 1078 | ||
1079 | if (hsotg->core_params->dma_enable <= 0) { | 1079 | if (hsotg->core_params->dma_enable <= 0) { |
1080 | tx_status = readl(hsotg->regs + HPTXSTS); | 1080 | tx_status = readl(hsotg->regs + HPTXSTS); |
1081 | qspcavail = tx_status >> TXSTS_QSPCAVAIL_SHIFT & | 1081 | qspcavail = (tx_status & TXSTS_QSPCAVAIL_MASK) >> |
1082 | TXSTS_QSPCAVAIL_MASK >> TXSTS_QSPCAVAIL_SHIFT; | 1082 | TXSTS_QSPCAVAIL_SHIFT; |
1083 | fspcavail = tx_status >> TXSTS_FSPCAVAIL_SHIFT & | 1083 | fspcavail = (tx_status & TXSTS_FSPCAVAIL_MASK) >> |
1084 | TXSTS_FSPCAVAIL_MASK >> TXSTS_FSPCAVAIL_SHIFT; | 1084 | TXSTS_FSPCAVAIL_SHIFT; |
1085 | if (dbg_perio()) { | 1085 | if (dbg_perio()) { |
1086 | dev_vdbg(hsotg->dev, | 1086 | dev_vdbg(hsotg->dev, |
1087 | " P Tx Req Queue Space Avail (after queue): %d\n", | 1087 | " P Tx Req Queue Space Avail (after queue): %d\n", |
@@ -1143,10 +1143,10 @@ static void dwc2_process_non_periodic_channels(struct dwc2_hsotg *hsotg) | |||
1143 | dev_vdbg(hsotg->dev, "Queue non-periodic transactions\n"); | 1143 | dev_vdbg(hsotg->dev, "Queue non-periodic transactions\n"); |
1144 | 1144 | ||
1145 | tx_status = readl(hsotg->regs + GNPTXSTS); | 1145 | tx_status = readl(hsotg->regs + GNPTXSTS); |
1146 | qspcavail = tx_status >> TXSTS_QSPCAVAIL_SHIFT & | 1146 | qspcavail = (tx_status & TXSTS_QSPCAVAIL_MASK) >> |
1147 | TXSTS_QSPCAVAIL_MASK >> TXSTS_QSPCAVAIL_SHIFT; | 1147 | TXSTS_QSPCAVAIL_SHIFT; |
1148 | fspcavail = tx_status >> TXSTS_FSPCAVAIL_SHIFT & | 1148 | fspcavail = (tx_status & TXSTS_FSPCAVAIL_MASK) >> |
1149 | TXSTS_FSPCAVAIL_MASK >> TXSTS_FSPCAVAIL_SHIFT; | 1149 | TXSTS_FSPCAVAIL_SHIFT; |
1150 | dev_vdbg(hsotg->dev, " NP Tx Req Queue Space Avail (before queue): %d\n", | 1150 | dev_vdbg(hsotg->dev, " NP Tx Req Queue Space Avail (before queue): %d\n", |
1151 | qspcavail); | 1151 | qspcavail); |
1152 | dev_vdbg(hsotg->dev, " NP Tx FIFO Space Avail (before queue): %d\n", | 1152 | dev_vdbg(hsotg->dev, " NP Tx FIFO Space Avail (before queue): %d\n", |
@@ -1166,8 +1166,8 @@ static void dwc2_process_non_periodic_channels(struct dwc2_hsotg *hsotg) | |||
1166 | */ | 1166 | */ |
1167 | do { | 1167 | do { |
1168 | tx_status = readl(hsotg->regs + GNPTXSTS); | 1168 | tx_status = readl(hsotg->regs + GNPTXSTS); |
1169 | qspcavail = tx_status >> TXSTS_QSPCAVAIL_SHIFT & | 1169 | qspcavail = (tx_status & TXSTS_QSPCAVAIL_MASK) >> |
1170 | TXSTS_QSPCAVAIL_MASK >> TXSTS_QSPCAVAIL_SHIFT; | 1170 | TXSTS_QSPCAVAIL_SHIFT; |
1171 | if (hsotg->core_params->dma_enable <= 0 && qspcavail == 0) { | 1171 | if (hsotg->core_params->dma_enable <= 0 && qspcavail == 0) { |
1172 | no_queue_space = 1; | 1172 | no_queue_space = 1; |
1173 | break; | 1173 | break; |
@@ -1182,8 +1182,8 @@ static void dwc2_process_non_periodic_channels(struct dwc2_hsotg *hsotg) | |||
1182 | if (qh->tt_buffer_dirty) | 1182 | if (qh->tt_buffer_dirty) |
1183 | goto next; | 1183 | goto next; |
1184 | 1184 | ||
1185 | fspcavail = tx_status >> TXSTS_FSPCAVAIL_SHIFT & | 1185 | fspcavail = (tx_status & TXSTS_FSPCAVAIL_MASK) >> |
1186 | TXSTS_FSPCAVAIL_MASK >> TXSTS_FSPCAVAIL_SHIFT; | 1186 | TXSTS_FSPCAVAIL_SHIFT; |
1187 | status = dwc2_queue_transaction(hsotg, qh->channel, fspcavail); | 1187 | status = dwc2_queue_transaction(hsotg, qh->channel, fspcavail); |
1188 | 1188 | ||
1189 | if (status > 0) { | 1189 | if (status > 0) { |
@@ -1203,10 +1203,10 @@ next: | |||
1203 | 1203 | ||
1204 | if (hsotg->core_params->dma_enable <= 0) { | 1204 | if (hsotg->core_params->dma_enable <= 0) { |
1205 | tx_status = readl(hsotg->regs + GNPTXSTS); | 1205 | tx_status = readl(hsotg->regs + GNPTXSTS); |
1206 | qspcavail = tx_status >> TXSTS_QSPCAVAIL_SHIFT & | 1206 | qspcavail = (tx_status & TXSTS_QSPCAVAIL_MASK) >> |
1207 | TXSTS_QSPCAVAIL_MASK >> TXSTS_QSPCAVAIL_SHIFT; | 1207 | TXSTS_QSPCAVAIL_SHIFT; |
1208 | fspcavail = tx_status >> TXSTS_FSPCAVAIL_SHIFT & | 1208 | fspcavail = (tx_status & TXSTS_FSPCAVAIL_MASK) >> |
1209 | TXSTS_FSPCAVAIL_MASK >> TXSTS_FSPCAVAIL_SHIFT; | 1209 | TXSTS_FSPCAVAIL_SHIFT; |
1210 | dev_vdbg(hsotg->dev, | 1210 | dev_vdbg(hsotg->dev, |
1211 | " NP Tx Req Queue Space Avail (after queue): %d\n", | 1211 | " NP Tx Req Queue Space Avail (after queue): %d\n", |
1212 | qspcavail); | 1212 | qspcavail); |
@@ -1761,11 +1761,9 @@ int dwc2_hcd_get_frame_number(struct dwc2_hsotg *hsotg) | |||
1761 | 1761 | ||
1762 | #ifdef DWC2_DEBUG_SOF | 1762 | #ifdef DWC2_DEBUG_SOF |
1763 | dev_vdbg(hsotg->dev, "DWC OTG HCD GET FRAME NUMBER %d\n", | 1763 | dev_vdbg(hsotg->dev, "DWC OTG HCD GET FRAME NUMBER %d\n", |
1764 | hfnum >> HFNUM_FRNUM_SHIFT & | 1764 | (hfnum & HFNUM_FRNUM_MASK) >> HFNUM_FRNUM_SHIFT); |
1765 | HFNUM_FRNUM_MASK >> HFNUM_FRNUM_SHIFT); | ||
1766 | #endif | 1765 | #endif |
1767 | return hfnum >> HFNUM_FRNUM_SHIFT & | 1766 | return (hfnum & HFNUM_FRNUM_MASK) >> HFNUM_FRNUM_SHIFT; |
1768 | HFNUM_FRNUM_MASK >> HFNUM_FRNUM_SHIFT; | ||
1769 | } | 1767 | } |
1770 | 1768 | ||
1771 | int dwc2_hcd_is_b_host(struct dwc2_hsotg *hsotg) | 1769 | int dwc2_hcd_is_b_host(struct dwc2_hsotg *hsotg) |
@@ -1916,18 +1914,14 @@ void dwc2_hcd_dump_state(struct dwc2_hsotg *hsotg) | |||
1916 | dev_dbg(hsotg->dev, " periodic_usecs: %d\n", hsotg->periodic_usecs); | 1914 | dev_dbg(hsotg->dev, " periodic_usecs: %d\n", hsotg->periodic_usecs); |
1917 | np_tx_status = readl(hsotg->regs + GNPTXSTS); | 1915 | np_tx_status = readl(hsotg->regs + GNPTXSTS); |
1918 | dev_dbg(hsotg->dev, " NP Tx Req Queue Space Avail: %d\n", | 1916 | dev_dbg(hsotg->dev, " NP Tx Req Queue Space Avail: %d\n", |
1919 | np_tx_status >> TXSTS_QSPCAVAIL_SHIFT & | 1917 | (np_tx_status & TXSTS_QSPCAVAIL_MASK) >> TXSTS_QSPCAVAIL_SHIFT); |
1920 | TXSTS_QSPCAVAIL_MASK >> TXSTS_QSPCAVAIL_SHIFT); | ||
1921 | dev_dbg(hsotg->dev, " NP Tx FIFO Space Avail: %d\n", | 1918 | dev_dbg(hsotg->dev, " NP Tx FIFO Space Avail: %d\n", |
1922 | np_tx_status >> TXSTS_FSPCAVAIL_SHIFT & | 1919 | (np_tx_status & TXSTS_FSPCAVAIL_MASK) >> TXSTS_FSPCAVAIL_SHIFT); |
1923 | TXSTS_FSPCAVAIL_MASK >> TXSTS_FSPCAVAIL_SHIFT); | ||
1924 | p_tx_status = readl(hsotg->regs + HPTXSTS); | 1920 | p_tx_status = readl(hsotg->regs + HPTXSTS); |
1925 | dev_dbg(hsotg->dev, " P Tx Req Queue Space Avail: %d\n", | 1921 | dev_dbg(hsotg->dev, " P Tx Req Queue Space Avail: %d\n", |
1926 | p_tx_status >> TXSTS_QSPCAVAIL_SHIFT & | 1922 | (p_tx_status & TXSTS_QSPCAVAIL_MASK) >> TXSTS_QSPCAVAIL_SHIFT); |
1927 | TXSTS_QSPCAVAIL_MASK >> TXSTS_QSPCAVAIL_SHIFT); | ||
1928 | dev_dbg(hsotg->dev, " P Tx FIFO Space Avail: %d\n", | 1923 | dev_dbg(hsotg->dev, " P Tx FIFO Space Avail: %d\n", |
1929 | p_tx_status >> TXSTS_FSPCAVAIL_SHIFT & | 1924 | (p_tx_status & TXSTS_FSPCAVAIL_MASK) >> TXSTS_FSPCAVAIL_SHIFT); |
1930 | TXSTS_FSPCAVAIL_MASK >> TXSTS_FSPCAVAIL_SHIFT); | ||
1931 | dwc2_hcd_dump_frrem(hsotg); | 1925 | dwc2_hcd_dump_frrem(hsotg); |
1932 | dwc2_dump_global_registers(hsotg); | 1926 | dwc2_dump_global_registers(hsotg); |
1933 | dwc2_dump_host_registers(hsotg); | 1927 | dwc2_dump_host_registers(hsotg); |
diff --git a/drivers/staging/dwc2/hcd_ddma.c b/drivers/staging/dwc2/hcd_ddma.c index de5af1b9b5d9..69070f4442a8 100644 --- a/drivers/staging/dwc2/hcd_ddma.c +++ b/drivers/staging/dwc2/hcd_ddma.c | |||
@@ -806,8 +806,8 @@ static int dwc2_cmpl_host_isoc_dma_desc(struct dwc2_hsotg *hsotg, | |||
806 | frame_desc = &qtd->urb->iso_descs[qtd->isoc_frame_index_last]; | 806 | frame_desc = &qtd->urb->iso_descs[qtd->isoc_frame_index_last]; |
807 | dma_desc->buf = (u32)(qtd->urb->dma + frame_desc->offset); | 807 | dma_desc->buf = (u32)(qtd->urb->dma + frame_desc->offset); |
808 | if (chan->ep_is_in) | 808 | if (chan->ep_is_in) |
809 | remain = dma_desc->status >> HOST_DMA_ISOC_NBYTES_SHIFT & | 809 | remain = (dma_desc->status & HOST_DMA_ISOC_NBYTES_MASK) >> |
810 | HOST_DMA_ISOC_NBYTES_MASK >> HOST_DMA_ISOC_NBYTES_SHIFT; | 810 | HOST_DMA_ISOC_NBYTES_SHIFT; |
811 | 811 | ||
812 | if ((dma_desc->status & HOST_DMA_STS_MASK) == HOST_DMA_STS_PKTERR) { | 812 | if ((dma_desc->status & HOST_DMA_STS_MASK) == HOST_DMA_STS_PKTERR) { |
813 | /* | 813 | /* |
@@ -935,8 +935,8 @@ static int dwc2_update_non_isoc_urb_state_ddma(struct dwc2_hsotg *hsotg, | |||
935 | u16 remain = 0; | 935 | u16 remain = 0; |
936 | 936 | ||
937 | if (chan->ep_is_in) | 937 | if (chan->ep_is_in) |
938 | remain = dma_desc->status >> HOST_DMA_NBYTES_SHIFT & | 938 | remain = (dma_desc->status & HOST_DMA_NBYTES_MASK) >> |
939 | HOST_DMA_NBYTES_MASK >> HOST_DMA_NBYTES_SHIFT; | 939 | HOST_DMA_NBYTES_SHIFT; |
940 | 940 | ||
941 | dev_vdbg(hsotg->dev, "remain=%d dwc2_urb=%p\n", remain, urb); | 941 | dev_vdbg(hsotg->dev, "remain=%d dwc2_urb=%p\n", remain, urb); |
942 | 942 | ||
diff --git a/drivers/staging/dwc2/hcd_intr.c b/drivers/staging/dwc2/hcd_intr.c index f53f98e5ec52..f60b836b3d13 100644 --- a/drivers/staging/dwc2/hcd_intr.c +++ b/drivers/staging/dwc2/hcd_intr.c | |||
@@ -165,18 +165,15 @@ static void dwc2_rx_fifo_level_intr(struct dwc2_hsotg *hsotg) | |||
165 | dev_vdbg(hsotg->dev, "--RxFIFO Level Interrupt--\n"); | 165 | dev_vdbg(hsotg->dev, "--RxFIFO Level Interrupt--\n"); |
166 | 166 | ||
167 | grxsts = readl(hsotg->regs + GRXSTSP); | 167 | grxsts = readl(hsotg->regs + GRXSTSP); |
168 | chnum = grxsts >> GRXSTS_HCHNUM_SHIFT & | 168 | chnum = (grxsts & GRXSTS_HCHNUM_MASK) >> GRXSTS_HCHNUM_SHIFT; |
169 | GRXSTS_HCHNUM_MASK >> GRXSTS_HCHNUM_SHIFT; | ||
170 | chan = hsotg->hc_ptr_array[chnum]; | 169 | chan = hsotg->hc_ptr_array[chnum]; |
171 | if (!chan) { | 170 | if (!chan) { |
172 | dev_err(hsotg->dev, "Unable to get corresponding channel\n"); | 171 | dev_err(hsotg->dev, "Unable to get corresponding channel\n"); |
173 | return; | 172 | return; |
174 | } | 173 | } |
175 | 174 | ||
176 | bcnt = grxsts >> GRXSTS_BYTECNT_SHIFT & | 175 | bcnt = (grxsts & GRXSTS_BYTECNT_MASK) >> GRXSTS_BYTECNT_SHIFT; |
177 | GRXSTS_BYTECNT_MASK >> GRXSTS_BYTECNT_SHIFT; | 176 | dpid = (grxsts & GRXSTS_DPID_MASK) >> GRXSTS_DPID_SHIFT; |
178 | dpid = grxsts >> GRXSTS_DPID_SHIFT & | ||
179 | GRXSTS_DPID_MASK >> GRXSTS_DPID_SHIFT; | ||
180 | pktsts = (grxsts & GRXSTS_PKTSTS_MASK) >> GRXSTS_PKTSTS_SHIFT; | 177 | pktsts = (grxsts & GRXSTS_PKTSTS_MASK) >> GRXSTS_PKTSTS_SHIFT; |
181 | 178 | ||
182 | /* Packet Status */ | 179 | /* Packet Status */ |
@@ -412,8 +409,8 @@ static u32 dwc2_get_actual_xfer_length(struct dwc2_hsotg *hsotg, | |||
412 | 409 | ||
413 | if (halt_status == DWC2_HC_XFER_COMPLETE) { | 410 | if (halt_status == DWC2_HC_XFER_COMPLETE) { |
414 | if (chan->ep_is_in) { | 411 | if (chan->ep_is_in) { |
415 | count = hctsiz >> TSIZ_XFERSIZE_SHIFT & | 412 | count = (hctsiz & TSIZ_XFERSIZE_MASK) >> |
416 | TSIZ_XFERSIZE_MASK >> TSIZ_XFERSIZE_SHIFT; | 413 | TSIZ_XFERSIZE_SHIFT; |
417 | length = chan->xfer_len - count; | 414 | length = chan->xfer_len - count; |
418 | if (short_read != NULL) | 415 | if (short_read != NULL) |
419 | *short_read = (count != 0); | 416 | *short_read = (count != 0); |
@@ -432,8 +429,7 @@ static u32 dwc2_get_actual_xfer_length(struct dwc2_hsotg *hsotg, | |||
432 | * hctsiz.xfersize field because that reflects the number of | 429 | * hctsiz.xfersize field because that reflects the number of |
433 | * bytes transferred via the AHB, not the USB). | 430 | * bytes transferred via the AHB, not the USB). |
434 | */ | 431 | */ |
435 | count = hctsiz >> TSIZ_PKTCNT_SHIFT & | 432 | count = (hctsiz & TSIZ_PKTCNT_MASK) >> TSIZ_PKTCNT_SHIFT; |
436 | TSIZ_PKTCNT_MASK >> TSIZ_PKTCNT_SHIFT; | ||
437 | length = (chan->start_pkt_count - count) * chan->max_packet; | 433 | length = (chan->start_pkt_count - count) * chan->max_packet; |
438 | } | 434 | } |
439 | 435 | ||
@@ -496,8 +492,7 @@ static int dwc2_update_urb_state(struct dwc2_hsotg *hsotg, | |||
496 | __func__, (chan->ep_is_in ? "IN" : "OUT"), chnum); | 492 | __func__, (chan->ep_is_in ? "IN" : "OUT"), chnum); |
497 | dev_vdbg(hsotg->dev, " chan->xfer_len %d\n", chan->xfer_len); | 493 | dev_vdbg(hsotg->dev, " chan->xfer_len %d\n", chan->xfer_len); |
498 | dev_vdbg(hsotg->dev, " hctsiz.xfersize %d\n", | 494 | dev_vdbg(hsotg->dev, " hctsiz.xfersize %d\n", |
499 | hctsiz >> TSIZ_XFERSIZE_SHIFT & | 495 | (hctsiz & TSIZ_XFERSIZE_MASK) >> TSIZ_XFERSIZE_SHIFT); |
500 | TSIZ_XFERSIZE_MASK >> TSIZ_XFERSIZE_SHIFT); | ||
501 | dev_vdbg(hsotg->dev, " urb->transfer_buffer_length %d\n", urb->length); | 496 | dev_vdbg(hsotg->dev, " urb->transfer_buffer_length %d\n", urb->length); |
502 | dev_vdbg(hsotg->dev, " urb->actual_length %d\n", urb->actual_length); | 497 | dev_vdbg(hsotg->dev, " urb->actual_length %d\n", urb->actual_length); |
503 | dev_vdbg(hsotg->dev, " short_read %d, xfer_done %d\n", short_read, | 498 | dev_vdbg(hsotg->dev, " short_read %d, xfer_done %d\n", short_read, |
@@ -1182,8 +1177,7 @@ static void dwc2_update_urb_state_abn(struct dwc2_hsotg *hsotg, | |||
1182 | dev_vdbg(hsotg->dev, " chan->start_pkt_count %d\n", | 1177 | dev_vdbg(hsotg->dev, " chan->start_pkt_count %d\n", |
1183 | chan->start_pkt_count); | 1178 | chan->start_pkt_count); |
1184 | dev_vdbg(hsotg->dev, " hctsiz.pktcnt %d\n", | 1179 | dev_vdbg(hsotg->dev, " hctsiz.pktcnt %d\n", |
1185 | hctsiz >> TSIZ_PKTCNT_SHIFT & | 1180 | (hctsiz & TSIZ_PKTCNT_MASK) >> TSIZ_PKTCNT_SHIFT); |
1186 | TSIZ_PKTCNT_MASK >> TSIZ_PKTCNT_SHIFT); | ||
1187 | dev_vdbg(hsotg->dev, " chan->max_packet %d\n", chan->max_packet); | 1181 | dev_vdbg(hsotg->dev, " chan->max_packet %d\n", chan->max_packet); |
1188 | dev_vdbg(hsotg->dev, " bytes_transferred %d\n", | 1182 | dev_vdbg(hsotg->dev, " bytes_transferred %d\n", |
1189 | xfer_length); | 1183 | xfer_length); |