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authorDave Airlie <airlied@gmail.com>2014-03-02 18:04:41 -0500
committerDave Airlie <airlied@gmail.com>2014-03-02 18:04:41 -0500
commitd668ca1cc6b9b6d2f1ce2f7b158cbe919cc782dc (patch)
treedaa81aecf4eefc864ba9589ca095c491029dad3f
parent49e893b5975102e30be1bf79e002a754f3bf6da8 (diff)
parent3803c8e5b50946dd6bc18972d9190757d05648f0 (diff)
Merge branch 'drm-fixes-3.14' of git://people.freedesktop.org/~agd5f/linux into drm-fixes
more radeon fixes * 'drm-fixes-3.14' of git://people.freedesktop.org/~agd5f/linux: drm/radeon: enable speaker allocation setup on dce3.2 drm/radeon: change audio enable logic drm/radeon: fix audio disable on dce6+ drm/radeon: free uvd ring on unload drm/radeon: disable pll sharing for DP on DCE4.1 drm/radeon: fix missing bo reservation drm/radeon: print the supported atpx function mask
-rw-r--r--drivers/gpu/drm/radeon/atombios_crtc.c16
-rw-r--r--drivers/gpu/drm/radeon/dce6_afmt.c15
-rw-r--r--drivers/gpu/drm/radeon/evergreen.c2
-rw-r--r--drivers/gpu/drm/radeon/evergreen_hdmi.c26
-rw-r--r--drivers/gpu/drm/radeon/r600_audio.c14
-rw-r--r--drivers/gpu/drm/radeon/r600_hdmi.c15
-rw-r--r--drivers/gpu/drm/radeon/radeon.h6
-rw-r--r--drivers/gpu/drm/radeon/radeon_atpx_handler.c3
-rw-r--r--drivers/gpu/drm/radeon/radeon_kms.c6
-rw-r--r--drivers/gpu/drm/radeon/radeon_uvd.c2
-rw-r--r--drivers/gpu/drm/radeon/rv770.c2
11 files changed, 72 insertions, 35 deletions
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c
index 0d19f4f94d5a..daa4dd375ab1 100644
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -1774,6 +1774,20 @@ static int radeon_atom_pick_pll(struct drm_crtc *crtc)
1774 return ATOM_PPLL1; 1774 return ATOM_PPLL1;
1775 DRM_ERROR("unable to allocate a PPLL\n"); 1775 DRM_ERROR("unable to allocate a PPLL\n");
1776 return ATOM_PPLL_INVALID; 1776 return ATOM_PPLL_INVALID;
1777 } else if (ASIC_IS_DCE41(rdev)) {
1778 /* Don't share PLLs on DCE4.1 chips */
1779 if (ENCODER_MODE_IS_DP(atombios_get_encoder_mode(radeon_crtc->encoder))) {
1780 if (rdev->clock.dp_extclk)
1781 /* skip PPLL programming if using ext clock */
1782 return ATOM_PPLL_INVALID;
1783 }
1784 pll_in_use = radeon_get_pll_use_mask(crtc);
1785 if (!(pll_in_use & (1 << ATOM_PPLL1)))
1786 return ATOM_PPLL1;
1787 if (!(pll_in_use & (1 << ATOM_PPLL2)))
1788 return ATOM_PPLL2;
1789 DRM_ERROR("unable to allocate a PPLL\n");
1790 return ATOM_PPLL_INVALID;
1777 } else if (ASIC_IS_DCE4(rdev)) { 1791 } else if (ASIC_IS_DCE4(rdev)) {
1778 /* in DP mode, the DP ref clock can come from PPLL, DCPLL, or ext clock, 1792 /* in DP mode, the DP ref clock can come from PPLL, DCPLL, or ext clock,
1779 * depending on the asic: 1793 * depending on the asic:
@@ -1801,7 +1815,7 @@ static int radeon_atom_pick_pll(struct drm_crtc *crtc)
1801 if (pll != ATOM_PPLL_INVALID) 1815 if (pll != ATOM_PPLL_INVALID)
1802 return pll; 1816 return pll;
1803 } 1817 }
1804 } else if (!ASIC_IS_DCE41(rdev)) { /* Don't share PLLs on DCE4.1 chips */ 1818 } else {
1805 /* use the same PPLL for all monitors with the same clock */ 1819 /* use the same PPLL for all monitors with the same clock */
1806 pll = radeon_get_shared_nondp_ppll(crtc); 1820 pll = radeon_get_shared_nondp_ppll(crtc);
1807 if (pll != ATOM_PPLL_INVALID) 1821 if (pll != ATOM_PPLL_INVALID)
diff --git a/drivers/gpu/drm/radeon/dce6_afmt.c b/drivers/gpu/drm/radeon/dce6_afmt.c
index 713a5d359901..94e858751994 100644
--- a/drivers/gpu/drm/radeon/dce6_afmt.c
+++ b/drivers/gpu/drm/radeon/dce6_afmt.c
@@ -278,13 +278,15 @@ static int dce6_audio_chipset_supported(struct radeon_device *rdev)
278 return !ASIC_IS_NODCE(rdev); 278 return !ASIC_IS_NODCE(rdev);
279} 279}
280 280
281static void dce6_audio_enable(struct radeon_device *rdev, 281void dce6_audio_enable(struct radeon_device *rdev,
282 struct r600_audio_pin *pin, 282 struct r600_audio_pin *pin,
283 bool enable) 283 bool enable)
284{ 284{
285 if (!pin)
286 return;
287
285 WREG32_ENDPOINT(pin->offset, AZ_F0_CODEC_PIN_CONTROL_HOTPLUG_CONTROL, 288 WREG32_ENDPOINT(pin->offset, AZ_F0_CODEC_PIN_CONTROL_HOTPLUG_CONTROL,
286 AUDIO_ENABLED); 289 enable ? AUDIO_ENABLED : 0);
287 DRM_INFO("%s audio %d support\n", enable ? "Enabling" : "Disabling", pin->id);
288} 290}
289 291
290static const u32 pin_offsets[7] = 292static const u32 pin_offsets[7] =
@@ -323,7 +325,8 @@ int dce6_audio_init(struct radeon_device *rdev)
323 rdev->audio.pin[i].connected = false; 325 rdev->audio.pin[i].connected = false;
324 rdev->audio.pin[i].offset = pin_offsets[i]; 326 rdev->audio.pin[i].offset = pin_offsets[i];
325 rdev->audio.pin[i].id = i; 327 rdev->audio.pin[i].id = i;
326 dce6_audio_enable(rdev, &rdev->audio.pin[i], true); 328 /* disable audio. it will be set up later */
329 dce6_audio_enable(rdev, &rdev->audio.pin[i], false);
327 } 330 }
328 331
329 return 0; 332 return 0;
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index 5623e7542d99..8a2c010b7dc5 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -5475,9 +5475,9 @@ void evergreen_fini(struct radeon_device *rdev)
5475 radeon_wb_fini(rdev); 5475 radeon_wb_fini(rdev);
5476 radeon_ib_pool_fini(rdev); 5476 radeon_ib_pool_fini(rdev);
5477 radeon_irq_kms_fini(rdev); 5477 radeon_irq_kms_fini(rdev);
5478 evergreen_pcie_gart_fini(rdev);
5479 uvd_v1_0_fini(rdev); 5478 uvd_v1_0_fini(rdev);
5480 radeon_uvd_fini(rdev); 5479 radeon_uvd_fini(rdev);
5480 evergreen_pcie_gart_fini(rdev);
5481 r600_vram_scratch_fini(rdev); 5481 r600_vram_scratch_fini(rdev);
5482 radeon_gem_fini(rdev); 5482 radeon_gem_fini(rdev);
5483 radeon_fence_driver_fini(rdev); 5483 radeon_fence_driver_fini(rdev);
diff --git a/drivers/gpu/drm/radeon/evergreen_hdmi.c b/drivers/gpu/drm/radeon/evergreen_hdmi.c
index 0c6d5cef4cf1..05b0c95813fd 100644
--- a/drivers/gpu/drm/radeon/evergreen_hdmi.c
+++ b/drivers/gpu/drm/radeon/evergreen_hdmi.c
@@ -306,6 +306,15 @@ void evergreen_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode
306 return; 306 return;
307 offset = dig->afmt->offset; 307 offset = dig->afmt->offset;
308 308
309 /* disable audio prior to setting up hw */
310 if (ASIC_IS_DCE6(rdev)) {
311 dig->afmt->pin = dce6_audio_get_pin(rdev);
312 dce6_audio_enable(rdev, dig->afmt->pin, false);
313 } else {
314 dig->afmt->pin = r600_audio_get_pin(rdev);
315 r600_audio_enable(rdev, dig->afmt->pin, false);
316 }
317
309 evergreen_audio_set_dto(encoder, mode->clock); 318 evergreen_audio_set_dto(encoder, mode->clock);
310 319
311 WREG32(HDMI_VBI_PACKET_CONTROL + offset, 320 WREG32(HDMI_VBI_PACKET_CONTROL + offset,
@@ -409,12 +418,16 @@ void evergreen_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode
409 WREG32(AFMT_RAMP_CONTROL1 + offset, 0x007FFFFF); 418 WREG32(AFMT_RAMP_CONTROL1 + offset, 0x007FFFFF);
410 WREG32(AFMT_RAMP_CONTROL2 + offset, 0x00000001); 419 WREG32(AFMT_RAMP_CONTROL2 + offset, 0x00000001);
411 WREG32(AFMT_RAMP_CONTROL3 + offset, 0x00000001); 420 WREG32(AFMT_RAMP_CONTROL3 + offset, 0x00000001);
421
422 /* enable audio after to setting up hw */
423 if (ASIC_IS_DCE6(rdev))
424 dce6_audio_enable(rdev, dig->afmt->pin, true);
425 else
426 r600_audio_enable(rdev, dig->afmt->pin, true);
412} 427}
413 428
414void evergreen_hdmi_enable(struct drm_encoder *encoder, bool enable) 429void evergreen_hdmi_enable(struct drm_encoder *encoder, bool enable)
415{ 430{
416 struct drm_device *dev = encoder->dev;
417 struct radeon_device *rdev = dev->dev_private;
418 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 431 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
419 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 432 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
420 433
@@ -427,15 +440,6 @@ void evergreen_hdmi_enable(struct drm_encoder *encoder, bool enable)
427 if (!enable && !dig->afmt->enabled) 440 if (!enable && !dig->afmt->enabled)
428 return; 441 return;
429 442
430 if (enable) {
431 if (ASIC_IS_DCE6(rdev))
432 dig->afmt->pin = dce6_audio_get_pin(rdev);
433 else
434 dig->afmt->pin = r600_audio_get_pin(rdev);
435 } else {
436 dig->afmt->pin = NULL;
437 }
438
439 dig->afmt->enabled = enable; 443 dig->afmt->enabled = enable;
440 444
441 DRM_DEBUG("%sabling HDMI interface @ 0x%04X for encoder 0x%x\n", 445 DRM_DEBUG("%sabling HDMI interface @ 0x%04X for encoder 0x%x\n",
diff --git a/drivers/gpu/drm/radeon/r600_audio.c b/drivers/gpu/drm/radeon/r600_audio.c
index 47fc2b886979..bffac10c4296 100644
--- a/drivers/gpu/drm/radeon/r600_audio.c
+++ b/drivers/gpu/drm/radeon/r600_audio.c
@@ -142,12 +142,15 @@ void r600_audio_update_hdmi(struct work_struct *work)
142} 142}
143 143
144/* enable the audio stream */ 144/* enable the audio stream */
145static void r600_audio_enable(struct radeon_device *rdev, 145void r600_audio_enable(struct radeon_device *rdev,
146 struct r600_audio_pin *pin, 146 struct r600_audio_pin *pin,
147 bool enable) 147 bool enable)
148{ 148{
149 u32 value = 0; 149 u32 value = 0;
150 150
151 if (!pin)
152 return;
153
151 if (ASIC_IS_DCE4(rdev)) { 154 if (ASIC_IS_DCE4(rdev)) {
152 if (enable) { 155 if (enable) {
153 value |= 0x81000000; /* Required to enable audio */ 156 value |= 0x81000000; /* Required to enable audio */
@@ -158,7 +161,6 @@ static void r600_audio_enable(struct radeon_device *rdev,
158 WREG32_P(R600_AUDIO_ENABLE, 161 WREG32_P(R600_AUDIO_ENABLE,
159 enable ? 0x81000000 : 0x0, ~0x81000000); 162 enable ? 0x81000000 : 0x0, ~0x81000000);
160 } 163 }
161 DRM_INFO("%s audio %d support\n", enable ? "Enabling" : "Disabling", pin->id);
162} 164}
163 165
164/* 166/*
@@ -178,8 +180,8 @@ int r600_audio_init(struct radeon_device *rdev)
178 rdev->audio.pin[0].status_bits = 0; 180 rdev->audio.pin[0].status_bits = 0;
179 rdev->audio.pin[0].category_code = 0; 181 rdev->audio.pin[0].category_code = 0;
180 rdev->audio.pin[0].id = 0; 182 rdev->audio.pin[0].id = 0;
181 183 /* disable audio. it will be set up later */
182 r600_audio_enable(rdev, &rdev->audio.pin[0], true); 184 r600_audio_enable(rdev, &rdev->audio.pin[0], false);
183 185
184 return 0; 186 return 0;
185} 187}
diff --git a/drivers/gpu/drm/radeon/r600_hdmi.c b/drivers/gpu/drm/radeon/r600_hdmi.c
index 3016fc14f502..85a2bb28aed2 100644
--- a/drivers/gpu/drm/radeon/r600_hdmi.c
+++ b/drivers/gpu/drm/radeon/r600_hdmi.c
@@ -329,9 +329,6 @@ static void dce3_2_afmt_write_speaker_allocation(struct drm_encoder *encoder)
329 u8 *sadb; 329 u8 *sadb;
330 int sad_count; 330 int sad_count;
331 331
332 /* XXX: setting this register causes hangs on some asics */
333 return;
334
335 list_for_each_entry(connector, &encoder->dev->mode_config.connector_list, head) { 332 list_for_each_entry(connector, &encoder->dev->mode_config.connector_list, head) {
336 if (connector->encoder == encoder) { 333 if (connector->encoder == encoder) {
337 radeon_connector = to_radeon_connector(connector); 334 radeon_connector = to_radeon_connector(connector);
@@ -460,6 +457,10 @@ void r600_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode *mod
460 return; 457 return;
461 offset = dig->afmt->offset; 458 offset = dig->afmt->offset;
462 459
460 /* disable audio prior to setting up hw */
461 dig->afmt->pin = r600_audio_get_pin(rdev);
462 r600_audio_enable(rdev, dig->afmt->pin, false);
463
463 r600_audio_set_dto(encoder, mode->clock); 464 r600_audio_set_dto(encoder, mode->clock);
464 465
465 WREG32(HDMI0_VBI_PACKET_CONTROL + offset, 466 WREG32(HDMI0_VBI_PACKET_CONTROL + offset,
@@ -531,6 +532,9 @@ void r600_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode *mod
531 WREG32(HDMI0_RAMP_CONTROL3 + offset, 0x00000001); 532 WREG32(HDMI0_RAMP_CONTROL3 + offset, 0x00000001);
532 533
533 r600_hdmi_audio_workaround(encoder); 534 r600_hdmi_audio_workaround(encoder);
535
536 /* enable audio after to setting up hw */
537 r600_audio_enable(rdev, dig->afmt->pin, true);
534} 538}
535 539
536/* 540/*
@@ -651,11 +655,6 @@ void r600_hdmi_enable(struct drm_encoder *encoder, bool enable)
651 if (!enable && !dig->afmt->enabled) 655 if (!enable && !dig->afmt->enabled)
652 return; 656 return;
653 657
654 if (enable)
655 dig->afmt->pin = r600_audio_get_pin(rdev);
656 else
657 dig->afmt->pin = NULL;
658
659 /* Older chipsets require setting HDMI and routing manually */ 658 /* Older chipsets require setting HDMI and routing manually */
660 if (!ASIC_IS_DCE3(rdev)) { 659 if (!ASIC_IS_DCE3(rdev)) {
661 if (enable) 660 if (enable)
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 024db37b1832..e887d027b6d0 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -2747,6 +2747,12 @@ int radeon_vm_bo_rmv(struct radeon_device *rdev,
2747void r600_audio_update_hdmi(struct work_struct *work); 2747void r600_audio_update_hdmi(struct work_struct *work);
2748struct r600_audio_pin *r600_audio_get_pin(struct radeon_device *rdev); 2748struct r600_audio_pin *r600_audio_get_pin(struct radeon_device *rdev);
2749struct r600_audio_pin *dce6_audio_get_pin(struct radeon_device *rdev); 2749struct r600_audio_pin *dce6_audio_get_pin(struct radeon_device *rdev);
2750void r600_audio_enable(struct radeon_device *rdev,
2751 struct r600_audio_pin *pin,
2752 bool enable);
2753void dce6_audio_enable(struct radeon_device *rdev,
2754 struct r600_audio_pin *pin,
2755 bool enable);
2750 2756
2751/* 2757/*
2752 * R600 vram scratch functions 2758 * R600 vram scratch functions
diff --git a/drivers/gpu/drm/radeon/radeon_atpx_handler.c b/drivers/gpu/drm/radeon/radeon_atpx_handler.c
index 485848f889f5..fa9a9c02751e 100644
--- a/drivers/gpu/drm/radeon/radeon_atpx_handler.c
+++ b/drivers/gpu/drm/radeon/radeon_atpx_handler.c
@@ -219,7 +219,8 @@ static int radeon_atpx_verify_interface(struct radeon_atpx *atpx)
219 memcpy(&output, info->buffer.pointer, size); 219 memcpy(&output, info->buffer.pointer, size);
220 220
221 /* TODO: check version? */ 221 /* TODO: check version? */
222 printk("ATPX version %u\n", output.version); 222 printk("ATPX version %u, functions 0x%08x\n",
223 output.version, output.function_bits);
223 224
224 radeon_atpx_parse_functions(&atpx->functions, output.function_bits); 225 radeon_atpx_parse_functions(&atpx->functions, output.function_bits);
225 226
diff --git a/drivers/gpu/drm/radeon/radeon_kms.c b/drivers/gpu/drm/radeon/radeon_kms.c
index 114d1672d616..2aecd6dc2610 100644
--- a/drivers/gpu/drm/radeon/radeon_kms.c
+++ b/drivers/gpu/drm/radeon/radeon_kms.c
@@ -537,6 +537,10 @@ int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv)
537 537
538 radeon_vm_init(rdev, &fpriv->vm); 538 radeon_vm_init(rdev, &fpriv->vm);
539 539
540 r = radeon_bo_reserve(rdev->ring_tmp_bo.bo, false);
541 if (r)
542 return r;
543
540 /* map the ib pool buffer read only into 544 /* map the ib pool buffer read only into
541 * virtual address space */ 545 * virtual address space */
542 bo_va = radeon_vm_bo_add(rdev, &fpriv->vm, 546 bo_va = radeon_vm_bo_add(rdev, &fpriv->vm,
@@ -544,6 +548,8 @@ int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv)
544 r = radeon_vm_bo_set_addr(rdev, bo_va, RADEON_VA_IB_OFFSET, 548 r = radeon_vm_bo_set_addr(rdev, bo_va, RADEON_VA_IB_OFFSET,
545 RADEON_VM_PAGE_READABLE | 549 RADEON_VM_PAGE_READABLE |
546 RADEON_VM_PAGE_SNOOPED); 550 RADEON_VM_PAGE_SNOOPED);
551
552 radeon_bo_unreserve(rdev->ring_tmp_bo.bo);
547 if (r) { 553 if (r) {
548 radeon_vm_fini(rdev, &fpriv->vm); 554 radeon_vm_fini(rdev, &fpriv->vm);
549 kfree(fpriv); 555 kfree(fpriv);
diff --git a/drivers/gpu/drm/radeon/radeon_uvd.c b/drivers/gpu/drm/radeon/radeon_uvd.c
index 6781fee1eaad..3e6804b2b2ef 100644
--- a/drivers/gpu/drm/radeon/radeon_uvd.c
+++ b/drivers/gpu/drm/radeon/radeon_uvd.c
@@ -171,6 +171,8 @@ void radeon_uvd_fini(struct radeon_device *rdev)
171 171
172 radeon_bo_unref(&rdev->uvd.vcpu_bo); 172 radeon_bo_unref(&rdev->uvd.vcpu_bo);
173 173
174 radeon_ring_fini(rdev, &rdev->ring[R600_RING_TYPE_UVD_INDEX]);
175
174 release_firmware(rdev->uvd_fw); 176 release_firmware(rdev->uvd_fw);
175} 177}
176 178
diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c
index 6c772e58c784..4e37a42305d8 100644
--- a/drivers/gpu/drm/radeon/rv770.c
+++ b/drivers/gpu/drm/radeon/rv770.c
@@ -1955,9 +1955,9 @@ void rv770_fini(struct radeon_device *rdev)
1955 radeon_wb_fini(rdev); 1955 radeon_wb_fini(rdev);
1956 radeon_ib_pool_fini(rdev); 1956 radeon_ib_pool_fini(rdev);
1957 radeon_irq_kms_fini(rdev); 1957 radeon_irq_kms_fini(rdev);
1958 rv770_pcie_gart_fini(rdev);
1959 uvd_v1_0_fini(rdev); 1958 uvd_v1_0_fini(rdev);
1960 radeon_uvd_fini(rdev); 1959 radeon_uvd_fini(rdev);
1960 rv770_pcie_gart_fini(rdev);
1961 r600_vram_scratch_fini(rdev); 1961 r600_vram_scratch_fini(rdev);
1962 radeon_gem_fini(rdev); 1962 radeon_gem_fini(rdev);
1963 radeon_fence_driver_fini(rdev); 1963 radeon_fence_driver_fini(rdev);