aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorYijing Wang <wangyijing@huawei.com>2013-08-21 23:24:47 -0400
committerBjorn Helgaas <bhelgaas@google.com>2013-08-22 12:47:04 -0400
commitd4aa68f614201e9fbf74e8b9593bb2ec94061dd3 (patch)
tree58479cf002d444c01a3ec3fc3acfc8675af8c760
parentc2996948ac36a9082f27b9ad94dac4c821a9c33d (diff)
PCI: Don't restrict MPS for slots below Root Ports
When booting with "pci=pcie_bus_safe", we previously limited the fabric MPS to 128 when we found: (1) A hotplug-capable Downstream Port ("dev->is_hotplug_bridge && pci_pcie_type(dev) != PCI_EXP_TYPE_ROOT_PORT"), or (2) A hotplug-capable Root Port with a slot that was either empty or contained a multi-function device ("dev->is_hotplug_bridge && !list_is_singular(&dev->bus->devices)") Part (1) is valid, but part (2) is not. After a hot-add in the slot below a Root Port, we can reconfigure all MPS values in the fabric below the Root Port because the new device is the only thing below the Root Port and there are no active drivers. Therefore, there's no reason to limit the MPS for Root Ports, no matter what's in the slot. Test info: -+-[0000:40]-+-07.0-[0000:46]--+-00.0 Intel 82576 NIC \-00.1 Intel 82576 NIC 0000:40:07.0 Root Port bridge to [bus 46] (MPS supported=256) 0000:46:00.0 Endpoint (MPS supported=512) 0000:46:00.1 Endpoint (MPS supported=512) # echo 0 > /sys/bus/pci/slots/7/power # echo 1 > /sys/bus/pci/slots/7/power pcieport 0000:40:07.0: PCI-E Max Payload Size set to 256/ 256 (was 256) pci 0000:46:00.0: PCI-E Max Payload Size set to 256/ 512 (was 128) pci 0000:46:00.1: PCI-E Max Payload Size set to 256/ 512 (was 128) Before this change, we set MPS to 128 for the Root Port and both NICs because the slot contained a multi-function device and dev->is_hotplug_bridge && !list_is_singular(&dev->bus->devices) was true. After this change, we set it to 256. [bhelgaas: changelog, comments, split out upstream bridge check] Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Cc: Jon Mason <jdmason@kudzu.us>
-rw-r--r--drivers/pci/probe.c32
1 files changed, 16 insertions, 16 deletions
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 0591b087a6c3..94b1d227ddcd 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -1491,23 +1491,23 @@ static int pcie_find_smpss(struct pci_dev *dev, void *data)
1491 if (!pci_is_pcie(dev)) 1491 if (!pci_is_pcie(dev))
1492 return 0; 1492 return 0;
1493 1493
1494 /* For PCIE hotplug enabled slots not connected directly to a 1494 /*
1495 * PCI-E root port, there can be problems when hotplugging 1495 * We don't have a way to change MPS settings on devices that have
1496 * devices. This is due to the possibility of hotplugging a 1496 * drivers attached. A hot-added device might support only the minimum
1497 * device into the fabric with a smaller MPS that the devices 1497 * MPS setting (MPS=128). Therefore, if the fabric contains a bridge
1498 * currently running have configured. Modifying the MPS on the 1498 * where devices may be hot-added, we limit the fabric MPS to 128 so
1499 * running devices could cause a fatal bus error due to an 1499 * hot-added devices will work correctly.
1500 * incoming frame being larger than the newly configured MPS. 1500 *
1501 * To work around this, the MPS for the entire fabric must be 1501 * However, if we hot-add a device to a slot directly below a Root
1502 * set to the minimum size. Any devices hotplugged into this 1502 * Port, it's impossible for there to be other existing devices below
1503 * fabric will have the minimum MPS set. If the PCI hotplug 1503 * the port. We don't limit the MPS in this case because we can
1504 * slot is directly connected to the root port and there are not 1504 * reconfigure MPS on both the Root Port and the hot-added device,
1505 * other devices on the fabric (which seems to be the most 1505 * and there are no other devices involved.
1506 * common case), then this is not an issue and MPS discovery 1506 *
1507 * will occur as normal. 1507 * Note that this PCIE_BUS_SAFE path assumes no peer-to-peer DMA.
1508 */ 1508 */
1509 if (dev->is_hotplug_bridge && (!list_is_singular(&dev->bus->devices) || 1509 if (dev->is_hotplug_bridge &&
1510 pci_pcie_type(dev) != PCI_EXP_TYPE_ROOT_PORT)) 1510 pci_pcie_type(dev) != PCI_EXP_TYPE_ROOT_PORT)
1511 *smpss = 0; 1511 *smpss = 0;
1512 1512
1513 if (*smpss > dev->pcie_mpss) 1513 if (*smpss > dev->pcie_mpss)