diff options
author | Paulo Zanoni <paulo.r.zanoni@intel.com> | 2013-02-08 14:35:15 -0500 |
---|---|---|
committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-02-15 04:30:38 -0500 |
commit | d46da4377689bd938795e53c4e2fb54dbcaeea44 (patch) | |
tree | 962351720cc13f91a7e8f56ee3f699ea93f87add | |
parent | 2c6602df1a7ff79c9e489602445a6d7eb728744e (diff) |
drm/i915: add ibx_irq_postinstall
So we can remove duplicated code. Note that this function is used not
only on IBX, but also CPT and LPT.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
[danvet: Also bikeshed s/ironlake_enable_pch_hotplug/ibx_enable_hotplug
to keep consistent with our ibx for pch naming scheme.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-rw-r--r-- | drivers/gpu/drm/i915/i915_irq.c | 68 |
1 files changed, 25 insertions, 43 deletions
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index b27ffdbc98a7..2cd97d1cc920 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c | |||
@@ -1924,7 +1924,7 @@ static void valleyview_irq_preinstall(struct drm_device *dev) | |||
1924 | * This register is the same on all known PCH chips. | 1924 | * This register is the same on all known PCH chips. |
1925 | */ | 1925 | */ |
1926 | 1926 | ||
1927 | static void ironlake_enable_pch_hotplug(struct drm_device *dev) | 1927 | static void ibx_enable_hotplug(struct drm_device *dev) |
1928 | { | 1928 | { |
1929 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; | 1929 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; |
1930 | u32 hotplug; | 1930 | u32 hotplug; |
@@ -1937,6 +1937,28 @@ static void ironlake_enable_pch_hotplug(struct drm_device *dev) | |||
1937 | I915_WRITE(PCH_PORT_HOTPLUG, hotplug); | 1937 | I915_WRITE(PCH_PORT_HOTPLUG, hotplug); |
1938 | } | 1938 | } |
1939 | 1939 | ||
1940 | static void ibx_irq_postinstall(struct drm_device *dev) | ||
1941 | { | ||
1942 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; | ||
1943 | u32 mask; | ||
1944 | |||
1945 | if (HAS_PCH_IBX(dev)) | ||
1946 | mask = SDE_HOTPLUG_MASK | | ||
1947 | SDE_GMBUS | | ||
1948 | SDE_AUX_MASK; | ||
1949 | else | ||
1950 | mask = SDE_HOTPLUG_MASK_CPT | | ||
1951 | SDE_GMBUS_CPT | | ||
1952 | SDE_AUX_MASK_CPT; | ||
1953 | |||
1954 | I915_WRITE(SDEIIR, I915_READ(SDEIIR)); | ||
1955 | I915_WRITE(SDEIMR, ~mask); | ||
1956 | I915_WRITE(SDEIER, mask); | ||
1957 | POSTING_READ(SDEIER); | ||
1958 | |||
1959 | ibx_enable_hotplug(dev); | ||
1960 | } | ||
1961 | |||
1940 | static int ironlake_irq_postinstall(struct drm_device *dev) | 1962 | static int ironlake_irq_postinstall(struct drm_device *dev) |
1941 | { | 1963 | { |
1942 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; | 1964 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; |
@@ -1945,8 +1967,6 @@ static int ironlake_irq_postinstall(struct drm_device *dev) | |||
1945 | DE_PLANEA_FLIP_DONE | DE_PLANEB_FLIP_DONE | | 1967 | DE_PLANEA_FLIP_DONE | DE_PLANEB_FLIP_DONE | |
1946 | DE_AUX_CHANNEL_A; | 1968 | DE_AUX_CHANNEL_A; |
1947 | u32 render_irqs; | 1969 | u32 render_irqs; |
1948 | u32 hotplug_mask; | ||
1949 | u32 pch_irq_mask; | ||
1950 | 1970 | ||
1951 | dev_priv->irq_mask = ~display_mask; | 1971 | dev_priv->irq_mask = ~display_mask; |
1952 | 1972 | ||
@@ -1974,30 +1994,7 @@ static int ironlake_irq_postinstall(struct drm_device *dev) | |||
1974 | I915_WRITE(GTIER, render_irqs); | 1994 | I915_WRITE(GTIER, render_irqs); |
1975 | POSTING_READ(GTIER); | 1995 | POSTING_READ(GTIER); |
1976 | 1996 | ||
1977 | if (HAS_PCH_CPT(dev)) { | 1997 | ibx_irq_postinstall(dev); |
1978 | hotplug_mask = (SDE_CRT_HOTPLUG_CPT | | ||
1979 | SDE_PORTB_HOTPLUG_CPT | | ||
1980 | SDE_PORTC_HOTPLUG_CPT | | ||
1981 | SDE_PORTD_HOTPLUG_CPT | | ||
1982 | SDE_GMBUS_CPT | | ||
1983 | SDE_AUX_MASK_CPT); | ||
1984 | } else { | ||
1985 | hotplug_mask = (SDE_CRT_HOTPLUG | | ||
1986 | SDE_PORTB_HOTPLUG | | ||
1987 | SDE_PORTC_HOTPLUG | | ||
1988 | SDE_PORTD_HOTPLUG | | ||
1989 | SDE_GMBUS | | ||
1990 | SDE_AUX_MASK); | ||
1991 | } | ||
1992 | |||
1993 | pch_irq_mask = ~hotplug_mask; | ||
1994 | |||
1995 | I915_WRITE(SDEIIR, I915_READ(SDEIIR)); | ||
1996 | I915_WRITE(SDEIMR, pch_irq_mask); | ||
1997 | I915_WRITE(SDEIER, hotplug_mask); | ||
1998 | POSTING_READ(SDEIER); | ||
1999 | |||
2000 | ironlake_enable_pch_hotplug(dev); | ||
2001 | 1998 | ||
2002 | if (IS_IRONLAKE_M(dev)) { | 1999 | if (IS_IRONLAKE_M(dev)) { |
2003 | /* Clear & enable PCU event interrupts */ | 2000 | /* Clear & enable PCU event interrupts */ |
@@ -2020,8 +2017,6 @@ static int ivybridge_irq_postinstall(struct drm_device *dev) | |||
2020 | DE_PLANEA_FLIP_DONE_IVB | | 2017 | DE_PLANEA_FLIP_DONE_IVB | |
2021 | DE_AUX_CHANNEL_A_IVB; | 2018 | DE_AUX_CHANNEL_A_IVB; |
2022 | u32 render_irqs; | 2019 | u32 render_irqs; |
2023 | u32 hotplug_mask; | ||
2024 | u32 pch_irq_mask; | ||
2025 | 2020 | ||
2026 | dev_priv->irq_mask = ~display_mask; | 2021 | dev_priv->irq_mask = ~display_mask; |
2027 | 2022 | ||
@@ -2045,20 +2040,7 @@ static int ivybridge_irq_postinstall(struct drm_device *dev) | |||
2045 | I915_WRITE(GTIER, render_irqs); | 2040 | I915_WRITE(GTIER, render_irqs); |
2046 | POSTING_READ(GTIER); | 2041 | POSTING_READ(GTIER); |
2047 | 2042 | ||
2048 | hotplug_mask = (SDE_CRT_HOTPLUG_CPT | | 2043 | ibx_irq_postinstall(dev); |
2049 | SDE_PORTB_HOTPLUG_CPT | | ||
2050 | SDE_PORTC_HOTPLUG_CPT | | ||
2051 | SDE_PORTD_HOTPLUG_CPT | | ||
2052 | SDE_GMBUS_CPT | | ||
2053 | SDE_AUX_MASK_CPT); | ||
2054 | pch_irq_mask = ~hotplug_mask; | ||
2055 | |||
2056 | I915_WRITE(SDEIIR, I915_READ(SDEIIR)); | ||
2057 | I915_WRITE(SDEIMR, pch_irq_mask); | ||
2058 | I915_WRITE(SDEIER, hotplug_mask); | ||
2059 | POSTING_READ(SDEIER); | ||
2060 | |||
2061 | ironlake_enable_pch_hotplug(dev); | ||
2062 | 2044 | ||
2063 | return 0; | 2045 | return 0; |
2064 | } | 2046 | } |