diff options
author | Alex Deucher <alexander.deucher@amd.com> | 2013-05-14 18:21:17 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2013-06-27 19:40:13 -0400 |
commit | d434e81e59aada1b68444e9a128d56ccc295f66a (patch) | |
tree | b3ef0c86c6d436afde92cde19814e34e6b813ac8 | |
parent | 02478a102be592a8b48be03d62f0fdddb51ab786 (diff) |
drm/radeon/dpm: fix UVD clock setting on cayman
The rv770 version was using the wrong power state type.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r-- | drivers/gpu/drm/radeon/ni_dpm.c | 40 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/ni_dpm.h | 7 |
2 files changed, 45 insertions, 2 deletions
diff --git a/drivers/gpu/drm/radeon/ni_dpm.c b/drivers/gpu/drm/radeon/ni_dpm.c index ae8d3f551e30..5a43cb592666 100644 --- a/drivers/gpu/drm/radeon/ni_dpm.c +++ b/drivers/gpu/drm/radeon/ni_dpm.c | |||
@@ -3475,6 +3475,42 @@ static void ni_enable_dynamic_pcie_gen2(struct radeon_device *rdev, | |||
3475 | WREG32_P(GENERAL_PWRMGT, 0, ~ENABLE_GEN2PCIE); | 3475 | WREG32_P(GENERAL_PWRMGT, 0, ~ENABLE_GEN2PCIE); |
3476 | } | 3476 | } |
3477 | 3477 | ||
3478 | void ni_set_uvd_clock_before_set_eng_clock(struct radeon_device *rdev, | ||
3479 | struct radeon_ps *new_ps, | ||
3480 | struct radeon_ps *old_ps) | ||
3481 | { | ||
3482 | struct ni_ps *new_state = ni_get_ps(new_ps); | ||
3483 | struct ni_ps *current_state = ni_get_ps(old_ps); | ||
3484 | |||
3485 | if ((new_ps->vclk == old_ps->vclk) && | ||
3486 | (new_ps->dclk == old_ps->dclk)) | ||
3487 | return; | ||
3488 | |||
3489 | if (new_state->performance_levels[new_state->performance_level_count - 1].sclk >= | ||
3490 | current_state->performance_levels[current_state->performance_level_count - 1].sclk) | ||
3491 | return; | ||
3492 | |||
3493 | radeon_set_uvd_clocks(rdev, new_ps->vclk, new_ps->dclk); | ||
3494 | } | ||
3495 | |||
3496 | void ni_set_uvd_clock_after_set_eng_clock(struct radeon_device *rdev, | ||
3497 | struct radeon_ps *new_ps, | ||
3498 | struct radeon_ps *old_ps) | ||
3499 | { | ||
3500 | struct ni_ps *new_state = ni_get_ps(new_ps); | ||
3501 | struct ni_ps *current_state = ni_get_ps(old_ps); | ||
3502 | |||
3503 | if ((new_ps->vclk == old_ps->vclk) && | ||
3504 | (new_ps->dclk == old_ps->dclk)) | ||
3505 | return; | ||
3506 | |||
3507 | if (new_state->performance_levels[new_state->performance_level_count - 1].sclk < | ||
3508 | current_state->performance_levels[current_state->performance_level_count - 1].sclk) | ||
3509 | return; | ||
3510 | |||
3511 | radeon_set_uvd_clocks(rdev, new_ps->vclk, new_ps->dclk); | ||
3512 | } | ||
3513 | |||
3478 | void ni_dpm_setup_asic(struct radeon_device *rdev) | 3514 | void ni_dpm_setup_asic(struct radeon_device *rdev) |
3479 | { | 3515 | { |
3480 | struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); | 3516 | struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); |
@@ -3730,7 +3766,7 @@ int ni_dpm_set_power_state(struct radeon_device *rdev) | |||
3730 | DRM_ERROR("ni_restrict_performance_levels_before_switch failed\n"); | 3766 | DRM_ERROR("ni_restrict_performance_levels_before_switch failed\n"); |
3731 | return ret; | 3767 | return ret; |
3732 | } | 3768 | } |
3733 | rv770_set_uvd_clock_before_set_eng_clock(rdev, new_ps, old_ps); | 3769 | ni_set_uvd_clock_before_set_eng_clock(rdev, new_ps, old_ps); |
3734 | ret = ni_enable_power_containment(rdev, new_ps, false); | 3770 | ret = ni_enable_power_containment(rdev, new_ps, false); |
3735 | if (ret) { | 3771 | if (ret) { |
3736 | DRM_ERROR("ni_enable_power_containment failed\n"); | 3772 | DRM_ERROR("ni_enable_power_containment failed\n"); |
@@ -3780,7 +3816,7 @@ int ni_dpm_set_power_state(struct radeon_device *rdev) | |||
3780 | DRM_ERROR("rv770_set_sw_state failed\n"); | 3816 | DRM_ERROR("rv770_set_sw_state failed\n"); |
3781 | return ret; | 3817 | return ret; |
3782 | } | 3818 | } |
3783 | rv770_set_uvd_clock_after_set_eng_clock(rdev, new_ps, old_ps); | 3819 | ni_set_uvd_clock_after_set_eng_clock(rdev, new_ps, old_ps); |
3784 | ret = ni_enable_smc_cac(rdev, new_ps, true); | 3820 | ret = ni_enable_smc_cac(rdev, new_ps, true); |
3785 | if (ret) { | 3821 | if (ret) { |
3786 | DRM_ERROR("ni_enable_smc_cac failed\n"); | 3822 | DRM_ERROR("ni_enable_smc_cac failed\n"); |
diff --git a/drivers/gpu/drm/radeon/ni_dpm.h b/drivers/gpu/drm/radeon/ni_dpm.h index 887442497bff..ac1c7abf2c67 100644 --- a/drivers/gpu/drm/radeon/ni_dpm.h +++ b/drivers/gpu/drm/radeon/ni_dpm.h | |||
@@ -238,4 +238,11 @@ void ni_update_current_ps(struct radeon_device *rdev, | |||
238 | void ni_update_requested_ps(struct radeon_device *rdev, | 238 | void ni_update_requested_ps(struct radeon_device *rdev, |
239 | struct radeon_ps *rps); | 239 | struct radeon_ps *rps); |
240 | 240 | ||
241 | void ni_set_uvd_clock_before_set_eng_clock(struct radeon_device *rdev, | ||
242 | struct radeon_ps *new_ps, | ||
243 | struct radeon_ps *old_ps); | ||
244 | void ni_set_uvd_clock_after_set_eng_clock(struct radeon_device *rdev, | ||
245 | struct radeon_ps *new_ps, | ||
246 | struct radeon_ps *old_ps); | ||
247 | |||
241 | #endif | 248 | #endif |