diff options
author | Tobias Klauser <tklauser@distanz.ch> | 2014-04-24 07:50:09 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2014-04-24 16:51:41 -0400 |
commit | d42f157b3498a042d9930506d4b55ded5dcb35c0 (patch) | |
tree | f0e09f2db5aab59665d88e8f7495f00c11b52956 | |
parent | f01ec1c017dead42092997a2b8684fcab4cbf126 (diff) |
Altera TSE: Remove unnecessary cast of void pointers
No need to cast void pointers.
Signed-off-by: Tobias Klauser <tklauser@distanz.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r-- | drivers/net/ethernet/altera/altera_msgdma.c | 15 | ||||
-rw-r--r-- | drivers/net/ethernet/altera/altera_sgdma.c | 37 |
2 files changed, 22 insertions, 30 deletions
diff --git a/drivers/net/ethernet/altera/altera_msgdma.c b/drivers/net/ethernet/altera/altera_msgdma.c index 3df18669ea30..0e38a03b1542 100644 --- a/drivers/net/ethernet/altera/altera_msgdma.c +++ b/drivers/net/ethernet/altera/altera_msgdma.c | |||
@@ -32,10 +32,8 @@ void msgdma_uninitialize(struct altera_tse_private *priv) | |||
32 | void msgdma_reset(struct altera_tse_private *priv) | 32 | void msgdma_reset(struct altera_tse_private *priv) |
33 | { | 33 | { |
34 | int counter; | 34 | int counter; |
35 | struct msgdma_csr *txcsr = | 35 | struct msgdma_csr *txcsr = priv->tx_dma_csr; |
36 | (struct msgdma_csr *)priv->tx_dma_csr; | 36 | struct msgdma_csr *rxcsr = priv->rx_dma_csr; |
37 | struct msgdma_csr *rxcsr = | ||
38 | (struct msgdma_csr *)priv->rx_dma_csr; | ||
39 | 37 | ||
40 | /* Reset Rx mSGDMA */ | 38 | /* Reset Rx mSGDMA */ |
41 | iowrite32(MSGDMA_CSR_STAT_MASK, &rxcsr->status); | 39 | iowrite32(MSGDMA_CSR_STAT_MASK, &rxcsr->status); |
@@ -133,8 +131,7 @@ u32 msgdma_tx_completions(struct altera_tse_private *priv) | |||
133 | u32 ready = 0; | 131 | u32 ready = 0; |
134 | u32 inuse; | 132 | u32 inuse; |
135 | u32 status; | 133 | u32 status; |
136 | struct msgdma_csr *txcsr = | 134 | struct msgdma_csr *txcsr = priv->tx_dma_csr; |
137 | (struct msgdma_csr *)priv->tx_dma_csr; | ||
138 | 135 | ||
139 | /* Get number of sent descriptors */ | 136 | /* Get number of sent descriptors */ |
140 | inuse = ioread32(&txcsr->rw_fill_level) & 0xffff; | 137 | inuse = ioread32(&txcsr->rw_fill_level) & 0xffff; |
@@ -186,10 +183,8 @@ u32 msgdma_rx_status(struct altera_tse_private *priv) | |||
186 | u32 rxstatus = 0; | 183 | u32 rxstatus = 0; |
187 | u32 pktlength; | 184 | u32 pktlength; |
188 | u32 pktstatus; | 185 | u32 pktstatus; |
189 | struct msgdma_csr *rxcsr = | 186 | struct msgdma_csr *rxcsr = priv->rx_dma_csr; |
190 | (struct msgdma_csr *)priv->rx_dma_csr; | 187 | struct msgdma_response *rxresp = priv->rx_dma_resp; |
191 | struct msgdma_response *rxresp = | ||
192 | (struct msgdma_response *)priv->rx_dma_resp; | ||
193 | 188 | ||
194 | if (ioread32(&rxcsr->resp_fill_level) & 0xffff) { | 189 | if (ioread32(&rxcsr->resp_fill_level) & 0xffff) { |
195 | pktlength = ioread32(&rxresp->bytes_transferred); | 190 | pktlength = ioread32(&rxresp->bytes_transferred); |
diff --git a/drivers/net/ethernet/altera/altera_sgdma.c b/drivers/net/ethernet/altera/altera_sgdma.c index 0ee96639ae44..519f0f0bacf0 100644 --- a/drivers/net/ethernet/altera/altera_sgdma.c +++ b/drivers/net/ethernet/altera/altera_sgdma.c | |||
@@ -112,12 +112,12 @@ void sgdma_uninitialize(struct altera_tse_private *priv) | |||
112 | */ | 112 | */ |
113 | void sgdma_reset(struct altera_tse_private *priv) | 113 | void sgdma_reset(struct altera_tse_private *priv) |
114 | { | 114 | { |
115 | u32 *ptxdescripmem = (u32 *)priv->tx_dma_desc; | 115 | u32 *ptxdescripmem = priv->tx_dma_desc; |
116 | u32 txdescriplen = priv->txdescmem; | 116 | u32 txdescriplen = priv->txdescmem; |
117 | u32 *prxdescripmem = (u32 *)priv->rx_dma_desc; | 117 | u32 *prxdescripmem = priv->rx_dma_desc; |
118 | u32 rxdescriplen = priv->rxdescmem; | 118 | u32 rxdescriplen = priv->rxdescmem; |
119 | struct sgdma_csr *ptxsgdma = (struct sgdma_csr *)priv->tx_dma_csr; | 119 | struct sgdma_csr *ptxsgdma = priv->tx_dma_csr; |
120 | struct sgdma_csr *prxsgdma = (struct sgdma_csr *)priv->rx_dma_csr; | 120 | struct sgdma_csr *prxsgdma = priv->rx_dma_csr; |
121 | 121 | ||
122 | /* Initialize descriptor memory to 0 */ | 122 | /* Initialize descriptor memory to 0 */ |
123 | memset(ptxdescripmem, 0, txdescriplen); | 123 | memset(ptxdescripmem, 0, txdescriplen); |
@@ -132,14 +132,14 @@ void sgdma_reset(struct altera_tse_private *priv) | |||
132 | 132 | ||
133 | void sgdma_enable_rxirq(struct altera_tse_private *priv) | 133 | void sgdma_enable_rxirq(struct altera_tse_private *priv) |
134 | { | 134 | { |
135 | struct sgdma_csr *csr = (struct sgdma_csr *)priv->rx_dma_csr; | 135 | struct sgdma_csr *csr = priv->rx_dma_csr; |
136 | priv->rxctrlreg |= SGDMA_CTRLREG_INTEN; | 136 | priv->rxctrlreg |= SGDMA_CTRLREG_INTEN; |
137 | tse_set_bit(&csr->control, SGDMA_CTRLREG_INTEN); | 137 | tse_set_bit(&csr->control, SGDMA_CTRLREG_INTEN); |
138 | } | 138 | } |
139 | 139 | ||
140 | void sgdma_enable_txirq(struct altera_tse_private *priv) | 140 | void sgdma_enable_txirq(struct altera_tse_private *priv) |
141 | { | 141 | { |
142 | struct sgdma_csr *csr = (struct sgdma_csr *)priv->tx_dma_csr; | 142 | struct sgdma_csr *csr = priv->tx_dma_csr; |
143 | priv->txctrlreg |= SGDMA_CTRLREG_INTEN; | 143 | priv->txctrlreg |= SGDMA_CTRLREG_INTEN; |
144 | tse_set_bit(&csr->control, SGDMA_CTRLREG_INTEN); | 144 | tse_set_bit(&csr->control, SGDMA_CTRLREG_INTEN); |
145 | } | 145 | } |
@@ -156,13 +156,13 @@ void sgdma_disable_txirq(struct altera_tse_private *priv) | |||
156 | 156 | ||
157 | void sgdma_clear_rxirq(struct altera_tse_private *priv) | 157 | void sgdma_clear_rxirq(struct altera_tse_private *priv) |
158 | { | 158 | { |
159 | struct sgdma_csr *csr = (struct sgdma_csr *)priv->rx_dma_csr; | 159 | struct sgdma_csr *csr = priv->rx_dma_csr; |
160 | tse_set_bit(&csr->control, SGDMA_CTRLREG_CLRINT); | 160 | tse_set_bit(&csr->control, SGDMA_CTRLREG_CLRINT); |
161 | } | 161 | } |
162 | 162 | ||
163 | void sgdma_clear_txirq(struct altera_tse_private *priv) | 163 | void sgdma_clear_txirq(struct altera_tse_private *priv) |
164 | { | 164 | { |
165 | struct sgdma_csr *csr = (struct sgdma_csr *)priv->tx_dma_csr; | 165 | struct sgdma_csr *csr = priv->tx_dma_csr; |
166 | tse_set_bit(&csr->control, SGDMA_CTRLREG_CLRINT); | 166 | tse_set_bit(&csr->control, SGDMA_CTRLREG_CLRINT); |
167 | } | 167 | } |
168 | 168 | ||
@@ -174,8 +174,7 @@ void sgdma_clear_txirq(struct altera_tse_private *priv) | |||
174 | int sgdma_tx_buffer(struct altera_tse_private *priv, struct tse_buffer *buffer) | 174 | int sgdma_tx_buffer(struct altera_tse_private *priv, struct tse_buffer *buffer) |
175 | { | 175 | { |
176 | int pktstx = 0; | 176 | int pktstx = 0; |
177 | struct sgdma_descrip *descbase = | 177 | struct sgdma_descrip *descbase = priv->tx_dma_desc; |
178 | (struct sgdma_descrip *)priv->tx_dma_desc; | ||
179 | 178 | ||
180 | struct sgdma_descrip *cdesc = &descbase[0]; | 179 | struct sgdma_descrip *cdesc = &descbase[0]; |
181 | struct sgdma_descrip *ndesc = &descbase[1]; | 180 | struct sgdma_descrip *ndesc = &descbase[1]; |
@@ -208,7 +207,7 @@ int sgdma_tx_buffer(struct altera_tse_private *priv, struct tse_buffer *buffer) | |||
208 | u32 sgdma_tx_completions(struct altera_tse_private *priv) | 207 | u32 sgdma_tx_completions(struct altera_tse_private *priv) |
209 | { | 208 | { |
210 | u32 ready = 0; | 209 | u32 ready = 0; |
211 | struct sgdma_descrip *desc = (struct sgdma_descrip *)priv->tx_dma_desc; | 210 | struct sgdma_descrip *desc = priv->tx_dma_desc; |
212 | 211 | ||
213 | if (!sgdma_txbusy(priv) && | 212 | if (!sgdma_txbusy(priv) && |
214 | ((desc->control & SGDMA_CONTROL_HW_OWNED) == 0) && | 213 | ((desc->control & SGDMA_CONTROL_HW_OWNED) == 0) && |
@@ -231,8 +230,8 @@ int sgdma_add_rx_desc(struct altera_tse_private *priv, | |||
231 | */ | 230 | */ |
232 | u32 sgdma_rx_status(struct altera_tse_private *priv) | 231 | u32 sgdma_rx_status(struct altera_tse_private *priv) |
233 | { | 232 | { |
234 | struct sgdma_csr *csr = (struct sgdma_csr *)priv->rx_dma_csr; | 233 | struct sgdma_csr *csr = priv->rx_dma_csr; |
235 | struct sgdma_descrip *base = (struct sgdma_descrip *)priv->rx_dma_desc; | 234 | struct sgdma_descrip *base = priv->rx_dma_desc; |
236 | struct sgdma_descrip *desc = NULL; | 235 | struct sgdma_descrip *desc = NULL; |
237 | int pktsrx; | 236 | int pktsrx; |
238 | unsigned int rxstatus = 0; | 237 | unsigned int rxstatus = 0; |
@@ -312,10 +311,8 @@ static void sgdma_descrip(struct sgdma_descrip *desc, | |||
312 | */ | 311 | */ |
313 | static int sgdma_async_read(struct altera_tse_private *priv) | 312 | static int sgdma_async_read(struct altera_tse_private *priv) |
314 | { | 313 | { |
315 | struct sgdma_csr *csr = (struct sgdma_csr *)priv->rx_dma_csr; | 314 | struct sgdma_csr *csr = priv->rx_dma_csr; |
316 | struct sgdma_descrip *descbase = | 315 | struct sgdma_descrip *descbase = priv->rx_dma_desc; |
317 | (struct sgdma_descrip *)priv->rx_dma_desc; | ||
318 | |||
319 | struct sgdma_descrip *cdesc = &descbase[0]; | 316 | struct sgdma_descrip *cdesc = &descbase[0]; |
320 | struct sgdma_descrip *ndesc = &descbase[1]; | 317 | struct sgdma_descrip *ndesc = &descbase[1]; |
321 | 318 | ||
@@ -364,7 +361,7 @@ static int sgdma_async_read(struct altera_tse_private *priv) | |||
364 | static int sgdma_async_write(struct altera_tse_private *priv, | 361 | static int sgdma_async_write(struct altera_tse_private *priv, |
365 | struct sgdma_descrip *desc) | 362 | struct sgdma_descrip *desc) |
366 | { | 363 | { |
367 | struct sgdma_csr *csr = (struct sgdma_csr *)priv->tx_dma_csr; | 364 | struct sgdma_csr *csr = priv->tx_dma_csr; |
368 | 365 | ||
369 | if (sgdma_txbusy(priv)) | 366 | if (sgdma_txbusy(priv)) |
370 | return 0; | 367 | return 0; |
@@ -485,7 +482,7 @@ queue_rx_peekhead(struct altera_tse_private *priv) | |||
485 | */ | 482 | */ |
486 | static int sgdma_rxbusy(struct altera_tse_private *priv) | 483 | static int sgdma_rxbusy(struct altera_tse_private *priv) |
487 | { | 484 | { |
488 | struct sgdma_csr *csr = (struct sgdma_csr *)priv->rx_dma_csr; | 485 | struct sgdma_csr *csr = priv->rx_dma_csr; |
489 | return ioread32(&csr->status) & SGDMA_STSREG_BUSY; | 486 | return ioread32(&csr->status) & SGDMA_STSREG_BUSY; |
490 | } | 487 | } |
491 | 488 | ||
@@ -495,7 +492,7 @@ static int sgdma_rxbusy(struct altera_tse_private *priv) | |||
495 | static int sgdma_txbusy(struct altera_tse_private *priv) | 492 | static int sgdma_txbusy(struct altera_tse_private *priv) |
496 | { | 493 | { |
497 | int delay = 0; | 494 | int delay = 0; |
498 | struct sgdma_csr *csr = (struct sgdma_csr *)priv->tx_dma_csr; | 495 | struct sgdma_csr *csr = priv->tx_dma_csr; |
499 | 496 | ||
500 | /* if DMA is busy, wait for current transactino to finish */ | 497 | /* if DMA is busy, wait for current transactino to finish */ |
501 | while ((ioread32(&csr->status) & SGDMA_STSREG_BUSY) && (delay++ < 100)) | 498 | while ((ioread32(&csr->status) & SGDMA_STSREG_BUSY) && (delay++ < 100)) |