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authorMike Turquette <mturquette@linaro.org>2013-04-11 14:31:36 -0400
committerMike Turquette <mturquette@linaro.org>2013-04-12 14:22:35 -0400
commitd3a1c7be8361e2fbb6affbdb19de47ca48d6c402 (patch)
tree2371cf7b528092b13bd8a178f77a9c5aa0a947ad
parent9abd5f0555df6cd36130feb742f1def6d99c60fe (diff)
clk: composite: rename 'div' references to 'rate'
Rename all div_hw and div_ops related variables and functions to use rate_hw, rate_ops, etc. This is to make the rate-change portion of the composite clk implementation more generic. A patch following this one will allow for fixed-rate clocks to reuse this infrastructure. Signed-off-by: Mike Turquette <mturquette@linaro.org> Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com> Tested-by: Emilio López <emilio@elopez.com.ar> Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
-rw-r--r--drivers/clk/clk-composite.c40
-rw-r--r--include/linux/clk-provider.h14
2 files changed, 27 insertions, 27 deletions
diff --git a/drivers/clk/clk-composite.c b/drivers/clk/clk-composite.c
index 097dee4fd209..6f4728c6dbd1 100644
--- a/drivers/clk/clk-composite.c
+++ b/drivers/clk/clk-composite.c
@@ -47,36 +47,36 @@ static unsigned long clk_composite_recalc_rate(struct clk_hw *hw,
47 unsigned long parent_rate) 47 unsigned long parent_rate)
48{ 48{
49 struct clk_composite *composite = to_clk_composite(hw); 49 struct clk_composite *composite = to_clk_composite(hw);
50 const struct clk_ops *div_ops = composite->div_ops; 50 const struct clk_ops *rate_ops = composite->rate_ops;
51 struct clk_hw *div_hw = composite->div_hw; 51 struct clk_hw *rate_hw = composite->rate_hw;
52 52
53 div_hw->clk = hw->clk; 53 rate_hw->clk = hw->clk;
54 54
55 return div_ops->recalc_rate(div_hw, parent_rate); 55 return rate_ops->recalc_rate(rate_hw, parent_rate);
56} 56}
57 57
58static long clk_composite_round_rate(struct clk_hw *hw, unsigned long rate, 58static long clk_composite_round_rate(struct clk_hw *hw, unsigned long rate,
59 unsigned long *prate) 59 unsigned long *prate)
60{ 60{
61 struct clk_composite *composite = to_clk_composite(hw); 61 struct clk_composite *composite = to_clk_composite(hw);
62 const struct clk_ops *div_ops = composite->div_ops; 62 const struct clk_ops *rate_ops = composite->rate_ops;
63 struct clk_hw *div_hw = composite->div_hw; 63 struct clk_hw *rate_hw = composite->rate_hw;
64 64
65 div_hw->clk = hw->clk; 65 rate_hw->clk = hw->clk;
66 66
67 return div_ops->round_rate(div_hw, rate, prate); 67 return rate_ops->round_rate(rate_hw, rate, prate);
68} 68}
69 69
70static int clk_composite_set_rate(struct clk_hw *hw, unsigned long rate, 70static int clk_composite_set_rate(struct clk_hw *hw, unsigned long rate,
71 unsigned long parent_rate) 71 unsigned long parent_rate)
72{ 72{
73 struct clk_composite *composite = to_clk_composite(hw); 73 struct clk_composite *composite = to_clk_composite(hw);
74 const struct clk_ops *div_ops = composite->div_ops; 74 const struct clk_ops *rate_ops = composite->rate_ops;
75 struct clk_hw *div_hw = composite->div_hw; 75 struct clk_hw *rate_hw = composite->rate_hw;
76 76
77 div_hw->clk = hw->clk; 77 rate_hw->clk = hw->clk;
78 78
79 return div_ops->set_rate(div_hw, rate, parent_rate); 79 return rate_ops->set_rate(rate_hw, rate, parent_rate);
80} 80}
81 81
82static int clk_composite_is_enabled(struct clk_hw *hw) 82static int clk_composite_is_enabled(struct clk_hw *hw)
@@ -115,7 +115,7 @@ static void clk_composite_disable(struct clk_hw *hw)
115struct clk *clk_register_composite(struct device *dev, const char *name, 115struct clk *clk_register_composite(struct device *dev, const char *name,
116 const char **parent_names, int num_parents, 116 const char **parent_names, int num_parents,
117 struct clk_hw *mux_hw, const struct clk_ops *mux_ops, 117 struct clk_hw *mux_hw, const struct clk_ops *mux_ops,
118 struct clk_hw *div_hw, const struct clk_ops *div_ops, 118 struct clk_hw *rate_hw, const struct clk_ops *rate_ops,
119 struct clk_hw *gate_hw, const struct clk_ops *gate_ops, 119 struct clk_hw *gate_hw, const struct clk_ops *gate_ops,
120 unsigned long flags) 120 unsigned long flags)
121{ 121{
@@ -149,15 +149,15 @@ struct clk *clk_register_composite(struct device *dev, const char *name,
149 clk_composite_ops->set_parent = clk_composite_set_parent; 149 clk_composite_ops->set_parent = clk_composite_set_parent;
150 } 150 }
151 151
152 if (div_hw && div_ops) { 152 if (rate_hw && rate_ops) {
153 if (!div_ops->recalc_rate || !div_ops->round_rate || 153 if (!rate_ops->recalc_rate || !rate_ops->round_rate ||
154 !div_ops->set_rate) { 154 !rate_ops->set_rate) {
155 clk = ERR_PTR(-EINVAL); 155 clk = ERR_PTR(-EINVAL);
156 goto err; 156 goto err;
157 } 157 }
158 158
159 composite->div_hw = div_hw; 159 composite->rate_hw = rate_hw;
160 composite->div_ops = div_ops; 160 composite->rate_ops = rate_ops;
161 clk_composite_ops->recalc_rate = clk_composite_recalc_rate; 161 clk_composite_ops->recalc_rate = clk_composite_recalc_rate;
162 clk_composite_ops->round_rate = clk_composite_round_rate; 162 clk_composite_ops->round_rate = clk_composite_round_rate;
163 clk_composite_ops->set_rate = clk_composite_set_rate; 163 clk_composite_ops->set_rate = clk_composite_set_rate;
@@ -187,8 +187,8 @@ struct clk *clk_register_composite(struct device *dev, const char *name,
187 if (composite->mux_hw) 187 if (composite->mux_hw)
188 composite->mux_hw->clk = clk; 188 composite->mux_hw->clk = clk;
189 189
190 if (composite->div_hw) 190 if (composite->rate_hw)
191 composite->div_hw->clk = clk; 191 composite->rate_hw->clk = clk;
192 192
193 if (composite->gate_hw) 193 if (composite->gate_hw)
194 composite->gate_hw->clk = clk; 194 composite->gate_hw->clk = clk;
diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
index e7b7cbc53815..11860985fecb 100644
--- a/include/linux/clk-provider.h
+++ b/include/linux/clk-provider.h
@@ -354,11 +354,11 @@ struct clk *clk_register_fixed_factor(struct device *dev, const char *name,
354 * struct clk_composite - aggregate clock of mux, divider and gate clocks 354 * struct clk_composite - aggregate clock of mux, divider and gate clocks
355 * 355 *
356 * @hw: handle between common and hardware-specific interfaces 356 * @hw: handle between common and hardware-specific interfaces
357 * @mux_hw: handle between composite and hardware-specifix mux clock 357 * @mux_hw: handle between composite and hardware-specific mux clock
358 * @div_hw: handle between composite and hardware-specifix divider clock 358 * @rate_hw: handle between composite and hardware-specific rate clock
359 * @gate_hw: handle between composite and hardware-specifix gate clock 359 * @gate_hw: handle between composite and hardware-specific gate clock
360 * @mux_ops: clock ops for mux 360 * @mux_ops: clock ops for mux
361 * @div_ops: clock ops for divider 361 * @rate_ops: clock ops for rate
362 * @gate_ops: clock ops for gate 362 * @gate_ops: clock ops for gate
363 */ 363 */
364struct clk_composite { 364struct clk_composite {
@@ -366,18 +366,18 @@ struct clk_composite {
366 struct clk_ops ops; 366 struct clk_ops ops;
367 367
368 struct clk_hw *mux_hw; 368 struct clk_hw *mux_hw;
369 struct clk_hw *div_hw; 369 struct clk_hw *rate_hw;
370 struct clk_hw *gate_hw; 370 struct clk_hw *gate_hw;
371 371
372 const struct clk_ops *mux_ops; 372 const struct clk_ops *mux_ops;
373 const struct clk_ops *div_ops; 373 const struct clk_ops *rate_ops;
374 const struct clk_ops *gate_ops; 374 const struct clk_ops *gate_ops;
375}; 375};
376 376
377struct clk *clk_register_composite(struct device *dev, const char *name, 377struct clk *clk_register_composite(struct device *dev, const char *name,
378 const char **parent_names, int num_parents, 378 const char **parent_names, int num_parents,
379 struct clk_hw *mux_hw, const struct clk_ops *mux_ops, 379 struct clk_hw *mux_hw, const struct clk_ops *mux_ops,
380 struct clk_hw *div_hw, const struct clk_ops *div_ops, 380 struct clk_hw *rate_hw, const struct clk_ops *rate_ops,
381 struct clk_hw *gate_hw, const struct clk_ops *gate_ops, 381 struct clk_hw *gate_hw, const struct clk_ops *gate_ops,
382 unsigned long flags); 382 unsigned long flags);
383 383