diff options
author | Masayuki Hosokawa <hosokawa@ace-jp.com> | 2008-03-21 00:38:00 -0400 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2008-04-18 12:50:01 -0400 |
commit | d391c6217d3214bd8278e1e3517ef57abbc4b317 (patch) | |
tree | 9416b3247e5f4d2ab8ae693e4ec8e45a3b644586 | |
parent | 2ad699080bbe3a88d17a1ff11e5575b76850174f (diff) |
sh: Hook up remaining IRQ sources for R7780MP FPGA.
Signed-off-by: Masayuki Hosokawa <hosokawa@ace-jp.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-rw-r--r-- | arch/sh/boards/renesas/r7780rp/irq-r7780mp.c | 39 | ||||
-rw-r--r-- | include/asm-sh/r7780rp.h | 22 |
2 files changed, 38 insertions, 23 deletions
diff --git a/arch/sh/boards/renesas/r7780rp/irq-r7780mp.c b/arch/sh/boards/renesas/r7780rp/irq-r7780mp.c index 1f8f073f27be..68f0ad1b637d 100644 --- a/arch/sh/boards/renesas/r7780rp/irq-r7780mp.c +++ b/arch/sh/boards/renesas/r7780rp/irq-r7780mp.c | |||
@@ -18,31 +18,44 @@ enum { | |||
18 | UNUSED = 0, | 18 | UNUSED = 0, |
19 | 19 | ||
20 | /* board specific interrupt sources */ | 20 | /* board specific interrupt sources */ |
21 | AX88796, /* Ethernet controller */ | 21 | CF, /* Compact Flash */ |
22 | CF, /* Compact Flash */ | 22 | TP, /* Touch panel */ |
23 | PSW, /* Push Switch */ | 23 | SCIF1, /* FPGA SCIF1 */ |
24 | EXT1, /* EXT1n IRQ */ | 24 | SCIF0, /* FPGA SCIF0 */ |
25 | EXT4, /* EXT4n IRQ */ | 25 | SMBUS, /* SMBUS */ |
26 | RTC, /* RTC Alarm */ | ||
27 | AX88796, /* Ethernet controller */ | ||
28 | PSW, /* Push Switch */ | ||
29 | |||
30 | /* external bus connector */ | ||
31 | EXT1, EXT2, EXT4, EXT5, EXT6, | ||
26 | }; | 32 | }; |
27 | 33 | ||
28 | static struct intc_vect vectors[] __initdata = { | 34 | static struct intc_vect vectors[] __initdata = { |
29 | INTC_IRQ(CF, IRQ_CF), | 35 | INTC_IRQ(CF, IRQ_CF), |
30 | INTC_IRQ(PSW, IRQ_PSW), | 36 | INTC_IRQ(TP, IRQ_TP), |
37 | INTC_IRQ(SCIF1, IRQ_SCIF1), | ||
38 | INTC_IRQ(SCIF0, IRQ_SCIF0), | ||
39 | INTC_IRQ(SMBUS, IRQ_SMBUS), | ||
40 | INTC_IRQ(RTC, IRQ_RTC), | ||
31 | INTC_IRQ(AX88796, IRQ_AX88796), | 41 | INTC_IRQ(AX88796, IRQ_AX88796), |
32 | INTC_IRQ(EXT1, IRQ_EXT1), | 42 | INTC_IRQ(PSW, IRQ_PSW), |
33 | INTC_IRQ(EXT4, IRQ_EXT4), | 43 | |
44 | INTC_IRQ(EXT1, IRQ_EXT1), INTC_IRQ(EXT2, IRQ_EXT2), | ||
45 | INTC_IRQ(EXT4, IRQ_EXT4), INTC_IRQ(EXT5, IRQ_EXT5), | ||
46 | INTC_IRQ(EXT6, IRQ_EXT6), | ||
34 | }; | 47 | }; |
35 | 48 | ||
36 | static struct intc_mask_reg mask_registers[] __initdata = { | 49 | static struct intc_mask_reg mask_registers[] __initdata = { |
37 | { 0xa4000000, 0, 16, /* IRLMSK */ | 50 | { 0xa4000000, 0, 16, /* IRLMSK */ |
38 | { 0, 0, 0, 0, CF, 0, 0, 0, | 51 | { SCIF0, SCIF1, RTC, 0, CF, 0, TP, SMBUS, |
39 | 0, 0, 0, EXT4, 0, EXT1, PSW, AX88796 } }, | 52 | 0, EXT6, EXT5, EXT4, EXT2, EXT1, PSW, AX88796 } }, |
40 | }; | 53 | }; |
41 | 54 | ||
42 | static unsigned char irl2irq[HL_NR_IRL] __initdata = { | 55 | static unsigned char irl2irq[HL_NR_IRL] __initdata = { |
43 | 0, IRQ_CF, 0, 0, | 56 | 0, IRQ_CF, IRQ_TP, IRQ_SCIF1, |
44 | 0, 0, 0, 0, | 57 | IRQ_SCIF0, IRQ_SMBUS, IRQ_RTC, IRQ_EXT6, |
45 | 0, IRQ_EXT4, 0, IRQ_EXT1, | 58 | IRQ_EXT5, IRQ_EXT4, IRQ_EXT2, IRQ_EXT1, |
46 | 0, IRQ_AX88796, IRQ_PSW, | 59 | 0, IRQ_AX88796, IRQ_PSW, |
47 | }; | 60 | }; |
48 | 61 | ||
diff --git a/include/asm-sh/r7780rp.h b/include/asm-sh/r7780rp.h index 1770460a4616..a33838f23a6d 100644 --- a/include/asm-sh/r7780rp.h +++ b/include/asm-sh/r7780rp.h | |||
@@ -55,11 +55,11 @@ | |||
55 | #define PA_SCSPTR1 (PA_BCR+0x0524) /* SCIF1 Serial Port control */ | 55 | #define PA_SCSPTR1 (PA_BCR+0x0524) /* SCIF1 Serial Port control */ |
56 | #define PA_SCLSR1 (PA_BCR+0x0528) /* SCIF1 Line Status control */ | 56 | #define PA_SCLSR1 (PA_BCR+0x0528) /* SCIF1 Line Status control */ |
57 | #define PA_SCRER1 (PA_BCR+0x052c) /* SCIF1 Serial Error control */ | 57 | #define PA_SCRER1 (PA_BCR+0x052c) /* SCIF1 Serial Error control */ |
58 | #define PA_ICCR (PA_BCR+0x0600) /* Serial control */ | 58 | #define PA_SMCR (PA_BCR+0x0600) /* 2-wire Serial control */ |
59 | #define PA_SAR (PA_BCR+0x0602) /* Serial Slave control */ | 59 | #define PA_SMSMADR (PA_BCR+0x0602) /* 2-wire Serial Slave control */ |
60 | #define PA_MDR (PA_BCR+0x0604) /* Serial Mode control */ | 60 | #define PA_SMMR (PA_BCR+0x0604) /* 2-wire Serial Mode control */ |
61 | #define PA_ADR1 (PA_BCR+0x0606) /* Serial Address1 control */ | 61 | #define PA_SMSADR1 (PA_BCR+0x0606) /* 2-wire Serial Address1 control */ |
62 | #define PA_DAR1 (PA_BCR+0x0646) /* Serial Data1 control */ | 62 | #define PA_SMTRDR1 (PA_BCR+0x0646) /* 2-wire Serial Data1 control */ |
63 | #define PA_VERREG (PA_BCR+0x0700) /* FPGA Version Register */ | 63 | #define PA_VERREG (PA_BCR+0x0700) /* FPGA Version Register */ |
64 | #define PA_POFF (PA_BCR+0x0800) /* System Power Off control */ | 64 | #define PA_POFF (PA_BCR+0x0800) /* System Power Off control */ |
65 | #define PA_PMR (PA_BCR+0x0900) /* */ | 65 | #define PA_PMR (PA_BCR+0x0900) /* */ |
@@ -107,11 +107,11 @@ | |||
107 | #define PA_SCFCR (PA_BCR+0x040c) /* SCIF FIFO control */ | 107 | #define PA_SCFCR (PA_BCR+0x040c) /* SCIF FIFO control */ |
108 | #define PA_SCFDR (PA_BCR+0x040e) /* SCIF FIFO data control */ | 108 | #define PA_SCFDR (PA_BCR+0x040e) /* SCIF FIFO data control */ |
109 | #define PA_SCLSR (PA_BCR+0x0412) /* SCIF Line Status control */ | 109 | #define PA_SCLSR (PA_BCR+0x0412) /* SCIF Line Status control */ |
110 | #define PA_ICCR (PA_BCR+0x0500) /* Serial control */ | 110 | #define PA_SMCR (PA_BCR+0x0500) /* 2-wire Serial control */ |
111 | #define PA_SAR (PA_BCR+0x0502) /* Serial Slave control */ | 111 | #define PA_SMSMADR (PA_BCR+0x0502) /* 2-wire Serial Slave control */ |
112 | #define PA_MDR (PA_BCR+0x0504) /* Serial Mode control */ | 112 | #define PA_SMMR (PA_BCR+0x0504) /* 2-wire Serial Mode control */ |
113 | #define PA_ADR1 (PA_BCR+0x0506) /* Serial Address1 control */ | 113 | #define PA_SMSADR1 (PA_BCR+0x0506) /* 2-wire Serial Address1 control */ |
114 | #define PA_DAR1 (PA_BCR+0x0546) /* Serial Data1 control */ | 114 | #define PA_SMTRDR1 (PA_BCR+0x0546) /* 2-wire Serial Data1 control */ |
115 | #define PA_VERREG (PA_BCR+0x0600) /* FPGA Version Register */ | 115 | #define PA_VERREG (PA_BCR+0x0600) /* FPGA Version Register */ |
116 | 116 | ||
117 | #define PA_AX88796L 0xa5800400 /* AX88796L Area */ | 117 | #define PA_AX88796L 0xa5800400 /* AX88796L Area */ |
@@ -190,6 +190,8 @@ | |||
190 | #define IRQ_TP (HL_FPGA_IRQ_BASE + 12) | 190 | #define IRQ_TP (HL_FPGA_IRQ_BASE + 12) |
191 | #define IRQ_RTC (HL_FPGA_IRQ_BASE + 13) | 191 | #define IRQ_RTC (HL_FPGA_IRQ_BASE + 13) |
192 | #define IRQ_TH_ALERT (HL_FPGA_IRQ_BASE + 14) | 192 | #define IRQ_TH_ALERT (HL_FPGA_IRQ_BASE + 14) |
193 | #define IRQ_SCIF0 (HL_FPGA_IRQ_BASE + 15) | ||
194 | #define IRQ_SCIF1 (HL_FPGA_IRQ_BASE + 16) | ||
193 | 195 | ||
194 | unsigned char *highlander_init_irq_r7780mp(void); | 196 | unsigned char *highlander_init_irq_r7780mp(void); |
195 | unsigned char *highlander_init_irq_r7780rp(void); | 197 | unsigned char *highlander_init_irq_r7780rp(void); |