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authorHans de Goede <hdegoede@redhat.com>2014-02-23 06:52:41 -0500
committerTejun Heo <tj@kernel.org>2014-02-23 11:09:57 -0500
commitd2ec147a76d0e051db19d378cac3ee7721877717 (patch)
treebd4e448fc7ad7c6e3ea5219d7657269d5ae87e2b
parent6ef95e87763fd69889655f4f14e499377a54d066 (diff)
ahci_sunxi: Use msleep instead of mdelay
ahci_sunxi_phy_init is called from the probe and resume code paths, and sleeping is safe in both, so use msleep instead of mdelay. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Tejun Heo <tj@kernel.org>
-rw-r--r--drivers/ata/ahci_sunxi.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/ata/ahci_sunxi.c b/drivers/ata/ahci_sunxi.c
index 001f7dfc467b..d1bf3f786b02 100644
--- a/drivers/ata/ahci_sunxi.c
+++ b/drivers/ata/ahci_sunxi.c
@@ -90,7 +90,7 @@ static int ahci_sunxi_phy_init(struct device *dev, void __iomem *reg_base)
90 90
91 /* This magic is from the original code */ 91 /* This magic is from the original code */
92 writel(0, reg_base + AHCI_RWCR); 92 writel(0, reg_base + AHCI_RWCR);
93 mdelay(5); 93 msleep(5);
94 94
95 sunxi_setbits(reg_base + AHCI_PHYCS1R, BIT(19)); 95 sunxi_setbits(reg_base + AHCI_PHYCS1R, BIT(19));
96 sunxi_clrsetbits(reg_base + AHCI_PHYCS0R, 96 sunxi_clrsetbits(reg_base + AHCI_PHYCS0R,
@@ -105,7 +105,7 @@ static int ahci_sunxi_phy_init(struct device *dev, void __iomem *reg_base)
105 (0x7 << 20), (0x3 << 20)); 105 (0x7 << 20), (0x3 << 20));
106 sunxi_clrsetbits(reg_base + AHCI_PHYCS2R, 106 sunxi_clrsetbits(reg_base + AHCI_PHYCS2R,
107 (0x1f << 5), (0x19 << 5)); 107 (0x1f << 5), (0x19 << 5));
108 mdelay(5); 108 msleep(5);
109 109
110 sunxi_setbits(reg_base + AHCI_PHYCS0R, (0x1 << 19)); 110 sunxi_setbits(reg_base + AHCI_PHYCS0R, (0x1 << 19));
111 111
@@ -137,7 +137,7 @@ static int ahci_sunxi_phy_init(struct device *dev, void __iomem *reg_base)
137 udelay(1); 137 udelay(1);
138 } while (1); 138 } while (1);
139 139
140 mdelay(15); 140 msleep(15);
141 141
142 writel(0x7, reg_base + AHCI_RWCR); 142 writel(0x7, reg_base + AHCI_RWCR);
143 143