aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorAnton Tikhomirov <av.tikhomirov@samsung.com>2012-02-15 03:04:56 -0500
committerFelipe Balbi <balbi@ti.com>2012-03-02 05:11:28 -0500
commitd28a9689c93195d39f91f35a9519876688605b65 (patch)
tree39d7c0b3f80657039cefc3996c20010bdbabbed0
parentf6bafc6a1c9d58f0c234ac5052b9c09b0747348c (diff)
usb: dwc3: Add Exynos Specific Glue layer
Adds Exynos Specific Glue layer to support USB peripherals on Samsung Exynos5 chips. [ balbi@ti.com : prevent compilation of Exynos glue layer on platforms which don't provide clk API implementation ] Signed-off-by: Anton Tikhomirov <av.tikhomirov@samsung.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
-rw-r--r--drivers/usb/dwc3/Makefile13
-rw-r--r--drivers/usb/dwc3/dwc3-exynos.c151
-rw-r--r--include/linux/platform_data/dwc3-exynos.h24
3 files changed, 188 insertions, 0 deletions
diff --git a/drivers/usb/dwc3/Makefile b/drivers/usb/dwc3/Makefile
index 900ae74357f1..d441fe4c180b 100644
--- a/drivers/usb/dwc3/Makefile
+++ b/drivers/usb/dwc3/Makefile
@@ -28,6 +28,19 @@ endif
28 28
29obj-$(CONFIG_USB_DWC3) += dwc3-omap.o 29obj-$(CONFIG_USB_DWC3) += dwc3-omap.o
30 30
31##
32# REVISIT Samsung Exynos platform needs the clk API which isn't
33# defined on all architectures. If we allow dwc3-exynos.c compile
34# always we will fail the linking phase on those architectures
35# which don't provide clk api implementation and that's unnaceptable.
36#
37# When Samsung's platform start supporting pm_runtime, this check
38# for HAVE_CLK should be removed.
39##
40ifneq ($(CONFIG_HAVE_CLK),)
41 obj-$(CONFIG_USB_DWC3) += dwc3-exynos.o
42endif
43
31ifneq ($(CONFIG_PCI),) 44ifneq ($(CONFIG_PCI),)
32 obj-$(CONFIG_USB_DWC3) += dwc3-pci.o 45 obj-$(CONFIG_USB_DWC3) += dwc3-pci.o
33endif 46endif
diff --git a/drivers/usb/dwc3/dwc3-exynos.c b/drivers/usb/dwc3/dwc3-exynos.c
new file mode 100644
index 000000000000..d19030198086
--- /dev/null
+++ b/drivers/usb/dwc3/dwc3-exynos.c
@@ -0,0 +1,151 @@
1/**
2 * dwc3-exynos.c - Samsung EXYNOS DWC3 Specific Glue layer
3 *
4 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 *
7 * Author: Anton Tikhomirov <av.tikhomirov@samsung.com>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 */
14
15#include <linux/module.h>
16#include <linux/kernel.h>
17#include <linux/slab.h>
18#include <linux/platform_device.h>
19#include <linux/platform_data/dwc3-exynos.h>
20#include <linux/dma-mapping.h>
21#include <linux/module.h>
22#include <linux/clk.h>
23
24#include "core.h"
25
26struct dwc3_exynos {
27 struct platform_device *dwc3;
28 struct device *dev;
29
30 struct clk *clk;
31};
32
33static int __devinit dwc3_exynos_probe(struct platform_device *pdev)
34{
35 struct dwc3_exynos_data *pdata = pdev->dev.platform_data;
36 struct platform_device *dwc3;
37 struct dwc3_exynos *exynos;
38 struct clk *clk;
39
40 int devid;
41 int ret = -ENOMEM;
42
43 exynos = kzalloc(sizeof(*exynos), GFP_KERNEL);
44 if (!exynos) {
45 dev_err(&pdev->dev, "not enough memory\n");
46 goto err0;
47 }
48
49 platform_set_drvdata(pdev, exynos);
50
51 devid = dwc3_get_device_id();
52 if (devid < 0)
53 goto err1;
54
55 dwc3 = platform_device_alloc("dwc3", devid);
56 if (!dwc3) {
57 dev_err(&pdev->dev, "couldn't allocate dwc3 device\n");
58 goto err2;
59 }
60
61 clk = clk_get(&pdev->dev, "usbdrd30");
62 if (IS_ERR(clk)) {
63 dev_err(&pdev->dev, "couldn't get clock\n");
64 ret = -EINVAL;
65 goto err3;
66 }
67
68 dma_set_coherent_mask(&dwc3->dev, pdev->dev.coherent_dma_mask);
69
70 dwc3->dev.parent = &pdev->dev;
71 dwc3->dev.dma_mask = pdev->dev.dma_mask;
72 dwc3->dev.dma_parms = pdev->dev.dma_parms;
73 exynos->dwc3 = dwc3;
74 exynos->dev = &pdev->dev;
75 exynos->clk = clk;
76
77 clk_enable(exynos->clk);
78
79 /* PHY initialization */
80 if (!pdata) {
81 dev_dbg(&pdev->dev, "missing platform data\n");
82 } else {
83 if (pdata->phy_init)
84 pdata->phy_init(pdev, pdata->phy_type);
85 }
86
87 ret = platform_device_add_resources(dwc3, pdev->resource,
88 pdev->num_resources);
89 if (ret) {
90 dev_err(&pdev->dev, "couldn't add resources to dwc3 device\n");
91 goto err4;
92 }
93
94 ret = platform_device_add(dwc3);
95 if (ret) {
96 dev_err(&pdev->dev, "failed to register dwc3 device\n");
97 goto err4;
98 }
99
100 return 0;
101
102err4:
103 if (pdata && pdata->phy_exit)
104 pdata->phy_exit(pdev, pdata->phy_type);
105
106 clk_disable(clk);
107 clk_put(clk);
108err3:
109 platform_device_put(dwc3);
110err2:
111 dwc3_put_device_id(devid);
112err1:
113 kfree(exynos);
114err0:
115 return ret;
116}
117
118static int __devexit dwc3_exynos_remove(struct platform_device *pdev)
119{
120 struct dwc3_exynos *exynos = platform_get_drvdata(pdev);
121 struct dwc3_exynos_data *pdata = pdev->dev.platform_data;
122
123 platform_device_unregister(exynos->dwc3);
124
125 dwc3_put_device_id(exynos->dwc3->id);
126
127 if (pdata && pdata->phy_exit)
128 pdata->phy_exit(pdev, pdata->phy_type);
129
130 clk_disable(exynos->clk);
131 clk_put(exynos->clk);
132
133 kfree(exynos);
134
135 return 0;
136}
137
138static struct platform_driver dwc3_exynos_driver = {
139 .probe = dwc3_exynos_probe,
140 .remove = __devexit_p(dwc3_exynos_remove),
141 .driver = {
142 .name = "exynos-dwc3",
143 },
144};
145
146module_platform_driver(dwc3_exynos_driver);
147
148MODULE_ALIAS("platform:exynos-dwc3");
149MODULE_AUTHOR("Anton Tikhomirov <av.tikhomirov@samsung.com>");
150MODULE_LICENSE("GPL");
151MODULE_DESCRIPTION("DesignWare USB3 EXYNOS Glue Layer");
diff --git a/include/linux/platform_data/dwc3-exynos.h b/include/linux/platform_data/dwc3-exynos.h
new file mode 100644
index 000000000000..5eb7da9b3772
--- /dev/null
+++ b/include/linux/platform_data/dwc3-exynos.h
@@ -0,0 +1,24 @@
1/**
2 * dwc3-exynos.h - Samsung EXYNOS DWC3 Specific Glue layer, header.
3 *
4 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 *
7 * Author: Anton Tikhomirov <av.tikhomirov@samsung.com>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 */
14
15#ifndef _DWC3_EXYNOS_H_
16#define _DWC3_EXYNOS_H_
17
18struct dwc3_exynos_data {
19 int phy_type;
20 int (*phy_init)(struct platform_device *pdev, int type);
21 int (*phy_exit)(struct platform_device *pdev, int type);
22};
23
24#endif /* _DWC3_EXYNOS_H_ */