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authorMaxime Ripard <maxime.ripard@free-electrons.com>2014-03-31 08:54:58 -0400
committerWolfram Sang <wsa@the-dreams.de>2014-05-22 04:10:28 -0400
commitd275545e0e220615a38812b77fea59a5dfc7bfd1 (patch)
tree4a04b0b8b68251886a1c1fcc23b97656eaf106ae
parenta0682a31588990cb6f870f1a48cf019525605625 (diff)
ARM: sunxi: dt: Convert to the new i2c compatibles
Switch the device tree to the new compatibles introduced in the i2c drivers to have a common pattern accross all Allwinner SoCs. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-rw-r--r--arch/arm/boot/dts/sun4i-a10.dtsi6
-rw-r--r--arch/arm/boot/dts/sun5i-a10s.dtsi6
-rw-r--r--arch/arm/boot/dts/sun5i-a13.dtsi6
-rw-r--r--arch/arm/boot/dts/sun7i-a20.dtsi10
4 files changed, 14 insertions, 14 deletions
diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
index 9174724571e2..e45fed7fccd4 100644
--- a/arch/arm/boot/dts/sun4i-a10.dtsi
+++ b/arch/arm/boot/dts/sun4i-a10.dtsi
@@ -641,7 +641,7 @@
641 }; 641 };
642 642
643 i2c0: i2c@01c2ac00 { 643 i2c0: i2c@01c2ac00 {
644 compatible = "allwinner,sun4i-i2c"; 644 compatible = "allwinner,sun4i-a10-i2c";
645 reg = <0x01c2ac00 0x400>; 645 reg = <0x01c2ac00 0x400>;
646 interrupts = <7>; 646 interrupts = <7>;
647 clocks = <&apb1_gates 0>; 647 clocks = <&apb1_gates 0>;
@@ -650,7 +650,7 @@
650 }; 650 };
651 651
652 i2c1: i2c@01c2b000 { 652 i2c1: i2c@01c2b000 {
653 compatible = "allwinner,sun4i-i2c"; 653 compatible = "allwinner,sun4i-a10-i2c";
654 reg = <0x01c2b000 0x400>; 654 reg = <0x01c2b000 0x400>;
655 interrupts = <8>; 655 interrupts = <8>;
656 clocks = <&apb1_gates 1>; 656 clocks = <&apb1_gates 1>;
@@ -659,7 +659,7 @@
659 }; 659 };
660 660
661 i2c2: i2c@01c2b400 { 661 i2c2: i2c@01c2b400 {
662 compatible = "allwinner,sun4i-i2c"; 662 compatible = "allwinner,sun4i-a10-i2c";
663 reg = <0x01c2b400 0x400>; 663 reg = <0x01c2b400 0x400>;
664 interrupts = <9>; 664 interrupts = <9>;
665 clocks = <&apb1_gates 2>; 665 clocks = <&apb1_gates 2>;
diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi b/arch/arm/boot/dts/sun5i-a10s.dtsi
index 79989ed5658d..e260d7da86d6 100644
--- a/arch/arm/boot/dts/sun5i-a10s.dtsi
+++ b/arch/arm/boot/dts/sun5i-a10s.dtsi
@@ -519,7 +519,7 @@
519 i2c0: i2c@01c2ac00 { 519 i2c0: i2c@01c2ac00 {
520 #address-cells = <1>; 520 #address-cells = <1>;
521 #size-cells = <0>; 521 #size-cells = <0>;
522 compatible = "allwinner,sun4i-i2c"; 522 compatible = "allwinner,sun5i-a10s-i2c", "allwinner,sun4i-a10-i2c";
523 reg = <0x01c2ac00 0x400>; 523 reg = <0x01c2ac00 0x400>;
524 interrupts = <7>; 524 interrupts = <7>;
525 clocks = <&apb1_gates 0>; 525 clocks = <&apb1_gates 0>;
@@ -530,7 +530,7 @@
530 i2c1: i2c@01c2b000 { 530 i2c1: i2c@01c2b000 {
531 #address-cells = <1>; 531 #address-cells = <1>;
532 #size-cells = <0>; 532 #size-cells = <0>;
533 compatible = "allwinner,sun4i-i2c"; 533 compatible = "allwinner,sun5i-a10s-i2c", "allwinner,sun4i-a10-i2c";
534 reg = <0x01c2b000 0x400>; 534 reg = <0x01c2b000 0x400>;
535 interrupts = <8>; 535 interrupts = <8>;
536 clocks = <&apb1_gates 1>; 536 clocks = <&apb1_gates 1>;
@@ -541,7 +541,7 @@
541 i2c2: i2c@01c2b400 { 541 i2c2: i2c@01c2b400 {
542 #address-cells = <1>; 542 #address-cells = <1>;
543 #size-cells = <0>; 543 #size-cells = <0>;
544 compatible = "allwinner,sun4i-i2c"; 544 compatible = "allwinner,sun5i-a10s-i2c", "allwinner,sun4i-a10-i2c";
545 reg = <0x01c2b400 0x400>; 545 reg = <0x01c2b400 0x400>;
546 interrupts = <9>; 546 interrupts = <9>;
547 clocks = <&apb1_gates 2>; 547 clocks = <&apb1_gates 2>;
diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi
index f01c315bdc4b..1bfd625f020e 100644
--- a/arch/arm/boot/dts/sun5i-a13.dtsi
+++ b/arch/arm/boot/dts/sun5i-a13.dtsi
@@ -461,7 +461,7 @@
461 }; 461 };
462 462
463 i2c0: i2c@01c2ac00 { 463 i2c0: i2c@01c2ac00 {
464 compatible = "allwinner,sun4i-i2c"; 464 compatible = "allwinner,sun5i-a13-i2c", "allwinner,sun4i-a10-i2c";
465 reg = <0x01c2ac00 0x400>; 465 reg = <0x01c2ac00 0x400>;
466 interrupts = <7>; 466 interrupts = <7>;
467 clocks = <&apb1_gates 0>; 467 clocks = <&apb1_gates 0>;
@@ -470,7 +470,7 @@
470 }; 470 };
471 471
472 i2c1: i2c@01c2b000 { 472 i2c1: i2c@01c2b000 {
473 compatible = "allwinner,sun4i-i2c"; 473 compatible = "allwinner,sun5i-a13-i2c", "allwinner,sun4i-a10-i2c";
474 reg = <0x01c2b000 0x400>; 474 reg = <0x01c2b000 0x400>;
475 interrupts = <8>; 475 interrupts = <8>;
476 clocks = <&apb1_gates 1>; 476 clocks = <&apb1_gates 1>;
@@ -479,7 +479,7 @@
479 }; 479 };
480 480
481 i2c2: i2c@01c2b400 { 481 i2c2: i2c@01c2b400 {
482 compatible = "allwinner,sun4i-i2c"; 482 compatible = "allwinner,sun5i-a13-i2c", "allwinner,sun4i-a10-i2c";
483 reg = <0x01c2b400 0x400>; 483 reg = <0x01c2b400 0x400>;
484 interrupts = <9>; 484 interrupts = <9>;
485 clocks = <&apb1_gates 2>; 485 clocks = <&apb1_gates 2>;
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index aba1c8a3f388..7fd44e59c09c 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -778,7 +778,7 @@
778 }; 778 };
779 779
780 i2c0: i2c@01c2ac00 { 780 i2c0: i2c@01c2ac00 {
781 compatible = "allwinner,sun4i-i2c"; 781 compatible = "allwinner,sun7i-a20-i2c", "allwinner,sun4i-a10-i2c";
782 reg = <0x01c2ac00 0x400>; 782 reg = <0x01c2ac00 0x400>;
783 interrupts = <0 7 4>; 783 interrupts = <0 7 4>;
784 clocks = <&apb1_gates 0>; 784 clocks = <&apb1_gates 0>;
@@ -787,7 +787,7 @@
787 }; 787 };
788 788
789 i2c1: i2c@01c2b000 { 789 i2c1: i2c@01c2b000 {
790 compatible = "allwinner,sun4i-i2c"; 790 compatible = "allwinner,sun7i-a20-i2c", "allwinner,sun4i-a10-i2c";
791 reg = <0x01c2b000 0x400>; 791 reg = <0x01c2b000 0x400>;
792 interrupts = <0 8 4>; 792 interrupts = <0 8 4>;
793 clocks = <&apb1_gates 1>; 793 clocks = <&apb1_gates 1>;
@@ -796,7 +796,7 @@
796 }; 796 };
797 797
798 i2c2: i2c@01c2b400 { 798 i2c2: i2c@01c2b400 {
799 compatible = "allwinner,sun4i-i2c"; 799 compatible = "allwinner,sun7i-a20-i2c", "allwinner,sun4i-a10-i2c";
800 reg = <0x01c2b400 0x400>; 800 reg = <0x01c2b400 0x400>;
801 interrupts = <0 9 4>; 801 interrupts = <0 9 4>;
802 clocks = <&apb1_gates 2>; 802 clocks = <&apb1_gates 2>;
@@ -805,7 +805,7 @@
805 }; 805 };
806 806
807 i2c3: i2c@01c2b800 { 807 i2c3: i2c@01c2b800 {
808 compatible = "allwinner,sun4i-i2c"; 808 compatible = "allwinner,sun7i-a20-i2c", "allwinner,sun4i-a10-i2c";
809 reg = <0x01c2b800 0x400>; 809 reg = <0x01c2b800 0x400>;
810 interrupts = <0 88 4>; 810 interrupts = <0 88 4>;
811 clocks = <&apb1_gates 3>; 811 clocks = <&apb1_gates 3>;
@@ -814,7 +814,7 @@
814 }; 814 };
815 815
816 i2c4: i2c@01c2c000 { 816 i2c4: i2c@01c2c000 {
817 compatible = "allwinner,sun4i-i2c"; 817 compatible = "allwinner,sun7i-a20-i2c", "allwinner,sun4i-a10-i2c";
818 reg = <0x01c2c000 0x400>; 818 reg = <0x01c2c000 0x400>;
819 interrupts = <0 89 4>; 819 interrupts = <0 89 4>;
820 clocks = <&apb1_gates 15>; 820 clocks = <&apb1_gates 15>;