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authorGuennadi Liakhovetski <g.liakhovetski@gmx.de>2013-06-21 03:10:35 -0400
committerSimon Horman <horms+renesas@verge.net.au>2013-07-17 01:25:36 -0400
commitd1c3c959f2206dad0582876af2510aded4f9eac5 (patch)
tree7b52af5e65df3f0434040c03a7235630edbfefd2
parent181135e0b7f58735969619c89548f6a37cd0ee36 (diff)
ARM: shmobile: r8a73a4: safeguard against wrong clk_set_rate() uses
clk_set_rate() should only be called with exact rates, returned by clk_round_rate(). However, it is still good to verify, that the value, passed to clock's .set_rate() method is at least valid. This patch adds such a check for the Z-clock on r8a73a4. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-rw-r--r--arch/arm/mach-shmobile/clock-r8a73a4.c14
1 files changed, 13 insertions, 1 deletions
diff --git a/arch/arm/mach-shmobile/clock-r8a73a4.c b/arch/arm/mach-shmobile/clock-r8a73a4.c
index 824789c26fb6..22f10ff40272 100644
--- a/arch/arm/mach-shmobile/clock-r8a73a4.c
+++ b/arch/arm/mach-shmobile/clock-r8a73a4.c
@@ -225,16 +225,28 @@ static int zclk_set_rate(struct clk *clk, unsigned long rate)
225 goto done; 225 goto done;
226 } 226 }
227 227
228 frqcrc = clk->mapped_reg + (FRQCRC - (u32)clk->enable_reg); 228 /*
229 * Users are supposed to first call clk_set_rate() only with
230 * clk_round_rate() results. So, we don't fix wrong rates here, but
231 * guard against them anyway
232 */
229 233
230 p_rate = clk_get_rate(clk->parent); 234 p_rate = clk_get_rate(clk->parent);
231 if (rate == p_rate) { 235 if (rate == p_rate) {
232 val = 0; 236 val = 0;
233 } else { 237 } else {
234 step = DIV_ROUND_CLOSEST(p_rate, 32); 238 step = DIV_ROUND_CLOSEST(p_rate, 32);
239
240 if (rate > p_rate || rate < step) {
241 ret = -EINVAL;
242 goto done;
243 }
244
235 val = 32 - rate / step; 245 val = 32 - rate / step;
236 } 246 }
237 247
248 frqcrc = clk->mapped_reg + (FRQCRC - (u32)clk->enable_reg);
249
238 iowrite32((ioread32(frqcrc) & ~(clk->div_mask << clk->enable_bit)) | 250 iowrite32((ioread32(frqcrc) & ~(clk->div_mask << clk->enable_bit)) |
239 (val << clk->enable_bit), frqcrc); 251 (val << clk->enable_bit), frqcrc);
240 252