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authorArnd Bergmann <arnd@arndb.de>2012-05-03 17:22:27 -0400
committerMauro Carvalho Chehab <mchehab@redhat.com>2012-05-15 06:50:27 -0400
commitd0f8dfc6e74df5cdefb65ae27d52d848d3973cc8 (patch)
tree05ce37c07d6afbb4cef690c6d4f1c168f682c765
parent5cbd28df305ab29b7e43bd8e901e7824f7ed9417 (diff)
[media] video/omap24xxcam: use __iomem annotations
MMIO registers are __iomem tokens in virtual address space, not integers. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
-rw-r--r--drivers/media/video/omap24xxcam-dma.c20
-rw-r--r--drivers/media/video/omap24xxcam.c3
-rw-r--r--drivers/media/video/omap24xxcam.h14
3 files changed, 18 insertions, 19 deletions
diff --git a/drivers/media/video/omap24xxcam-dma.c b/drivers/media/video/omap24xxcam-dma.c
index 3ea38a8def8e..b5ae170de4a5 100644
--- a/drivers/media/video/omap24xxcam-dma.c
+++ b/drivers/media/video/omap24xxcam-dma.c
@@ -38,7 +38,7 @@
38 */ 38 */
39 39
40/* Ack all interrupt on CSR and IRQSTATUS_L0 */ 40/* Ack all interrupt on CSR and IRQSTATUS_L0 */
41static void omap24xxcam_dmahw_ack_all(unsigned long base) 41static void omap24xxcam_dmahw_ack_all(void __iomem *base)
42{ 42{
43 u32 csr; 43 u32 csr;
44 int i; 44 int i;
@@ -52,7 +52,7 @@ static void omap24xxcam_dmahw_ack_all(unsigned long base)
52} 52}
53 53
54/* Ack dmach on CSR and IRQSTATUS_L0 */ 54/* Ack dmach on CSR and IRQSTATUS_L0 */
55static u32 omap24xxcam_dmahw_ack_ch(unsigned long base, int dmach) 55static u32 omap24xxcam_dmahw_ack_ch(void __iomem *base, int dmach)
56{ 56{
57 u32 csr; 57 u32 csr;
58 58
@@ -65,12 +65,12 @@ static u32 omap24xxcam_dmahw_ack_ch(unsigned long base, int dmach)
65 return csr; 65 return csr;
66} 66}
67 67
68static int omap24xxcam_dmahw_running(unsigned long base, int dmach) 68static int omap24xxcam_dmahw_running(void __iomem *base, int dmach)
69{ 69{
70 return omap24xxcam_reg_in(base, CAMDMA_CCR(dmach)) & CAMDMA_CCR_ENABLE; 70 return omap24xxcam_reg_in(base, CAMDMA_CCR(dmach)) & CAMDMA_CCR_ENABLE;
71} 71}
72 72
73static void omap24xxcam_dmahw_transfer_setup(unsigned long base, int dmach, 73static void omap24xxcam_dmahw_transfer_setup(void __iomem *base, int dmach,
74 dma_addr_t start, u32 len) 74 dma_addr_t start, u32 len)
75{ 75{
76 omap24xxcam_reg_out(base, CAMDMA_CCR(dmach), 76 omap24xxcam_reg_out(base, CAMDMA_CCR(dmach),
@@ -112,7 +112,7 @@ static void omap24xxcam_dmahw_transfer_setup(unsigned long base, int dmach,
112 | CAMDMA_CICR_DROP_IE); 112 | CAMDMA_CICR_DROP_IE);
113} 113}
114 114
115static void omap24xxcam_dmahw_transfer_start(unsigned long base, int dmach) 115static void omap24xxcam_dmahw_transfer_start(void __iomem *base, int dmach)
116{ 116{
117 omap24xxcam_reg_out(base, CAMDMA_CCR(dmach), 117 omap24xxcam_reg_out(base, CAMDMA_CCR(dmach),
118 CAMDMA_CCR_SEL_SRC_DST_SYNC 118 CAMDMA_CCR_SEL_SRC_DST_SYNC
@@ -124,7 +124,7 @@ static void omap24xxcam_dmahw_transfer_start(unsigned long base, int dmach)
124 | CAMDMA_CCR_SYNCHRO_CAMERA); 124 | CAMDMA_CCR_SYNCHRO_CAMERA);
125} 125}
126 126
127static void omap24xxcam_dmahw_transfer_chain(unsigned long base, int dmach, 127static void omap24xxcam_dmahw_transfer_chain(void __iomem *base, int dmach,
128 int free_dmach) 128 int free_dmach)
129{ 129{
130 int prev_dmach, ch; 130 int prev_dmach, ch;
@@ -160,7 +160,7 @@ static void omap24xxcam_dmahw_transfer_chain(unsigned long base, int dmach,
160 * controller may not be idle after this routine completes, because 160 * controller may not be idle after this routine completes, because
161 * the completion routines might start new transfers. 161 * the completion routines might start new transfers.
162 */ 162 */
163static void omap24xxcam_dmahw_abort_ch(unsigned long base, int dmach) 163static void omap24xxcam_dmahw_abort_ch(void __iomem *base, int dmach)
164{ 164{
165 /* mask all interrupts from this channel */ 165 /* mask all interrupts from this channel */
166 omap24xxcam_reg_out(base, CAMDMA_CICR(dmach), 0); 166 omap24xxcam_reg_out(base, CAMDMA_CICR(dmach), 0);
@@ -171,7 +171,7 @@ static void omap24xxcam_dmahw_abort_ch(unsigned long base, int dmach)
171 omap24xxcam_reg_merge(base, CAMDMA_CCR(dmach), 0, CAMDMA_CCR_ENABLE); 171 omap24xxcam_reg_merge(base, CAMDMA_CCR(dmach), 0, CAMDMA_CCR_ENABLE);
172} 172}
173 173
174static void omap24xxcam_dmahw_init(unsigned long base) 174static void omap24xxcam_dmahw_init(void __iomem *base)
175{ 175{
176 omap24xxcam_reg_out(base, CAMDMA_OCP_SYSCONFIG, 176 omap24xxcam_reg_out(base, CAMDMA_OCP_SYSCONFIG,
177 CAMDMA_OCP_SYSCONFIG_MIDLEMODE_FSTANDBY 177 CAMDMA_OCP_SYSCONFIG_MIDLEMODE_FSTANDBY
@@ -362,7 +362,7 @@ void omap24xxcam_dma_hwinit(struct omap24xxcam_dma *dma)
362} 362}
363 363
364static void omap24xxcam_dma_init(struct omap24xxcam_dma *dma, 364static void omap24xxcam_dma_init(struct omap24xxcam_dma *dma,
365 unsigned long base) 365 void __iomem *base)
366{ 366{
367 int ch; 367 int ch;
368 368
@@ -577,7 +577,7 @@ void omap24xxcam_sgdma_sync(struct omap24xxcam_sgdma *sgdma)
577} 577}
578 578
579void omap24xxcam_sgdma_init(struct omap24xxcam_sgdma *sgdma, 579void omap24xxcam_sgdma_init(struct omap24xxcam_sgdma *sgdma,
580 unsigned long base, 580 void __iomem *base,
581 void (*reset_callback)(unsigned long data), 581 void (*reset_callback)(unsigned long data),
582 unsigned long reset_callback_data) 582 unsigned long reset_callback_data)
583{ 583{
diff --git a/drivers/media/video/omap24xxcam.c b/drivers/media/video/omap24xxcam.c
index 7d3864144368..e5015b0d5508 100644
--- a/drivers/media/video/omap24xxcam.c
+++ b/drivers/media/video/omap24xxcam.c
@@ -1776,8 +1776,7 @@ static int __devinit omap24xxcam_probe(struct platform_device *pdev)
1776 cam->mmio_size = resource_size(mem); 1776 cam->mmio_size = resource_size(mem);
1777 1777
1778 /* map the region */ 1778 /* map the region */
1779 cam->mmio_base = (unsigned long) 1779 cam->mmio_base = ioremap_nocache(cam->mmio_base_phys, cam->mmio_size);
1780 ioremap_nocache(cam->mmio_base_phys, cam->mmio_size);
1781 if (!cam->mmio_base) { 1780 if (!cam->mmio_base) {
1782 dev_err(cam->dev, "cannot map camera register I/O region\n"); 1781 dev_err(cam->dev, "cannot map camera register I/O region\n");
1783 goto err; 1782 goto err;
diff --git a/drivers/media/video/omap24xxcam.h b/drivers/media/video/omap24xxcam.h
index 2ce67f5a48d5..d59727afe894 100644
--- a/drivers/media/video/omap24xxcam.h
+++ b/drivers/media/video/omap24xxcam.h
@@ -429,7 +429,7 @@ struct sgdma_state {
429struct omap24xxcam_dma { 429struct omap24xxcam_dma {
430 spinlock_t lock; /* Lock for the whole structure. */ 430 spinlock_t lock; /* Lock for the whole structure. */
431 431
432 unsigned long base; /* base address for dma controller */ 432 void __iomem *base; /* base address for dma controller */
433 433
434 /* While dma_stop!=0, an attempt to start a new DMA transfer will 434 /* While dma_stop!=0, an attempt to start a new DMA transfer will
435 * fail. 435 * fail.
@@ -491,7 +491,7 @@ struct omap24xxcam_device {
491 491
492 /*** hardware resources ***/ 492 /*** hardware resources ***/
493 unsigned int irq; 493 unsigned int irq;
494 unsigned long mmio_base; 494 void __iomem *mmio_base;
495 unsigned long mmio_base_phys; 495 unsigned long mmio_base_phys;
496 unsigned long mmio_size; 496 unsigned long mmio_size;
497 497
@@ -544,22 +544,22 @@ struct omap24xxcam_fh {
544 * 544 *
545 */ 545 */
546 546
547static inline u32 omap24xxcam_reg_in(unsigned long base, u32 offset) 547static inline u32 omap24xxcam_reg_in(u32 __iomem *base, u32 offset)
548{ 548{
549 return readl(base + offset); 549 return readl(base + offset);
550} 550}
551 551
552static inline u32 omap24xxcam_reg_out(unsigned long base, u32 offset, 552static inline u32 omap24xxcam_reg_out(u32 __iomem *base, u32 offset,
553 u32 val) 553 u32 val)
554{ 554{
555 writel(val, base + offset); 555 writel(val, base + offset);
556 return val; 556 return val;
557} 557}
558 558
559static inline u32 omap24xxcam_reg_merge(unsigned long base, u32 offset, 559static inline u32 omap24xxcam_reg_merge(u32 __iomem *base, u32 offset,
560 u32 val, u32 mask) 560 u32 val, u32 mask)
561{ 561{
562 u32 addr = base + offset; 562 u32 __iomem *addr = base + offset;
563 u32 new_val = (readl(addr) & ~mask) | (val & mask); 563 u32 new_val = (readl(addr) & ~mask) | (val & mask);
564 564
565 writel(new_val, addr); 565 writel(new_val, addr);
@@ -585,7 +585,7 @@ int omap24xxcam_sgdma_queue(struct omap24xxcam_sgdma *sgdma,
585 int len, sgdma_callback_t callback, void *arg); 585 int len, sgdma_callback_t callback, void *arg);
586void omap24xxcam_sgdma_sync(struct omap24xxcam_sgdma *sgdma); 586void omap24xxcam_sgdma_sync(struct omap24xxcam_sgdma *sgdma);
587void omap24xxcam_sgdma_init(struct omap24xxcam_sgdma *sgdma, 587void omap24xxcam_sgdma_init(struct omap24xxcam_sgdma *sgdma,
588 unsigned long base, 588 void __iomem *base,
589 void (*reset_callback)(unsigned long data), 589 void (*reset_callback)(unsigned long data),
590 unsigned long reset_callback_data); 590 unsigned long reset_callback_data);
591void omap24xxcam_sgdma_exit(struct omap24xxcam_sgdma *sgdma); 591void omap24xxcam_sgdma_exit(struct omap24xxcam_sgdma *sgdma);