diff options
| author | Thomas Gleixner <tglx@linutronix.de> | 2010-02-17 21:23:03 -0500 |
|---|---|---|
| committer | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2010-02-18 22:52:32 -0500 |
| commit | d0eab3eb557250cead42f22e6f1a4f7e326757f9 (patch) | |
| tree | 0f45e6be4c9729104a8ecef4b8948b2a2ee84c8b | |
| parent | f95e085b2531c86262b97a081eb0d1cf793606d3 (diff) | |
powerpc: Convert pmac_pic_lock to raw_spinlock
pmac_pic_lock needs to be a real spinlock in RT. Convert it to
raw_spinlock.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| -rw-r--r-- | arch/powerpc/platforms/powermac/pic.c | 38 |
1 files changed, 19 insertions, 19 deletions
diff --git a/arch/powerpc/platforms/powermac/pic.c b/arch/powerpc/platforms/powermac/pic.c index 3b62896f9a5b..630a533d0e59 100644 --- a/arch/powerpc/platforms/powermac/pic.c +++ b/arch/powerpc/platforms/powermac/pic.c | |||
| @@ -57,7 +57,7 @@ static int max_irqs; | |||
| 57 | static int max_real_irqs; | 57 | static int max_real_irqs; |
| 58 | static u32 level_mask[4]; | 58 | static u32 level_mask[4]; |
| 59 | 59 | ||
| 60 | static DEFINE_SPINLOCK(pmac_pic_lock); | 60 | static DEFINE_RAW_SPINLOCK(pmac_pic_lock); |
| 61 | 61 | ||
| 62 | #define NR_MASK_WORDS ((NR_IRQS + 31) / 32) | 62 | #define NR_MASK_WORDS ((NR_IRQS + 31) / 32) |
| 63 | static unsigned long ppc_lost_interrupts[NR_MASK_WORDS]; | 63 | static unsigned long ppc_lost_interrupts[NR_MASK_WORDS]; |
| @@ -85,7 +85,7 @@ static void pmac_mask_and_ack_irq(unsigned int virq) | |||
| 85 | int i = src >> 5; | 85 | int i = src >> 5; |
| 86 | unsigned long flags; | 86 | unsigned long flags; |
| 87 | 87 | ||
| 88 | spin_lock_irqsave(&pmac_pic_lock, flags); | 88 | raw_spin_lock_irqsave(&pmac_pic_lock, flags); |
| 89 | __clear_bit(src, ppc_cached_irq_mask); | 89 | __clear_bit(src, ppc_cached_irq_mask); |
| 90 | if (__test_and_clear_bit(src, ppc_lost_interrupts)) | 90 | if (__test_and_clear_bit(src, ppc_lost_interrupts)) |
| 91 | atomic_dec(&ppc_n_lost_interrupts); | 91 | atomic_dec(&ppc_n_lost_interrupts); |
| @@ -97,7 +97,7 @@ static void pmac_mask_and_ack_irq(unsigned int virq) | |||
| 97 | mb(); | 97 | mb(); |
| 98 | } while((in_le32(&pmac_irq_hw[i]->enable) & bit) | 98 | } while((in_le32(&pmac_irq_hw[i]->enable) & bit) |
| 99 | != (ppc_cached_irq_mask[i] & bit)); | 99 | != (ppc_cached_irq_mask[i] & bit)); |
| 100 | spin_unlock_irqrestore(&pmac_pic_lock, flags); | 100 | raw_spin_unlock_irqrestore(&pmac_pic_lock, flags); |
| 101 | } | 101 | } |
| 102 | 102 | ||
| 103 | static void pmac_ack_irq(unsigned int virq) | 103 | static void pmac_ack_irq(unsigned int virq) |
| @@ -107,12 +107,12 @@ static void pmac_ack_irq(unsigned int virq) | |||
| 107 | int i = src >> 5; | 107 | int i = src >> 5; |
| 108 | unsigned long flags; | 108 | unsigned long flags; |
| 109 | 109 | ||
| 110 | spin_lock_irqsave(&pmac_pic_lock, flags); | 110 | raw_spin_lock_irqsave(&pmac_pic_lock, flags); |
| 111 | if (__test_and_clear_bit(src, ppc_lost_interrupts)) | 111 | if (__test_and_clear_bit(src, ppc_lost_interrupts)) |
| 112 | atomic_dec(&ppc_n_lost_interrupts); | 112 | atomic_dec(&ppc_n_lost_interrupts); |
| 113 | out_le32(&pmac_irq_hw[i]->ack, bit); | 113 | out_le32(&pmac_irq_hw[i]->ack, bit); |
| 114 | (void)in_le32(&pmac_irq_hw[i]->ack); | 114 | (void)in_le32(&pmac_irq_hw[i]->ack); |
| 115 | spin_unlock_irqrestore(&pmac_pic_lock, flags); | 115 | raw_spin_unlock_irqrestore(&pmac_pic_lock, flags); |
| 116 | } | 116 | } |
| 117 | 117 | ||
| 118 | static void __pmac_set_irq_mask(unsigned int irq_nr, int nokicklost) | 118 | static void __pmac_set_irq_mask(unsigned int irq_nr, int nokicklost) |
| @@ -152,12 +152,12 @@ static unsigned int pmac_startup_irq(unsigned int virq) | |||
| 152 | unsigned long bit = 1UL << (src & 0x1f); | 152 | unsigned long bit = 1UL << (src & 0x1f); |
| 153 | int i = src >> 5; | 153 | int i = src >> 5; |
| 154 | 154 | ||
| 155 | spin_lock_irqsave(&pmac_pic_lock, flags); | 155 | raw_spin_lock_irqsave(&pmac_pic_lock, flags); |
| 156 | if ((irq_to_desc(virq)->status & IRQ_LEVEL) == 0) | 156 | if ((irq_to_desc(virq)->status & IRQ_LEVEL) == 0) |
| 157 | out_le32(&pmac_irq_hw[i]->ack, bit); | 157 | out_le32(&pmac_irq_hw[i]->ack, bit); |
| 158 | __set_bit(src, ppc_cached_irq_mask); | 158 | __set_bit(src, ppc_cached_irq_mask); |
| 159 | __pmac_set_irq_mask(src, 0); | 159 | __pmac_set_irq_mask(src, 0); |
| 160 | spin_unlock_irqrestore(&pmac_pic_lock, flags); | 160 | raw_spin_unlock_irqrestore(&pmac_pic_lock, flags); |
| 161 | 161 | ||
| 162 | return 0; | 162 | return 0; |
| 163 | } | 163 | } |
| @@ -167,10 +167,10 @@ static void pmac_mask_irq(unsigned int virq) | |||
| 167 | unsigned long flags; | 167 | unsigned long flags; |
| 168 | unsigned int src = irq_map[virq].hwirq; | 168 | unsigned int src = irq_map[virq].hwirq; |
| 169 | 169 | ||
| 170 | spin_lock_irqsave(&pmac_pic_lock, flags); | 170 | raw_spin_lock_irqsave(&pmac_pic_lock, flags); |
| 171 | __clear_bit(src, ppc_cached_irq_mask); | 171 | __clear_bit(src, ppc_cached_irq_mask); |
| 172 | __pmac_set_irq_mask(src, 1); | 172 | __pmac_set_irq_mask(src, 1); |
| 173 | spin_unlock_irqrestore(&pmac_pic_lock, flags); | 173 | raw_spin_unlock_irqrestore(&pmac_pic_lock, flags); |
| 174 | } | 174 | } |
| 175 | 175 | ||
| 176 | static void pmac_unmask_irq(unsigned int virq) | 176 | static void pmac_unmask_irq(unsigned int virq) |
| @@ -178,19 +178,19 @@ static void pmac_unmask_irq(unsigned int virq) | |||
| 178 | unsigned long flags; | 178 | unsigned long flags; |
| 179 | unsigned int src = irq_map[virq].hwirq; | 179 | unsigned int src = irq_map[virq].hwirq; |
| 180 | 180 | ||
| 181 | spin_lock_irqsave(&pmac_pic_lock, flags); | 181 | raw_spin_lock_irqsave(&pmac_pic_lock, flags); |
| 182 | __set_bit(src, ppc_cached_irq_mask); | 182 | __set_bit(src, ppc_cached_irq_mask); |
| 183 | __pmac_set_irq_mask(src, 0); | 183 | __pmac_set_irq_mask(src, 0); |
| 184 | spin_unlock_irqrestore(&pmac_pic_lock, flags); | 184 | raw_spin_unlock_irqrestore(&pmac_pic_lock, flags); |
| 185 | } | 185 | } |
| 186 | 186 | ||
| 187 | static int pmac_retrigger(unsigned int virq) | 187 | static int pmac_retrigger(unsigned int virq) |
| 188 | { | 188 | { |
| 189 | unsigned long flags; | 189 | unsigned long flags; |
| 190 | 190 | ||
| 191 | spin_lock_irqsave(&pmac_pic_lock, flags); | 191 | raw_spin_lock_irqsave(&pmac_pic_lock, flags); |
| 192 | __pmac_retrigger(irq_map[virq].hwirq); | 192 | __pmac_retrigger(irq_map[virq].hwirq); |
| 193 | spin_unlock_irqrestore(&pmac_pic_lock, flags); | 193 | raw_spin_unlock_irqrestore(&pmac_pic_lock, flags); |
| 194 | return 1; | 194 | return 1; |
| 195 | } | 195 | } |
| 196 | 196 | ||
| @@ -210,7 +210,7 @@ static irqreturn_t gatwick_action(int cpl, void *dev_id) | |||
| 210 | int irq, bits; | 210 | int irq, bits; |
| 211 | int rc = IRQ_NONE; | 211 | int rc = IRQ_NONE; |
| 212 | 212 | ||
| 213 | spin_lock_irqsave(&pmac_pic_lock, flags); | 213 | raw_spin_lock_irqsave(&pmac_pic_lock, flags); |
| 214 | for (irq = max_irqs; (irq -= 32) >= max_real_irqs; ) { | 214 | for (irq = max_irqs; (irq -= 32) >= max_real_irqs; ) { |
| 215 | int i = irq >> 5; | 215 | int i = irq >> 5; |
| 216 | bits = in_le32(&pmac_irq_hw[i]->event) | ppc_lost_interrupts[i]; | 216 | bits = in_le32(&pmac_irq_hw[i]->event) | ppc_lost_interrupts[i]; |
| @@ -220,12 +220,12 @@ static irqreturn_t gatwick_action(int cpl, void *dev_id) | |||
| 220 | if (bits == 0) | 220 | if (bits == 0) |
| 221 | continue; | 221 | continue; |
| 222 | irq += __ilog2(bits); | 222 | irq += __ilog2(bits); |
| 223 | spin_unlock_irqrestore(&pmac_pic_lock, flags); | 223 | raw_spin_unlock_irqrestore(&pmac_pic_lock, flags); |
| 224 | generic_handle_irq(irq); | 224 | generic_handle_irq(irq); |
| 225 | spin_lock_irqsave(&pmac_pic_lock, flags); | 225 | raw_spin_lock_irqsave(&pmac_pic_lock, flags); |
| 226 | rc = IRQ_HANDLED; | 226 | rc = IRQ_HANDLED; |
| 227 | } | 227 | } |
| 228 | spin_unlock_irqrestore(&pmac_pic_lock, flags); | 228 | raw_spin_unlock_irqrestore(&pmac_pic_lock, flags); |
| 229 | return rc; | 229 | return rc; |
| 230 | } | 230 | } |
| 231 | 231 | ||
| @@ -244,7 +244,7 @@ static unsigned int pmac_pic_get_irq(void) | |||
| 244 | return NO_IRQ_IGNORE; /* ignore, already handled */ | 244 | return NO_IRQ_IGNORE; /* ignore, already handled */ |
| 245 | } | 245 | } |
| 246 | #endif /* CONFIG_SMP */ | 246 | #endif /* CONFIG_SMP */ |
| 247 | spin_lock_irqsave(&pmac_pic_lock, flags); | 247 | raw_spin_lock_irqsave(&pmac_pic_lock, flags); |
| 248 | for (irq = max_real_irqs; (irq -= 32) >= 0; ) { | 248 | for (irq = max_real_irqs; (irq -= 32) >= 0; ) { |
| 249 | int i = irq >> 5; | 249 | int i = irq >> 5; |
| 250 | bits = in_le32(&pmac_irq_hw[i]->event) | ppc_lost_interrupts[i]; | 250 | bits = in_le32(&pmac_irq_hw[i]->event) | ppc_lost_interrupts[i]; |
| @@ -256,7 +256,7 @@ static unsigned int pmac_pic_get_irq(void) | |||
| 256 | irq += __ilog2(bits); | 256 | irq += __ilog2(bits); |
| 257 | break; | 257 | break; |
| 258 | } | 258 | } |
| 259 | spin_unlock_irqrestore(&pmac_pic_lock, flags); | 259 | raw_spin_unlock_irqrestore(&pmac_pic_lock, flags); |
| 260 | if (unlikely(irq < 0)) | 260 | if (unlikely(irq < 0)) |
| 261 | return NO_IRQ; | 261 | return NO_IRQ; |
| 262 | return irq_linear_revmap(pmac_pic_host, irq); | 262 | return irq_linear_revmap(pmac_pic_host, irq); |
