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authorSujith Manoharan <c_manoha@qca.qualcomm.com>2013-05-07 19:33:30 -0400
committerJohn W. Linville <linville@tuxdriver.com>2013-05-22 15:05:32 -0400
commitcf657a2bc50dff0191d55fff4e7b31e7a6a542a5 (patch)
tree01ba5e39eae687d39a8b0f264e1c325d7b341d7a
parent9483f40d8d01918b399b4e24d0c1111db0afffeb (diff)
ath9k: Remove MAC_DEBUG
This option has not been enabled by default in any distribution, has never been enabled in OpenWrt and no developer has asked for this information in a bug report. Dumping pages of random values doesn't help debugging, remove this option (along with the vmalloc() abuse). Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat
-rw-r--r--drivers/net/wireless/ath/ath9k/Kconfig8
-rw-r--r--drivers/net/wireless/ath/ath9k/debug.c337
-rw-r--r--drivers/net/wireless/ath/ath9k/debug.h20
-rw-r--r--drivers/net/wireless/ath/ath9k/init.c3
-rw-r--r--drivers/net/wireless/ath/ath9k/link.c1
-rw-r--r--drivers/net/wireless/ath/ath9k/main.c1
6 files changed, 0 insertions, 370 deletions
diff --git a/drivers/net/wireless/ath/ath9k/Kconfig b/drivers/net/wireless/ath/ath9k/Kconfig
index 17507dc8a1e7..ec33c8007b29 100644
--- a/drivers/net/wireless/ath/ath9k/Kconfig
+++ b/drivers/net/wireless/ath/ath9k/Kconfig
@@ -84,14 +84,6 @@ config ATH9K_DFS_CERTIFIED
84 developed. At this point enabling this option won't do anything 84 developed. At this point enabling this option won't do anything
85 except increase code size. 85 except increase code size.
86 86
87config ATH9K_MAC_DEBUG
88 bool "Atheros MAC statistics"
89 depends on ATH9K_DEBUGFS
90 default y
91 ---help---
92 This option enables collection of statistics for Rx/Tx status
93 data and some other MAC related statistics
94
95config ATH9K_RATE_CONTROL 87config ATH9K_RATE_CONTROL
96 bool "Atheros ath9k rate control" 88 bool "Atheros ath9k rate control"
97 depends on ATH9K 89 depends on ATH9K
diff --git a/drivers/net/wireless/ath/ath9k/debug.c b/drivers/net/wireless/ath/ath9k/debug.c
index e6307b86363a..fc96ad3a135b 100644
--- a/drivers/net/wireless/ath/ath9k/debug.c
+++ b/drivers/net/wireless/ath/ath9k/debug.c
@@ -738,8 +738,6 @@ void ath_debug_stat_tx(struct ath_softc *sc, struct ath_buf *bf,
738 struct ath_tx_status *ts, struct ath_txq *txq, 738 struct ath_tx_status *ts, struct ath_txq *txq,
739 unsigned int flags) 739 unsigned int flags)
740{ 740{
741#define TX_SAMP_DBG(c) (sc->debug.bb_mac_samp[sc->debug.sampidx].ts\
742 [sc->debug.tsidx].c)
743 int qnum = txq->axq_qnum; 741 int qnum = txq->axq_qnum;
744 742
745 TX_STAT_INC(qnum, tx_pkts_all); 743 TX_STAT_INC(qnum, tx_pkts_all);
@@ -771,37 +769,6 @@ void ath_debug_stat_tx(struct ath_softc *sc, struct ath_buf *bf,
771 TX_STAT_INC(qnum, data_underrun); 769 TX_STAT_INC(qnum, data_underrun);
772 if (ts->ts_flags & ATH9K_TX_DELIM_UNDERRUN) 770 if (ts->ts_flags & ATH9K_TX_DELIM_UNDERRUN)
773 TX_STAT_INC(qnum, delim_underrun); 771 TX_STAT_INC(qnum, delim_underrun);
774
775#ifdef CONFIG_ATH9K_MAC_DEBUG
776 spin_lock(&sc->debug.samp_lock);
777 TX_SAMP_DBG(jiffies) = jiffies;
778 TX_SAMP_DBG(rssi_ctl0) = ts->ts_rssi_ctl0;
779 TX_SAMP_DBG(rssi_ctl1) = ts->ts_rssi_ctl1;
780 TX_SAMP_DBG(rssi_ctl2) = ts->ts_rssi_ctl2;
781 TX_SAMP_DBG(rssi_ext0) = ts->ts_rssi_ext0;
782 TX_SAMP_DBG(rssi_ext1) = ts->ts_rssi_ext1;
783 TX_SAMP_DBG(rssi_ext2) = ts->ts_rssi_ext2;
784 TX_SAMP_DBG(rateindex) = ts->ts_rateindex;
785 TX_SAMP_DBG(isok) = !!(ts->ts_status & ATH9K_TXERR_MASK);
786 TX_SAMP_DBG(rts_fail_cnt) = ts->ts_shortretry;
787 TX_SAMP_DBG(data_fail_cnt) = ts->ts_longretry;
788 TX_SAMP_DBG(rssi) = ts->ts_rssi;
789 TX_SAMP_DBG(tid) = ts->tid;
790 TX_SAMP_DBG(qid) = ts->qid;
791
792 if (ts->ts_flags & ATH9K_TX_BA) {
793 TX_SAMP_DBG(ba_low) = ts->ba_low;
794 TX_SAMP_DBG(ba_high) = ts->ba_high;
795 } else {
796 TX_SAMP_DBG(ba_low) = 0;
797 TX_SAMP_DBG(ba_high) = 0;
798 }
799
800 sc->debug.tsidx = (sc->debug.tsidx + 1) % ATH_DBG_MAX_SAMPLES;
801 spin_unlock(&sc->debug.samp_lock);
802#endif
803
804#undef TX_SAMP_DBG
805} 772}
806 773
807static const struct file_operations fops_xmit = { 774static const struct file_operations fops_xmit = {
@@ -915,8 +882,6 @@ static ssize_t read_file_recv(struct file *file, char __user *user_buf,
915void ath_debug_stat_rx(struct ath_softc *sc, struct ath_rx_status *rs) 882void ath_debug_stat_rx(struct ath_softc *sc, struct ath_rx_status *rs)
916{ 883{
917#define RX_PHY_ERR_INC(c) sc->debug.stats.rxstats.phy_err_stats[c]++ 884#define RX_PHY_ERR_INC(c) sc->debug.stats.rxstats.phy_err_stats[c]++
918#define RX_SAMP_DBG(c) (sc->debug.bb_mac_samp[sc->debug.sampidx].rs\
919 [sc->debug.rsidx].c)
920 885
921 RX_STAT_INC(rx_pkts_all); 886 RX_STAT_INC(rx_pkts_all);
922 sc->debug.stats.rxstats.rx_bytes_all += rs->rs_datalen; 887 sc->debug.stats.rxstats.rx_bytes_all += rs->rs_datalen;
@@ -940,27 +905,7 @@ void ath_debug_stat_rx(struct ath_softc *sc, struct ath_rx_status *rs)
940 RX_PHY_ERR_INC(rs->rs_phyerr); 905 RX_PHY_ERR_INC(rs->rs_phyerr);
941 } 906 }
942 907
943#ifdef CONFIG_ATH9K_MAC_DEBUG
944 spin_lock(&sc->debug.samp_lock);
945 RX_SAMP_DBG(jiffies) = jiffies;
946 RX_SAMP_DBG(rssi_ctl0) = rs->rs_rssi_ctl0;
947 RX_SAMP_DBG(rssi_ctl1) = rs->rs_rssi_ctl1;
948 RX_SAMP_DBG(rssi_ctl2) = rs->rs_rssi_ctl2;
949 RX_SAMP_DBG(rssi_ext0) = rs->rs_rssi_ext0;
950 RX_SAMP_DBG(rssi_ext1) = rs->rs_rssi_ext1;
951 RX_SAMP_DBG(rssi_ext2) = rs->rs_rssi_ext2;
952 RX_SAMP_DBG(antenna) = rs->rs_antenna;
953 RX_SAMP_DBG(rssi) = rs->rs_rssi;
954 RX_SAMP_DBG(rate) = rs->rs_rate;
955 RX_SAMP_DBG(is_mybeacon) = rs->is_mybeacon;
956
957 sc->debug.rsidx = (sc->debug.rsidx + 1) % ATH_DBG_MAX_SAMPLES;
958 spin_unlock(&sc->debug.samp_lock);
959
960#endif
961
962#undef RX_PHY_ERR_INC 908#undef RX_PHY_ERR_INC
963#undef RX_SAMP_DBG
964} 909}
965 910
966static const struct file_operations fops_recv = { 911static const struct file_operations fops_recv = {
@@ -1485,283 +1430,6 @@ static const struct file_operations fops_modal_eeprom = {
1485 .llseek = default_llseek, 1430 .llseek = default_llseek,
1486}; 1431};
1487 1432
1488#ifdef CONFIG_ATH9K_MAC_DEBUG
1489
1490void ath9k_debug_samp_bb_mac(struct ath_softc *sc)
1491{
1492#define ATH_SAMP_DBG(c) (sc->debug.bb_mac_samp[sc->debug.sampidx].c)
1493 struct ath_hw *ah = sc->sc_ah;
1494 struct ath_common *common = ath9k_hw_common(ah);
1495 unsigned long flags;
1496 int i;
1497
1498 ath9k_ps_wakeup(sc);
1499
1500 spin_lock_bh(&sc->debug.samp_lock);
1501
1502 spin_lock_irqsave(&common->cc_lock, flags);
1503 ath_hw_cycle_counters_update(common);
1504
1505 ATH_SAMP_DBG(cc.cycles) = common->cc_ani.cycles;
1506 ATH_SAMP_DBG(cc.rx_busy) = common->cc_ani.rx_busy;
1507 ATH_SAMP_DBG(cc.rx_frame) = common->cc_ani.rx_frame;
1508 ATH_SAMP_DBG(cc.tx_frame) = common->cc_ani.tx_frame;
1509 spin_unlock_irqrestore(&common->cc_lock, flags);
1510
1511 ATH_SAMP_DBG(noise) = ah->noise;
1512
1513 REG_WRITE_D(ah, AR_MACMISC,
1514 ((AR_MACMISC_DMA_OBS_LINE_8 << AR_MACMISC_DMA_OBS_S) |
1515 (AR_MACMISC_MISC_OBS_BUS_1 <<
1516 AR_MACMISC_MISC_OBS_BUS_MSB_S)));
1517
1518 for (i = 0; i < ATH9K_NUM_DMA_DEBUG_REGS; i++)
1519 ATH_SAMP_DBG(dma_dbg_reg_vals[i]) = REG_READ_D(ah,
1520 AR_DMADBG_0 + (i * sizeof(u32)));
1521
1522 ATH_SAMP_DBG(pcu_obs) = REG_READ_D(ah, AR_OBS_BUS_1);
1523 ATH_SAMP_DBG(pcu_cr) = REG_READ_D(ah, AR_CR);
1524
1525 memcpy(ATH_SAMP_DBG(nfCalHist), sc->caldata.nfCalHist,
1526 sizeof(ATH_SAMP_DBG(nfCalHist)));
1527
1528 sc->debug.sampidx = (sc->debug.sampidx + 1) % ATH_DBG_MAX_SAMPLES;
1529 spin_unlock_bh(&sc->debug.samp_lock);
1530 ath9k_ps_restore(sc);
1531
1532#undef ATH_SAMP_DBG
1533}
1534
1535static int open_file_bb_mac_samps(struct inode *inode, struct file *file)
1536{
1537#define ATH_SAMP_DBG(c) bb_mac_samp[sampidx].c
1538 struct ath_softc *sc = inode->i_private;
1539 struct ath_hw *ah = sc->sc_ah;
1540 struct ath_common *common = ath9k_hw_common(ah);
1541 struct ieee80211_conf *conf = &common->hw->conf;
1542 struct ath_dbg_bb_mac_samp *bb_mac_samp;
1543 struct ath9k_nfcal_hist *h;
1544 int i, j, qcuOffset = 0, dcuOffset = 0;
1545 u32 *qcuBase, *dcuBase, size = 30000, len = 0;
1546 u32 sampidx = 0;
1547 u8 *buf;
1548 u8 chainmask = (ah->rxchainmask << 3) | ah->rxchainmask;
1549 u8 nread;
1550
1551 if (test_bit(SC_OP_INVALID, &sc->sc_flags))
1552 return -EAGAIN;
1553
1554 buf = vmalloc(size);
1555 if (!buf)
1556 return -ENOMEM;
1557 bb_mac_samp = vmalloc(sizeof(*bb_mac_samp) * ATH_DBG_MAX_SAMPLES);
1558 if (!bb_mac_samp) {
1559 vfree(buf);
1560 return -ENOMEM;
1561 }
1562 /* Account the current state too */
1563 ath9k_debug_samp_bb_mac(sc);
1564
1565 spin_lock_bh(&sc->debug.samp_lock);
1566 memcpy(bb_mac_samp, sc->debug.bb_mac_samp,
1567 sizeof(*bb_mac_samp) * ATH_DBG_MAX_SAMPLES);
1568 len += snprintf(buf + len, size - len,
1569 "Current Sample Index: %d\n", sc->debug.sampidx);
1570 spin_unlock_bh(&sc->debug.samp_lock);
1571
1572 len += snprintf(buf + len, size - len,
1573 "Raw DMA Debug Dump:\n");
1574 len += snprintf(buf + len, size - len, "Sample |\t");
1575 for (i = 0; i < ATH9K_NUM_DMA_DEBUG_REGS; i++)
1576 len += snprintf(buf + len, size - len, " DMA Reg%d |\t", i);
1577 len += snprintf(buf + len, size - len, "\n");
1578
1579 for (sampidx = 0; sampidx < ATH_DBG_MAX_SAMPLES; sampidx++) {
1580 len += snprintf(buf + len, size - len, "%d\t", sampidx);
1581
1582 for (i = 0; i < ATH9K_NUM_DMA_DEBUG_REGS; i++)
1583 len += snprintf(buf + len, size - len, " %08x\t",
1584 ATH_SAMP_DBG(dma_dbg_reg_vals[i]));
1585 len += snprintf(buf + len, size - len, "\n");
1586 }
1587 len += snprintf(buf + len, size - len, "\n");
1588
1589 len += snprintf(buf + len, size - len,
1590 "Sample Num QCU: chain_st fsp_ok fsp_st DCU: chain_st\n");
1591 for (sampidx = 0; sampidx < ATH_DBG_MAX_SAMPLES; sampidx++) {
1592 qcuBase = &ATH_SAMP_DBG(dma_dbg_reg_vals[0]);
1593 dcuBase = &ATH_SAMP_DBG(dma_dbg_reg_vals[4]);
1594
1595 for (i = 0; i < ATH9K_NUM_QUEUES; i++,
1596 qcuOffset += 4, dcuOffset += 5) {
1597 if (i == 8) {
1598 qcuOffset = 0;
1599 qcuBase++;
1600 }
1601
1602 if (i == 6) {
1603 dcuOffset = 0;
1604 dcuBase++;
1605 }
1606 if (!sc->debug.stats.txstats[i].queued)
1607 continue;
1608
1609 len += snprintf(buf + len, size - len,
1610 "%4d %7d %2x %1x %2x %2x\n",
1611 sampidx, i,
1612 (*qcuBase & (0x7 << qcuOffset)) >> qcuOffset,
1613 (*qcuBase & (0x8 << qcuOffset)) >>
1614 (qcuOffset + 3),
1615 ATH_SAMP_DBG(dma_dbg_reg_vals[2]) &
1616 (0x7 << (i * 3)) >> (i * 3),
1617 (*dcuBase & (0x1f << dcuOffset)) >> dcuOffset);
1618 }
1619 len += snprintf(buf + len, size - len, "\n");
1620 }
1621 len += snprintf(buf + len, size - len,
1622 "samp qcu_sh qcu_fh qcu_comp dcu_comp dcu_arb dcu_fp "
1623 "ch_idle_dur ch_idle_dur_val txfifo_val0 txfifo_val1 "
1624 "txfifo_dcu0 txfifo_dcu1 pcu_obs AR_CR\n");
1625
1626 for (sampidx = 0; sampidx < ATH_DBG_MAX_SAMPLES; sampidx++) {
1627 qcuBase = &ATH_SAMP_DBG(dma_dbg_reg_vals[0]);
1628 dcuBase = &ATH_SAMP_DBG(dma_dbg_reg_vals[4]);
1629
1630 len += snprintf(buf + len, size - len, "%4d %5x %5x ", sampidx,
1631 (ATH_SAMP_DBG(dma_dbg_reg_vals[3]) & 0x003c0000) >> 18,
1632 (ATH_SAMP_DBG(dma_dbg_reg_vals[3]) & 0x03c00000) >> 22);
1633 len += snprintf(buf + len, size - len, "%7x %8x ",
1634 (ATH_SAMP_DBG(dma_dbg_reg_vals[3]) & 0x1c000000) >> 26,
1635 (ATH_SAMP_DBG(dma_dbg_reg_vals[6]) & 0x3));
1636 len += snprintf(buf + len, size - len, "%7x %7x ",
1637 (ATH_SAMP_DBG(dma_dbg_reg_vals[5]) & 0x06000000) >> 25,
1638 (ATH_SAMP_DBG(dma_dbg_reg_vals[5]) & 0x38000000) >> 27);
1639 len += snprintf(buf + len, size - len, "%7d %12d ",
1640 (ATH_SAMP_DBG(dma_dbg_reg_vals[6]) & 0x000003fc) >> 2,
1641 (ATH_SAMP_DBG(dma_dbg_reg_vals[6]) & 0x00000400) >> 10);
1642 len += snprintf(buf + len, size - len, "%12d %12d ",
1643 (ATH_SAMP_DBG(dma_dbg_reg_vals[6]) & 0x00000800) >> 11,
1644 (ATH_SAMP_DBG(dma_dbg_reg_vals[6]) & 0x00001000) >> 12);
1645 len += snprintf(buf + len, size - len, "%12d %12d ",
1646 (ATH_SAMP_DBG(dma_dbg_reg_vals[6]) & 0x0001e000) >> 13,
1647 (ATH_SAMP_DBG(dma_dbg_reg_vals[6]) & 0x001e0000) >> 17);
1648 len += snprintf(buf + len, size - len, "0x%07x 0x%07x\n",
1649 ATH_SAMP_DBG(pcu_obs), ATH_SAMP_DBG(pcu_cr));
1650 }
1651
1652 len += snprintf(buf + len, size - len,
1653 "Sample ChNoise Chain privNF #Reading Readings\n");
1654 for (sampidx = 0; sampidx < ATH_DBG_MAX_SAMPLES; sampidx++) {
1655 h = ATH_SAMP_DBG(nfCalHist);
1656 if (!ATH_SAMP_DBG(noise))
1657 continue;
1658
1659 for (i = 0; i < NUM_NF_READINGS; i++) {
1660 if (!(chainmask & (1 << i)) ||
1661 ((i >= AR5416_MAX_CHAINS) && !conf_is_ht40(conf)))
1662 continue;
1663
1664 nread = AR_PHY_CCA_FILTERWINDOW_LENGTH -
1665 h[i].invalidNFcount;
1666 len += snprintf(buf + len, size - len,
1667 "%4d %5d %4d\t %d\t %d\t",
1668 sampidx, ATH_SAMP_DBG(noise),
1669 i, h[i].privNF, nread);
1670 for (j = 0; j < nread; j++)
1671 len += snprintf(buf + len, size - len,
1672 " %d", h[i].nfCalBuffer[j]);
1673 len += snprintf(buf + len, size - len, "\n");
1674 }
1675 }
1676 len += snprintf(buf + len, size - len, "\nCycle counters:\n"
1677 "Sample Total Rxbusy Rxframes Txframes\n");
1678 for (sampidx = 0; sampidx < ATH_DBG_MAX_SAMPLES; sampidx++) {
1679 if (!ATH_SAMP_DBG(cc.cycles))
1680 continue;
1681 len += snprintf(buf + len, size - len,
1682 "%4d %08x %08x %08x %08x\n",
1683 sampidx, ATH_SAMP_DBG(cc.cycles),
1684 ATH_SAMP_DBG(cc.rx_busy),
1685 ATH_SAMP_DBG(cc.rx_frame),
1686 ATH_SAMP_DBG(cc.tx_frame));
1687 }
1688
1689 len += snprintf(buf + len, size - len, "Tx status Dump :\n");
1690 len += snprintf(buf + len, size - len,
1691 "Sample rssi:- ctl0 ctl1 ctl2 ext0 ext1 ext2 comb "
1692 "isok rts_fail data_fail rate tid qid "
1693 "ba_low ba_high tx_before(ms)\n");
1694 for (sampidx = 0; sampidx < ATH_DBG_MAX_SAMPLES; sampidx++) {
1695 for (i = 0; i < ATH_DBG_MAX_SAMPLES; i++) {
1696 if (!ATH_SAMP_DBG(ts[i].jiffies))
1697 continue;
1698 len += snprintf(buf + len, size - len, "%-14d"
1699 "%-4d %-4d %-4d %-4d %-4d %-4d %-4d %-4d %-8d "
1700 "%-9d %-4d %-3d %-3d %08x %08x %-11d\n",
1701 sampidx,
1702 ATH_SAMP_DBG(ts[i].rssi_ctl0),
1703 ATH_SAMP_DBG(ts[i].rssi_ctl1),
1704 ATH_SAMP_DBG(ts[i].rssi_ctl2),
1705 ATH_SAMP_DBG(ts[i].rssi_ext0),
1706 ATH_SAMP_DBG(ts[i].rssi_ext1),
1707 ATH_SAMP_DBG(ts[i].rssi_ext2),
1708 ATH_SAMP_DBG(ts[i].rssi),
1709 ATH_SAMP_DBG(ts[i].isok),
1710 ATH_SAMP_DBG(ts[i].rts_fail_cnt),
1711 ATH_SAMP_DBG(ts[i].data_fail_cnt),
1712 ATH_SAMP_DBG(ts[i].rateindex),
1713 ATH_SAMP_DBG(ts[i].tid),
1714 ATH_SAMP_DBG(ts[i].qid),
1715 ATH_SAMP_DBG(ts[i].ba_low),
1716 ATH_SAMP_DBG(ts[i].ba_high),
1717 jiffies_to_msecs(jiffies -
1718 ATH_SAMP_DBG(ts[i].jiffies)));
1719 }
1720 }
1721
1722 len += snprintf(buf + len, size - len, "Rx status Dump :\n");
1723 len += snprintf(buf + len, size - len, "Sample rssi:- ctl0 ctl1 ctl2 "
1724 "ext0 ext1 ext2 comb beacon ant rate rx_before(ms)\n");
1725 for (sampidx = 0; sampidx < ATH_DBG_MAX_SAMPLES; sampidx++) {
1726 for (i = 0; i < ATH_DBG_MAX_SAMPLES; i++) {
1727 if (!ATH_SAMP_DBG(rs[i].jiffies))
1728 continue;
1729 len += snprintf(buf + len, size - len, "%-14d"
1730 "%-4d %-4d %-4d %-4d %-4d %-4d %-4d %-9s %-2d %02x %-13d\n",
1731 sampidx,
1732 ATH_SAMP_DBG(rs[i].rssi_ctl0),
1733 ATH_SAMP_DBG(rs[i].rssi_ctl1),
1734 ATH_SAMP_DBG(rs[i].rssi_ctl2),
1735 ATH_SAMP_DBG(rs[i].rssi_ext0),
1736 ATH_SAMP_DBG(rs[i].rssi_ext1),
1737 ATH_SAMP_DBG(rs[i].rssi_ext2),
1738 ATH_SAMP_DBG(rs[i].rssi),
1739 ATH_SAMP_DBG(rs[i].is_mybeacon) ?
1740 "True" : "False",
1741 ATH_SAMP_DBG(rs[i].antenna),
1742 ATH_SAMP_DBG(rs[i].rate),
1743 jiffies_to_msecs(jiffies -
1744 ATH_SAMP_DBG(rs[i].jiffies)));
1745 }
1746 }
1747
1748 vfree(bb_mac_samp);
1749 file->private_data = buf;
1750
1751 return 0;
1752#undef ATH_SAMP_DBG
1753}
1754
1755static const struct file_operations fops_samps = {
1756 .open = open_file_bb_mac_samps,
1757 .read = ath9k_debugfs_read_buf,
1758 .release = ath9k_debugfs_release_buf,
1759 .owner = THIS_MODULE,
1760 .llseek = default_llseek,
1761};
1762
1763#endif
1764
1765#ifdef CONFIG_ATH9K_BTCOEX_SUPPORT 1433#ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
1766static ssize_t read_file_btcoex(struct file *file, char __user *user_buf, 1434static ssize_t read_file_btcoex(struct file *file, char __user *user_buf,
1767 size_t count, loff_t *ppos) 1435 size_t count, loff_t *ppos)
@@ -2087,11 +1755,6 @@ int ath9k_init_debug(struct ath_hw *ah)
2087 debugfs_create_file("spectral_fft_period", S_IRUSR | S_IWUSR, 1755 debugfs_create_file("spectral_fft_period", S_IRUSR | S_IWUSR,
2088 sc->debug.debugfs_phy, sc, 1756 sc->debug.debugfs_phy, sc,
2089 &fops_spectral_fft_period); 1757 &fops_spectral_fft_period);
2090
2091#ifdef CONFIG_ATH9K_MAC_DEBUG
2092 debugfs_create_file("samples", S_IRUSR, sc->debug.debugfs_phy, sc,
2093 &fops_samps);
2094#endif
2095 debugfs_create_u32("gpio_mask", S_IRUSR | S_IWUSR, 1758 debugfs_create_u32("gpio_mask", S_IRUSR | S_IWUSR,
2096 sc->debug.debugfs_phy, &sc->sc_ah->gpio_mask); 1759 sc->debug.debugfs_phy, &sc->sc_ah->gpio_mask);
2097 debugfs_create_u32("gpio_val", S_IRUSR | S_IWUSR, 1760 debugfs_create_u32("gpio_val", S_IRUSR | S_IWUSR,
diff --git a/drivers/net/wireless/ath/ath9k/debug.h b/drivers/net/wireless/ath/ath9k/debug.h
index 794a7ec83a24..62da19c6f4e0 100644
--- a/drivers/net/wireless/ath/ath9k/debug.h
+++ b/drivers/net/wireless/ath/ath9k/debug.h
@@ -294,13 +294,6 @@ struct ath9k_debug {
294 struct dentry *debugfs_phy; 294 struct dentry *debugfs_phy;
295 u32 regidx; 295 u32 regidx;
296 struct ath_stats stats; 296 struct ath_stats stats;
297#ifdef CONFIG_ATH9K_MAC_DEBUG
298 spinlock_t samp_lock;
299 struct ath_dbg_bb_mac_samp bb_mac_samp[ATH_DBG_MAX_SAMPLES];
300 u8 sampidx;
301 u8 tsidx;
302 u8 rsidx;
303#endif
304}; 297};
305 298
306int ath9k_init_debug(struct ath_hw *ah); 299int ath9k_init_debug(struct ath_hw *ah);
@@ -359,17 +352,4 @@ static inline void ath_debug_stat_rx(struct ath_softc *sc,
359 352
360#endif /* CONFIG_ATH9K_DEBUGFS */ 353#endif /* CONFIG_ATH9K_DEBUGFS */
361 354
362#ifdef CONFIG_ATH9K_MAC_DEBUG
363
364void ath9k_debug_samp_bb_mac(struct ath_softc *sc);
365
366#else
367
368static inline void ath9k_debug_samp_bb_mac(struct ath_softc *sc)
369{
370}
371
372#endif
373
374
375#endif /* DEBUG_H */ 355#endif /* DEBUG_H */
diff --git a/drivers/net/wireless/ath/ath9k/init.c b/drivers/net/wireless/ath/ath9k/init.c
index 0237b2868961..c7b888f22703 100644
--- a/drivers/net/wireless/ath/ath9k/init.c
+++ b/drivers/net/wireless/ath/ath9k/init.c
@@ -613,9 +613,6 @@ static int ath9k_init_softc(u16 devid, struct ath_softc *sc,
613 spin_lock_init(&sc->sc_serial_rw); 613 spin_lock_init(&sc->sc_serial_rw);
614 spin_lock_init(&sc->sc_pm_lock); 614 spin_lock_init(&sc->sc_pm_lock);
615 mutex_init(&sc->mutex); 615 mutex_init(&sc->mutex);
616#ifdef CONFIG_ATH9K_MAC_DEBUG
617 spin_lock_init(&sc->debug.samp_lock);
618#endif
619 tasklet_init(&sc->intr_tq, ath9k_tasklet, (unsigned long)sc); 616 tasklet_init(&sc->intr_tq, ath9k_tasklet, (unsigned long)sc);
620 tasklet_init(&sc->bcon_tasklet, ath9k_beacon_tasklet, 617 tasklet_init(&sc->bcon_tasklet, ath9k_beacon_tasklet,
621 (unsigned long)sc); 618 (unsigned long)sc);
diff --git a/drivers/net/wireless/ath/ath9k/link.c b/drivers/net/wireless/ath/ath9k/link.c
index 849259b07370..cc422a4dfa17 100644
--- a/drivers/net/wireless/ath/ath9k/link.c
+++ b/drivers/net/wireless/ath/ath9k/link.c
@@ -418,7 +418,6 @@ void ath_ani_calibrate(unsigned long data)
418 longcal ? "long" : "", shortcal ? "short" : "", 418 longcal ? "long" : "", shortcal ? "short" : "",
419 aniflag ? "ani" : "", common->ani.caldone ? "true" : "false"); 419 aniflag ? "ani" : "", common->ani.caldone ? "true" : "false");
420 420
421 ath9k_debug_samp_bb_mac(sc);
422 ath9k_ps_restore(sc); 421 ath9k_ps_restore(sc);
423 422
424set_timer: 423set_timer:
diff --git a/drivers/net/wireless/ath/ath9k/main.c b/drivers/net/wireless/ath/ath9k/main.c
index 6963862a1872..1cbfdd4e4a74 100644
--- a/drivers/net/wireless/ath/ath9k/main.c
+++ b/drivers/net/wireless/ath/ath9k/main.c
@@ -193,7 +193,6 @@ static bool ath_prepare_reset(struct ath_softc *sc)
193 ath_stop_ani(sc); 193 ath_stop_ani(sc);
194 del_timer_sync(&sc->rx_poll_timer); 194 del_timer_sync(&sc->rx_poll_timer);
195 195
196 ath9k_debug_samp_bb_mac(sc);
197 ath9k_hw_disable_interrupts(ah); 196 ath9k_hw_disable_interrupts(ah);
198 197
199 if (!ath_drain_all_txq(sc)) 198 if (!ath_drain_all_txq(sc))
generated by cgit v1.2.2 (git 2.25.0) at 2025-06-05 06:14:14 -0400