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authorGeert Uytterhoeven <geert+renesas@glider.be>2015-03-12 06:09:14 -0400
committerLinus Walleij <linus.walleij@linaro.org>2015-03-17 21:13:47 -0400
commitcef28a289482175b26f7a5ae4a1337c792cea9c5 (patch)
tree473e44bd6d2df4ed7736ecffb544548d99a47b3b
parentdc70071550c2b8b1185d086b0f1954dfbc63aee2 (diff)
pinctrl: sh-pfc: Use unsigned int for register/field widths and offsets
As register and field widths and offsets are in the range 1..32, use unsigned int (mostly replacing unsigned long) to store them in local variables and for passing them around. Move to one variable per line, move variables to the beginning of the block where they are used, and drop superfluous initializations while we are at it. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-rw-r--r--drivers/pinctrl/sh-pfc/core.c59
-rw-r--r--drivers/pinctrl/sh-pfc/core.h4
-rw-r--r--drivers/pinctrl/sh-pfc/gpio.c4
3 files changed, 33 insertions, 34 deletions
diff --git a/drivers/pinctrl/sh-pfc/core.c b/drivers/pinctrl/sh-pfc/core.c
index 5591baf9738b..c33e2474a867 100644
--- a/drivers/pinctrl/sh-pfc/core.c
+++ b/drivers/pinctrl/sh-pfc/core.c
@@ -144,7 +144,7 @@ static int sh_pfc_enum_in_range(u16 enum_id, const struct pinmux_range *r)
144 return 1; 144 return 1;
145} 145}
146 146
147u32 sh_pfc_read_raw_reg(void __iomem *mapped_reg, unsigned long reg_width) 147u32 sh_pfc_read_raw_reg(void __iomem *mapped_reg, unsigned int reg_width)
148{ 148{
149 switch (reg_width) { 149 switch (reg_width) {
150 case 8: 150 case 8:
@@ -159,7 +159,7 @@ u32 sh_pfc_read_raw_reg(void __iomem *mapped_reg, unsigned long reg_width)
159 return 0; 159 return 0;
160} 160}
161 161
162void sh_pfc_write_raw_reg(void __iomem *mapped_reg, unsigned long reg_width, 162void sh_pfc_write_raw_reg(void __iomem *mapped_reg, unsigned int reg_width,
163 u32 data) 163 u32 data)
164{ 164{
165 switch (reg_width) { 165 switch (reg_width) {
@@ -179,9 +179,9 @@ void sh_pfc_write_raw_reg(void __iomem *mapped_reg, unsigned long reg_width,
179 179
180static void sh_pfc_config_reg_helper(struct sh_pfc *pfc, 180static void sh_pfc_config_reg_helper(struct sh_pfc *pfc,
181 const struct pinmux_cfg_reg *crp, 181 const struct pinmux_cfg_reg *crp,
182 unsigned long in_pos, 182 unsigned int in_pos,
183 void __iomem **mapped_regp, u32 *maskp, 183 void __iomem **mapped_regp, u32 *maskp,
184 unsigned long *posp) 184 unsigned int *posp)
185{ 185{
186 unsigned int k; 186 unsigned int k;
187 187
@@ -200,15 +200,15 @@ static void sh_pfc_config_reg_helper(struct sh_pfc *pfc,
200 200
201static void sh_pfc_write_config_reg(struct sh_pfc *pfc, 201static void sh_pfc_write_config_reg(struct sh_pfc *pfc,
202 const struct pinmux_cfg_reg *crp, 202 const struct pinmux_cfg_reg *crp,
203 unsigned long field, u32 value) 203 unsigned int field, u32 value)
204{ 204{
205 void __iomem *mapped_reg; 205 void __iomem *mapped_reg;
206 unsigned long pos; 206 unsigned int pos;
207 u32 mask, data; 207 u32 mask, data;
208 208
209 sh_pfc_config_reg_helper(pfc, crp, field, &mapped_reg, &mask, &pos); 209 sh_pfc_config_reg_helper(pfc, crp, field, &mapped_reg, &mask, &pos);
210 210
211 dev_dbg(pfc->dev, "write_reg addr = %lx, value = 0x%x, field = %ld, " 211 dev_dbg(pfc->dev, "write_reg addr = %lx, value = 0x%x, field = %u, "
212 "r_width = %u, f_width = %u\n", 212 "r_width = %u, f_width = %u\n",
213 crp->reg, value, field, crp->reg_width, crp->field_width); 213 crp->reg, value, field, crp->reg_width, crp->field_width);
214 214
@@ -228,27 +228,28 @@ static void sh_pfc_write_config_reg(struct sh_pfc *pfc,
228} 228}
229 229
230static int sh_pfc_get_config_reg(struct sh_pfc *pfc, u16 enum_id, 230static int sh_pfc_get_config_reg(struct sh_pfc *pfc, u16 enum_id,
231 const struct pinmux_cfg_reg **crp, int *fieldp, 231 const struct pinmux_cfg_reg **crp,
232 u32 *valuep) 232 unsigned int *fieldp, u32 *valuep)
233{ 233{
234 const struct pinmux_cfg_reg *config_reg; 234 unsigned int k = 0;
235 unsigned long r_width, f_width, curr_width;
236 unsigned int k, m, pos, bit_pos;
237 u32 ncomb, n;
238 235
239 k = 0;
240 while (1) { 236 while (1) {
241 config_reg = pfc->info->cfg_regs + k; 237 const struct pinmux_cfg_reg *config_reg =
242 238 pfc->info->cfg_regs + k;
243 r_width = config_reg->reg_width; 239 unsigned int r_width = config_reg->reg_width;
244 f_width = config_reg->field_width; 240 unsigned int f_width = config_reg->field_width;
241 unsigned int curr_width;
242 unsigned int bit_pos;
243 unsigned int pos = 0;
244 unsigned int m = 0;
245 245
246 if (!r_width) 246 if (!r_width)
247 break; 247 break;
248 248
249 pos = 0;
250 m = 0;
251 for (bit_pos = 0; bit_pos < r_width; bit_pos += curr_width) { 249 for (bit_pos = 0; bit_pos < r_width; bit_pos += curr_width) {
250 u32 ncomb;
251 u32 n;
252
252 if (f_width) 253 if (f_width)
253 curr_width = f_width; 254 curr_width = f_width;
254 else 255 else
@@ -297,12 +298,8 @@ static int sh_pfc_mark_to_enum(struct sh_pfc *pfc, u16 mark, int pos,
297 298
298int sh_pfc_config_mux(struct sh_pfc *pfc, unsigned mark, int pinmux_type) 299int sh_pfc_config_mux(struct sh_pfc *pfc, unsigned mark, int pinmux_type)
299{ 300{
300 const struct pinmux_cfg_reg *cr = NULL;
301 u16 enum_id;
302 const struct pinmux_range *range; 301 const struct pinmux_range *range;
303 int in_range, pos, field; 302 int pos = 0;
304 u32 value;
305 int ret;
306 303
307 switch (pinmux_type) { 304 switch (pinmux_type) {
308 case PINMUX_TYPE_GPIO: 305 case PINMUX_TYPE_GPIO:
@@ -322,13 +319,15 @@ int sh_pfc_config_mux(struct sh_pfc *pfc, unsigned mark, int pinmux_type)
322 return -EINVAL; 319 return -EINVAL;
323 } 320 }
324 321
325 pos = 0;
326 enum_id = 0;
327 field = 0;
328 value = 0;
329
330 /* Iterate over all the configuration fields we need to update. */ 322 /* Iterate over all the configuration fields we need to update. */
331 while (1) { 323 while (1) {
324 const struct pinmux_cfg_reg *cr;
325 unsigned int field;
326 u16 enum_id;
327 u32 value;
328 int in_range;
329 int ret;
330
332 pos = sh_pfc_mark_to_enum(pfc, mark, pos, &enum_id); 331 pos = sh_pfc_mark_to_enum(pfc, mark, pos, &enum_id);
333 if (pos < 0) 332 if (pos < 0)
334 return pos; 333 return pos;
diff --git a/drivers/pinctrl/sh-pfc/core.h b/drivers/pinctrl/sh-pfc/core.h
index 8a10dd50ccdd..6dc8a6fc2746 100644
--- a/drivers/pinctrl/sh-pfc/core.h
+++ b/drivers/pinctrl/sh-pfc/core.h
@@ -57,8 +57,8 @@ int sh_pfc_unregister_gpiochip(struct sh_pfc *pfc);
57int sh_pfc_register_pinctrl(struct sh_pfc *pfc); 57int sh_pfc_register_pinctrl(struct sh_pfc *pfc);
58int sh_pfc_unregister_pinctrl(struct sh_pfc *pfc); 58int sh_pfc_unregister_pinctrl(struct sh_pfc *pfc);
59 59
60u32 sh_pfc_read_raw_reg(void __iomem *mapped_reg, unsigned long reg_width); 60u32 sh_pfc_read_raw_reg(void __iomem *mapped_reg, unsigned int reg_width);
61void sh_pfc_write_raw_reg(void __iomem *mapped_reg, unsigned long reg_width, 61void sh_pfc_write_raw_reg(void __iomem *mapped_reg, unsigned int reg_width,
62 u32 data); 62 u32 data);
63 63
64int sh_pfc_get_pin_index(struct sh_pfc *pfc, unsigned int pin); 64int sh_pfc_get_pin_index(struct sh_pfc *pfc, unsigned int pin);
diff --git a/drivers/pinctrl/sh-pfc/gpio.c b/drivers/pinctrl/sh-pfc/gpio.c
index f2bb7d7398cd..aa2fc77a1925 100644
--- a/drivers/pinctrl/sh-pfc/gpio.c
+++ b/drivers/pinctrl/sh-pfc/gpio.c
@@ -153,8 +153,8 @@ static void gpio_pin_set_value(struct sh_pfc_chip *chip, unsigned offset,
153 int value) 153 int value)
154{ 154{
155 struct sh_pfc_gpio_data_reg *reg; 155 struct sh_pfc_gpio_data_reg *reg;
156 unsigned long pos;
157 unsigned int bit; 156 unsigned int bit;
157 unsigned int pos;
158 158
159 gpio_get_data_reg(chip, offset, &reg, &bit); 159 gpio_get_data_reg(chip, offset, &reg, &bit);
160 160
@@ -185,8 +185,8 @@ static int gpio_pin_get(struct gpio_chip *gc, unsigned offset)
185{ 185{
186 struct sh_pfc_chip *chip = gpio_to_pfc_chip(gc); 186 struct sh_pfc_chip *chip = gpio_to_pfc_chip(gc);
187 struct sh_pfc_gpio_data_reg *reg; 187 struct sh_pfc_gpio_data_reg *reg;
188 unsigned long pos;
189 unsigned int bit; 188 unsigned int bit;
189 unsigned int pos;
190 190
191 gpio_get_data_reg(chip, offset, &reg, &bit); 191 gpio_get_data_reg(chip, offset, &reg, &bit);
192 192