diff options
author | Ryo Kataoka <ryo.kataoka.wt@renesas.com> | 2014-12-08 23:21:22 -0500 |
---|---|---|
committer | Simon Horman <horms+renesas@verge.net.au> | 2014-12-21 05:07:18 -0500 |
commit | ce85ad47882fe375dcb3f7cce6c10ae800ac2d9c (patch) | |
tree | 4124deb84a0c945a977741fc8d76766320161ca0 | |
parent | 9c5becce21af35e59c7313d3603af1d620fffd05 (diff) |
ARM: shmobile: r8a7791: Add IPMMU-SGX clock to device tree
Signed-off-by: Ryo Kataoka <ryo.kataoka.wt@renesas.com>
[horms: resolved conflicts]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-rw-r--r-- | arch/arm/boot/dts/r8a7791.dtsi | 8 | ||||
-rw-r--r-- | include/dt-bindings/clock/r8a7791-clock.h | 1 |
2 files changed, 6 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi index 958a69b24ff4..78d637135e77 100644 --- a/arch/arm/boot/dts/r8a7791.dtsi +++ b/arch/arm/boot/dts/r8a7791.dtsi | |||
@@ -1154,15 +1154,17 @@ | |||
1154 | mstp8_clks: mstp8_clks@e6150990 { | 1154 | mstp8_clks: mstp8_clks@e6150990 { |
1155 | compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; | 1155 | compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; |
1156 | reg = <0 0xe6150990 0 4>, <0 0xe61509a0 0 4>; | 1156 | reg = <0 0xe6150990 0 4>, <0 0xe61509a0 0 4>; |
1157 | clocks = <&zg_clk>, <&zg_clk>, <&zg_clk>, <&p_clk>, <&zs_clk>, | 1157 | clocks = <&zg_clk>, <&zg_clk>, <&zg_clk>, <&zg_clk>, <&p_clk>, |
1158 | <&zs_clk>; | 1158 | <&zs_clk>, <&zs_clk>; |
1159 | #clock-cells = <1>; | 1159 | #clock-cells = <1>; |
1160 | clock-indices = < | 1160 | clock-indices = < |
1161 | R8A7791_CLK_IPMMU_SGX | ||
1161 | R8A7791_CLK_VIN2 R8A7791_CLK_VIN1 R8A7791_CLK_VIN0 | 1162 | R8A7791_CLK_VIN2 R8A7791_CLK_VIN1 R8A7791_CLK_VIN0 |
1162 | R8A7791_CLK_ETHER R8A7791_CLK_SATA1 R8A7791_CLK_SATA0 | 1163 | R8A7791_CLK_ETHER R8A7791_CLK_SATA1 R8A7791_CLK_SATA0 |
1163 | >; | 1164 | >; |
1164 | clock-output-names = | 1165 | clock-output-names = |
1165 | "vin2", "vin1", "vin0", "ether", "sata1", "sata0"; | 1166 | "ipmmu_sgx", "vin2", "vin1", "vin0", "ether", "sata1", |
1167 | "sata0"; | ||
1166 | }; | 1168 | }; |
1167 | mstp9_clks: mstp9_clks@e6150994 { | 1169 | mstp9_clks: mstp9_clks@e6150994 { |
1168 | compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; | 1170 | compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; |
diff --git a/include/dt-bindings/clock/r8a7791-clock.h b/include/dt-bindings/clock/r8a7791-clock.h index 3ea2bbc0da3f..ee9bb94423f3 100644 --- a/include/dt-bindings/clock/r8a7791-clock.h +++ b/include/dt-bindings/clock/r8a7791-clock.h | |||
@@ -91,6 +91,7 @@ | |||
91 | #define R8A7791_CLK_LVDS0 26 | 91 | #define R8A7791_CLK_LVDS0 26 |
92 | 92 | ||
93 | /* MSTP8 */ | 93 | /* MSTP8 */ |
94 | #define R8A7791_CLK_IPMMU_SGX 0 | ||
94 | #define R8A7791_CLK_VIN2 9 | 95 | #define R8A7791_CLK_VIN2 9 |
95 | #define R8A7791_CLK_VIN1 10 | 96 | #define R8A7791_CLK_VIN1 10 |
96 | #define R8A7791_CLK_VIN0 11 | 97 | #define R8A7791_CLK_VIN0 11 |