diff options
author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2013-12-05 08:51:36 -0500 |
---|---|---|
committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-12-17 07:17:55 -0500 |
commit | ce0e0713a6b21ec611d4a2eb5c60d18dbb4bf479 (patch) | |
tree | 175824032e359572c57a8304f44e05d11208e929 | |
parent | 6c8b6c288783b05733de31fb61fc8ebfa8ae0229 (diff) |
drm/i915: Linetime watermarks are a HSW feature
Linetime watermarks don't exist on ILK/SNB/IVB, so don't compute them
except on HSW.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 3d4daa1fc3be..276e98df1c0d 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c | |||
@@ -2655,7 +2655,8 @@ static bool intel_compute_pipe_wm(struct drm_crtc *crtc, | |||
2655 | ilk_compute_wm_level(dev_priv, level, params, | 2655 | ilk_compute_wm_level(dev_priv, level, params, |
2656 | &pipe_wm->wm[level]); | 2656 | &pipe_wm->wm[level]); |
2657 | 2657 | ||
2658 | pipe_wm->linetime = hsw_compute_linetime_wm(dev, crtc); | 2658 | if (IS_HASWELL(dev)) |
2659 | pipe_wm->linetime = hsw_compute_linetime_wm(dev, crtc); | ||
2659 | 2660 | ||
2660 | /* At least LP0 must be valid */ | 2661 | /* At least LP0 must be valid */ |
2661 | return ilk_validate_wm_level(0, &max, &pipe_wm->wm[0]); | 2662 | return ilk_validate_wm_level(0, &max, &pipe_wm->wm[0]); |
@@ -3234,7 +3235,8 @@ static void ilk_pipe_wm_get_hw_state(struct drm_crtc *crtc) | |||
3234 | }; | 3235 | }; |
3235 | 3236 | ||
3236 | hw->wm_pipe[pipe] = I915_READ(wm0_pipe_reg[pipe]); | 3237 | hw->wm_pipe[pipe] = I915_READ(wm0_pipe_reg[pipe]); |
3237 | hw->wm_linetime[pipe] = I915_READ(PIPE_WM_LINETIME(pipe)); | 3238 | if (IS_HASWELL(dev)) |
3239 | hw->wm_linetime[pipe] = I915_READ(PIPE_WM_LINETIME(pipe)); | ||
3238 | 3240 | ||
3239 | if (intel_crtc_active(crtc)) { | 3241 | if (intel_crtc_active(crtc)) { |
3240 | u32 tmp = hw->wm_pipe[pipe]; | 3242 | u32 tmp = hw->wm_pipe[pipe]; |