Merge branch 'upstream' of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/libata-dev

5 files changed, 856 insertions, 3 deletions

diff --git a/drivers/scsi/Kconfig b/drivers/scsi/Kconfig
index 787ad00a2b73..a261b9eea139 100644
--- a/drivers/scsi/Kconfig
+++ b/drivers/scsi/Kconfig
@@ -459,6 +459,15 @@ config SCSI_ATA_PIIX
 
           If unsure, say N.
 
+config SCSI_SATA_MV
+        tristate "Marvell SATA support"
+        depends on SCSI_SATA && PCI && EXPERIMENTAL
+        help
+          This option enables support for the Marvell Serial ATA family.
+          Currently supports 88SX[56]0[48][01] chips.
+
+          If unsure, say N.
+
 config SCSI_SATA_NV
         tristate "NVIDIA SATA support"
         depends on SCSI_SATA && PCI && EXPERIMENTAL
diff --git a/drivers/scsi/Makefile b/drivers/scsi/Makefile
index 3746fb9fa2f5..c662b8c8cc6d 100644
--- a/drivers/scsi/Makefile
+++ b/drivers/scsi/Makefile
@@ -132,6 +132,7 @@ obj-$(CONFIG_SCSI_SATA_SIS)	+= libata.o sata_sis.o
 obj-$(CONFIG_SCSI_SATA_SX4)     += libata.o sata_sx4.o
 obj-$(CONFIG_SCSI_SATA_NV)      += libata.o sata_nv.o
 obj-$(CONFIG_SCSI_SATA_ULI)     += libata.o sata_uli.o
+obj-$(CONFIG_SCSI_SATA_MV)      += libata.o sata_mv.o
 
 obj-$(CONFIG_ARM)               += arm/
 
diff --git a/drivers/scsi/ahci.c b/drivers/scsi/ahci.c
index 31065261de8e..320df6cd3def 100644
--- a/drivers/scsi/ahci.c
+++ b/drivers/scsi/ahci.c
@@ -250,7 +250,7 @@ static struct ata_port_info ahci_port_info[] = {
                 .host_flags     = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
                                   ATA_FLAG_SATA_RESET | ATA_FLAG_MMIO |
                                   ATA_FLAG_PIO_DMA,
-                .pio_mask       = 0x03, /* pio3-4 */
+                .pio_mask       = 0x1f, /* pio0-4 */
                 .udma_mask      = 0x7f, /* udma0-6 ; FIXME */
                 .port_ops       = &ahci_ops,
         },
diff --git a/drivers/scsi/sata_mv.c b/drivers/scsi/sata_mv.c
new file mode 100644
index 000000000000..f97e3afa97d9
--- /dev/null
+++ b/drivers/scsi/sata_mv.c
@@ -0,0 +1,843 @@
+/*
+ * sata_mv.c - Marvell SATA support
+ *
+ * Copyright 2005: EMC Corporation, all rights reserved. 
+ *
+ * Please ALWAYS copy linux-ide@vger.kernel.org on emails.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/pci.h>
+#include <linux/init.h>
+#include <linux/blkdev.h>
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+#include <linux/sched.h>
+#include <linux/dma-mapping.h>
+#include "scsi.h"
+#include <scsi/scsi_host.h>
+#include <linux/libata.h>
+#include <asm/io.h>
+
+#define DRV_NAME        "sata_mv"
+#define DRV_VERSION     "0.12"
+
+enum {
+        /* BAR's are enumerated in terms of pci_resource_start() terms */
+        MV_PRIMARY_BAR          = 0,    /* offset 0x10: memory space */
+        MV_IO_BAR               = 2,    /* offset 0x18: IO space */
+        MV_MISC_BAR             = 3,    /* offset 0x1c: FLASH, NVRAM, SRAM */
+
+        MV_MAJOR_REG_AREA_SZ    = 0x10000,      /* 64KB */
+        MV_MINOR_REG_AREA_SZ    = 0x2000,       /* 8KB */
+
+        MV_PCI_REG_BASE         = 0,
+        MV_IRQ_COAL_REG_BASE    = 0x18000,      /* 6xxx part only */
+        MV_SATAHC0_REG_BASE     = 0x20000,
+
+        MV_PCI_REG_SZ           = MV_MAJOR_REG_AREA_SZ,
+        MV_SATAHC_REG_SZ        = MV_MAJOR_REG_AREA_SZ,
+        MV_SATAHC_ARBTR_REG_SZ  = MV_MINOR_REG_AREA_SZ,         /* arbiter */
+        MV_PORT_REG_SZ          = MV_MINOR_REG_AREA_SZ,
+
+        MV_Q_CT                 = 32,
+        MV_CRQB_SZ              = 32,
+        MV_CRPB_SZ              = 8,
+
+        MV_DMA_BOUNDARY         = 0xffffffffU,
+        SATAHC_MASK             = (~(MV_SATAHC_REG_SZ - 1)),
+
+        MV_PORTS_PER_HC         = 4,
+        /* == (port / MV_PORTS_PER_HC) to determine HC from 0-7 port */
+        MV_PORT_HC_SHIFT        = 2,
+        /* == (port % MV_PORTS_PER_HC) to determine port from 0-7 port */
+        MV_PORT_MASK            = 3,
+
+        /* Host Flags */
+        MV_FLAG_DUAL_HC         = (1 << 30),  /* two SATA Host Controllers */
+        MV_FLAG_IRQ_COALESCE    = (1 << 29),  /* IRQ coalescing capability */
+        MV_FLAG_BDMA            = (1 << 28),  /* Basic DMA */
+
+        chip_504x               = 0,
+        chip_508x               = 1,
+        chip_604x               = 2,
+        chip_608x               = 3,
+
+        /* PCI interface registers */
+
+        PCI_MAIN_CMD_STS_OFS    = 0xd30,
+        STOP_PCI_MASTER         = (1 << 2),
+        PCI_MASTER_EMPTY        = (1 << 3),
+        GLOB_SFT_RST            = (1 << 4),
+
+        PCI_IRQ_CAUSE_OFS       = 0x1d58,
+        PCI_IRQ_MASK_OFS        = 0x1d5c,
+        PCI_UNMASK_ALL_IRQS     = 0x7fffff,     /* bits 22-0 */
+
+        HC_MAIN_IRQ_CAUSE_OFS   = 0x1d60,
+        HC_MAIN_IRQ_MASK_OFS    = 0x1d64,
+        PORT0_ERR               = (1 << 0),     /* shift by port # */
+        PORT0_DONE              = (1 << 1),     /* shift by port # */
+        HC0_IRQ_PEND            = 0x1ff,        /* bits 0-8 = HC0's ports */
+        HC_SHIFT                = 9,            /* bits 9-17 = HC1's ports */
+        PCI_ERR                 = (1 << 18),
+        TRAN_LO_DONE            = (1 << 19),    /* 6xxx: IRQ coalescing */
+        TRAN_HI_DONE            = (1 << 20),    /* 6xxx: IRQ coalescing */
+        PORTS_0_7_COAL_DONE     = (1 << 21),    /* 6xxx: IRQ coalescing */
+        GPIO_INT                = (1 << 22),
+        SELF_INT                = (1 << 23),
+        TWSI_INT                = (1 << 24),
+        HC_MAIN_RSVD            = (0x7f << 25), /* bits 31-25 */
+        HC_MAIN_MASKED_IRQS     = (TRAN_LO_DONE | TRAN_HI_DONE | 
+                                   PORTS_0_7_COAL_DONE | GPIO_INT | TWSI_INT |
+                                   HC_MAIN_RSVD),
+
+        /* SATAHC registers */
+        HC_CFG_OFS              = 0,
+
+        HC_IRQ_CAUSE_OFS        = 0x14,
+        CRBP_DMA_DONE           = (1 << 0),     /* shift by port # */
+        HC_IRQ_COAL             = (1 << 4),     /* IRQ coalescing */
+        DEV_IRQ                 = (1 << 8),     /* shift by port # */
+
+        /* Shadow block registers */
+        SHD_PIO_DATA_OFS        = 0x100,
+        SHD_FEA_ERR_OFS         = 0x104,
+        SHD_SECT_CNT_OFS        = 0x108,
+        SHD_LBA_L_OFS           = 0x10C,
+        SHD_LBA_M_OFS           = 0x110,
+        SHD_LBA_H_OFS           = 0x114,
+        SHD_DEV_HD_OFS          = 0x118,
+        SHD_CMD_STA_OFS         = 0x11C,
+        SHD_CTL_AST_OFS         = 0x120,
+
+        /* SATA registers */
+        SATA_STATUS_OFS         = 0x300,  /* ctrl, err regs follow status */
+        SATA_ACTIVE_OFS         = 0x350,
+
+        /* Port registers */
+        EDMA_CFG_OFS            = 0,
+
+        EDMA_ERR_IRQ_CAUSE_OFS  = 0x8,
+        EDMA_ERR_IRQ_MASK_OFS   = 0xc,
+        EDMA_ERR_D_PAR          = (1 << 0),
+        EDMA_ERR_PRD_PAR        = (1 << 1),
+        EDMA_ERR_DEV            = (1 << 2),
+        EDMA_ERR_DEV_DCON       = (1 << 3),
+        EDMA_ERR_DEV_CON        = (1 << 4),
+        EDMA_ERR_SERR