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authorPeter Ujfalusi <peter.ujfalusi@ti.com>2013-11-14 04:35:32 -0500
committerMark Brown <broonie@linaro.org>2013-12-10 06:22:16 -0500
commitcbc7956c81eea644c0d99aee43f1632897703300 (patch)
treee3118982d3e46d1babb75b903f03de1e17504b09
parent487dce8823cdcb70e645e5312a0d4f7081e1ad13 (diff)
ASoC: davinci-mcasp: Data source (bus) selection support
The audio data to/from McASP can be sent/received via two method: Via the data port (preferred) or via the configuration bus. Currently the driver assumes that all data communication will be done via the data port. This patch adds support for selecting the configuration port as data interface. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Mark Brown <broonie@linaro.org>
-rw-r--r--sound/soc/davinci/davinci-mcasp.c38
1 files changed, 28 insertions, 10 deletions
diff --git a/sound/soc/davinci/davinci-mcasp.c b/sound/soc/davinci/davinci-mcasp.c
index 72ea45893abf..35a6292889a5 100644
--- a/sound/soc/davinci/davinci-mcasp.c
+++ b/sound/soc/davinci/davinci-mcasp.c
@@ -53,6 +53,8 @@ struct davinci_mcasp {
53 u8 txnumevt; 53 u8 txnumevt;
54 u8 rxnumevt; 54 u8 rxnumevt;
55 55
56 bool dat_port;
57
56#ifdef CONFIG_PM_SLEEP 58#ifdef CONFIG_PM_SLEEP
57 struct { 59 struct {
58 u32 txfmtctl; 60 u32 txfmtctl;
@@ -482,6 +484,7 @@ static void davinci_hw_param(struct davinci_mcasp *mcasp, int stream)
482{ 484{
483 int i, active_slots; 485 int i, active_slots;
484 u32 mask = 0; 486 u32 mask = 0;
487 u32 busel = 0;
485 488
486 active_slots = (mcasp->tdm_slots > 31) ? 32 : mcasp->tdm_slots; 489 active_slots = (mcasp->tdm_slots > 31) ? 32 : mcasp->tdm_slots;
487 for (i = 0; i < active_slots; i++) 490 for (i = 0; i < active_slots; i++)
@@ -489,11 +492,15 @@ static void davinci_hw_param(struct davinci_mcasp *mcasp, int stream)
489 492
490 mcasp_clr_bits(mcasp->base + DAVINCI_MCASP_ACLKXCTL_REG, TX_ASYNC); 493 mcasp_clr_bits(mcasp->base + DAVINCI_MCASP_ACLKXCTL_REG, TX_ASYNC);
491 494
495 if (!mcasp->dat_port)
496 busel = TXSEL;
497
492 if (stream == SNDRV_PCM_STREAM_PLAYBACK) { 498 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
493 /* bit stream is MSB first with no delay */ 499 /* bit stream is MSB first with no delay */
494 /* DSP_B mode */ 500 /* DSP_B mode */
495 mcasp_set_reg(mcasp->base + DAVINCI_MCASP_TXTDM_REG, mask); 501 mcasp_set_reg(mcasp->base + DAVINCI_MCASP_TXTDM_REG, mask);
496 mcasp_set_bits(mcasp->base + DAVINCI_MCASP_TXFMT_REG, TXORD); 502 mcasp_set_bits(mcasp->base + DAVINCI_MCASP_TXFMT_REG,
503 busel | TXORD);
497 504
498 if ((mcasp->tdm_slots >= 2) && (mcasp->tdm_slots <= 32)) 505 if ((mcasp->tdm_slots >= 2) && (mcasp->tdm_slots <= 32))
499 mcasp_mod_bits(mcasp->base + DAVINCI_MCASP_TXFMCTL_REG, 506 mcasp_mod_bits(mcasp->base + DAVINCI_MCASP_TXFMCTL_REG,
@@ -504,7 +511,8 @@ static void davinci_hw_param(struct davinci_mcasp *mcasp, int stream)
504 } else { 511 } else {
505 /* bit stream is MSB first with no delay */ 512 /* bit stream is MSB first with no delay */
506 /* DSP_B mode */ 513 /* DSP_B mode */
507 mcasp_set_bits(mcasp->base + DAVINCI_MCASP_RXFMT_REG, RXORD); 514 mcasp_set_bits(mcasp->base + DAVINCI_MCASP_RXFMT_REG,
515 busel | RXORD);
508 mcasp_set_reg(mcasp->base + DAVINCI_MCASP_RXTDM_REG, mask); 516 mcasp_set_reg(mcasp->base + DAVINCI_MCASP_RXTDM_REG, mask);
509 517
510 if ((mcasp->tdm_slots >= 2) && (mcasp->tdm_slots <= 32)) 518 if ((mcasp->tdm_slots >= 2) && (mcasp->tdm_slots <= 32))
@@ -928,23 +936,22 @@ static int davinci_mcasp_probe(struct platform_device *pdev)
928 mcasp->version = pdata->version; 936 mcasp->version = pdata->version;
929 mcasp->txnumevt = pdata->txnumevt; 937 mcasp->txnumevt = pdata->txnumevt;
930 mcasp->rxnumevt = pdata->rxnumevt; 938 mcasp->rxnumevt = pdata->rxnumevt;
931 if (mcasp->version < MCASP_VERSION_3)
932 mcasp->fifo_base = DAVINCI_MCASP_V2_AFIFO_BASE;
933 else
934 mcasp->fifo_base = DAVINCI_MCASP_V3_AFIFO_BASE;
935 939
936 mcasp->dev = &pdev->dev; 940 mcasp->dev = &pdev->dev;
937 941
938 dat = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dat"); 942 dat = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dat");
939 if (!dat) 943 if (dat)
940 dat = mem; 944 mcasp->dat_port = true;
941 945
942 dma_data = &mcasp->dma_params[SNDRV_PCM_STREAM_PLAYBACK]; 946 dma_data = &mcasp->dma_params[SNDRV_PCM_STREAM_PLAYBACK];
943 dma_data->asp_chan_q = pdata->asp_chan_q; 947 dma_data->asp_chan_q = pdata->asp_chan_q;
944 dma_data->ram_chan_q = pdata->ram_chan_q; 948 dma_data->ram_chan_q = pdata->ram_chan_q;
945 dma_data->sram_pool = pdata->sram_pool; 949 dma_data->sram_pool = pdata->sram_pool;
946 dma_data->sram_size = pdata->sram_size_playback; 950 dma_data->sram_size = pdata->sram_size_playback;
947 dma_data->dma_addr = dat->start + pdata->tx_dma_offset; 951 if (dat)
952 dma_data->dma_addr = dat->start;
953 else
954 dma_data->dma_addr = mem->start + pdata->tx_dma_offset;
948 955
949 res = platform_get_resource(pdev, IORESOURCE_DMA, 0); 956 res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
950 if (res) 957 if (res)
@@ -957,7 +964,18 @@ static int davinci_mcasp_probe(struct platform_device *pdev)
957 dma_data->ram_chan_q = pdata->ram_chan_q; 964 dma_data->ram_chan_q = pdata->ram_chan_q;
958 dma_data->sram_pool = pdata->sram_pool; 965 dma_data->sram_pool = pdata->sram_pool;
959 dma_data->sram_size = pdata->sram_size_capture; 966 dma_data->sram_size = pdata->sram_size_capture;
960 dma_data->dma_addr = dat->start + pdata->rx_dma_offset; 967 if (dat)
968 dma_data->dma_addr = dat->start;
969 else
970 dma_data->dma_addr = mem->start + pdata->rx_dma_offset;
971
972 if (mcasp->version < MCASP_VERSION_3) {
973 mcasp->fifo_base = DAVINCI_MCASP_V2_AFIFO_BASE;
974 /* dma_data->dma_addr is pointing to the data port address */
975 mcasp->dat_port = true;
976 } else {
977 mcasp->fifo_base = DAVINCI_MCASP_V3_AFIFO_BASE;
978 }
961 979
962 res = platform_get_resource(pdev, IORESOURCE_DMA, 1); 980 res = platform_get_resource(pdev, IORESOURCE_DMA, 1);
963 if (res) 981 if (res)