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authorDavid Woodhouse <dwmw2@infradead.org>2006-05-04 12:32:44 -0400
committerDavid Woodhouse <dwmw2@infradead.org>2006-05-04 12:32:44 -0400
commitcb8c1fdc0cf703e3297499dcd1a4b20b27570a7a (patch)
tree02f3706aaa519ec22b0b0260410973d323eadda0
parentde654c97861c314fd0fc0b6a6dd1bc4202e00e42 (diff)
Use __uXX types in <linux/i2o_dev.h>, include <linux/ioctl.h> too
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
-rw-r--r--include/linux/i2o-dev.h167
1 files changed, 80 insertions, 87 deletions
diff --git a/include/linux/i2o-dev.h b/include/linux/i2o-dev.h
index 36fd18cdad28..c2519df1b6dc 100644
--- a/include/linux/i2o-dev.h
+++ b/include/linux/i2o-dev.h
@@ -13,7 +13,7 @@
13 * This header file defines the I2O APIs that are available to both 13 * This header file defines the I2O APIs that are available to both
14 * the kernel and user level applications. Kernel specific structures 14 * the kernel and user level applications. Kernel specific structures
15 * are defined in i2o_osm. OSMs should include _only_ i2o_osm.h which 15 * are defined in i2o_osm. OSMs should include _only_ i2o_osm.h which
16 * automatically includs this file. 16 * automatically includes this file.
17 * 17 *
18 */ 18 */
19 19
@@ -23,14 +23,7 @@
23/* How many controllers are we allowing */ 23/* How many controllers are we allowing */
24#define MAX_I2O_CONTROLLERS 32 24#define MAX_I2O_CONTROLLERS 32
25 25
26//#include <linux/ioctl.h> 26#include <linux/ioctl.h>
27#ifndef __KERNEL__
28
29typedef unsigned char u8;
30typedef unsigned short u16;
31typedef unsigned int u32;
32
33#endif /* __KERNEL__ */
34 27
35/* 28/*
36 * I2O Control IOCTLs and structures 29 * I2O Control IOCTLs and structures
@@ -53,7 +46,7 @@ typedef unsigned int u32;
53 46
54struct i2o_cmd_passthru32 { 47struct i2o_cmd_passthru32 {
55 unsigned int iop; /* IOP unit number */ 48 unsigned int iop; /* IOP unit number */
56 u32 msg; /* message */ 49 __u32 msg; /* message */
57}; 50};
58 51
59struct i2o_cmd_passthru { 52struct i2o_cmd_passthru {
@@ -138,53 +131,53 @@ typedef struct i2o_sg_io_hdr {
138#define I2O_BUS_UNKNOWN 0x80 131#define I2O_BUS_UNKNOWN 0x80
139 132
140typedef struct _i2o_pci_bus { 133typedef struct _i2o_pci_bus {
141 u8 PciFunctionNumber; 134 __u8 PciFunctionNumber;
142 u8 PciDeviceNumber; 135 __u8 PciDeviceNumber;
143 u8 PciBusNumber; 136 __u8 PciBusNumber;
144 u8 reserved; 137 __u8 reserved;
145 u16 PciVendorID; 138 __u16 PciVendorID;
146 u16 PciDeviceID; 139 __u16 PciDeviceID;
147} i2o_pci_bus; 140} i2o_pci_bus;
148 141
149typedef struct _i2o_local_bus { 142typedef struct _i2o_local_bus {
150 u16 LbBaseIOPort; 143 __u16 LbBaseIOPort;
151 u16 reserved; 144 __u16 reserved;
152 u32 LbBaseMemoryAddress; 145 __u32 LbBaseMemoryAddress;
153} i2o_local_bus; 146} i2o_local_bus;
154 147
155typedef struct _i2o_isa_bus { 148typedef struct _i2o_isa_bus {
156 u16 IsaBaseIOPort; 149 __u16 IsaBaseIOPort;
157 u8 CSN; 150 __u8 CSN;
158 u8 reserved; 151 __u8 reserved;
159 u32 IsaBaseMemoryAddress; 152 __u32 IsaBaseMemoryAddress;
160} i2o_isa_bus; 153} i2o_isa_bus;
161 154
162typedef struct _i2o_eisa_bus_info { 155typedef struct _i2o_eisa_bus_info {
163 u16 EisaBaseIOPort; 156 __u16 EisaBaseIOPort;
164 u8 reserved; 157 __u8 reserved;
165 u8 EisaSlotNumber; 158 __u8 EisaSlotNumber;
166 u32 EisaBaseMemoryAddress; 159 __u32 EisaBaseMemoryAddress;
167} i2o_eisa_bus; 160} i2o_eisa_bus;
168 161
169typedef struct _i2o_mca_bus { 162typedef struct _i2o_mca_bus {
170 u16 McaBaseIOPort; 163 __u16 McaBaseIOPort;
171 u8 reserved; 164 __u8 reserved;
172 u8 McaSlotNumber; 165 __u8 McaSlotNumber;
173 u32 McaBaseMemoryAddress; 166 __u32 McaBaseMemoryAddress;
174} i2o_mca_bus; 167} i2o_mca_bus;
175 168
176typedef struct _i2o_other_bus { 169typedef struct _i2o_other_bus {
177 u16 BaseIOPort; 170 __u16 BaseIOPort;
178 u16 reserved; 171 __u16 reserved;
179 u32 BaseMemoryAddress; 172 __u32 BaseMemoryAddress;
180} i2o_other_bus; 173} i2o_other_bus;
181 174
182typedef struct _i2o_hrt_entry { 175typedef struct _i2o_hrt_entry {
183 u32 adapter_id; 176 __u32 adapter_id;
184 u32 parent_tid:12; 177 __u32 parent_tid:12;
185 u32 state:4; 178 __u32 state:4;
186 u32 bus_num:8; 179 __u32 bus_num:8;
187 u32 bus_type:8; 180 __u32 bus_type:8;
188 union { 181 union {
189 i2o_pci_bus pci_bus; 182 i2o_pci_bus pci_bus;
190 i2o_local_bus local_bus; 183 i2o_local_bus local_bus;
@@ -196,66 +189,66 @@ typedef struct _i2o_hrt_entry {
196} i2o_hrt_entry; 189} i2o_hrt_entry;
197 190
198typedef struct _i2o_hrt { 191typedef struct _i2o_hrt {
199 u16 num_entries; 192 __u16 num_entries;
200 u8 entry_len; 193 __u8 entry_len;
201 u8 hrt_version; 194 __u8 hrt_version;
202 u32 change_ind; 195 __u32 change_ind;
203 i2o_hrt_entry hrt_entry[1]; 196 i2o_hrt_entry hrt_entry[1];
204} i2o_hrt; 197} i2o_hrt;
205 198
206typedef struct _i2o_lct_entry { 199typedef struct _i2o_lct_entry {
207 u32 entry_size:16; 200 __u32 entry_size:16;
208 u32 tid:12; 201 __u32 tid:12;
209 u32 reserved:4; 202 __u32 reserved:4;
210 u32 change_ind; 203 __u32 change_ind;
211 u32 device_flags; 204 __u32 device_flags;
212 u32 class_id:12; 205 __u32 class_id:12;
213 u32 version:4; 206 __u32 version:4;
214 u32 vendor_id:16; 207 __u32 vendor_id:16;
215 u32 sub_class; 208 __u32 sub_class;
216 u32 user_tid:12; 209 __u32 user_tid:12;
217 u32 parent_tid:12; 210 __u32 parent_tid:12;
218 u32 bios_info:8; 211 __u32 bios_info:8;
219 u8 identity_tag[8]; 212 __u8 identity_tag[8];
220 u32 event_capabilities; 213 __u32 event_capabilities;
221} i2o_lct_entry; 214} i2o_lct_entry;
222 215
223typedef struct _i2o_lct { 216typedef struct _i2o_lct {
224 u32 table_size:16; 217 __u32 table_size:16;
225 u32 boot_tid:12; 218 __u32 boot_tid:12;
226 u32 lct_ver:4; 219 __u32 lct_ver:4;
227 u32 iop_flags; 220 __u32 iop_flags;
228 u32 change_ind; 221 __u32 change_ind;
229 i2o_lct_entry lct_entry[1]; 222 i2o_lct_entry lct_entry[1];
230} i2o_lct; 223} i2o_lct;
231 224
232typedef struct _i2o_status_block { 225typedef struct _i2o_status_block {
233 u16 org_id; 226 __u16 org_id;
234 u16 reserved; 227 __u16 reserved;
235 u16 iop_id:12; 228 __u16 iop_id:12;
236 u16 reserved1:4; 229 __u16 reserved1:4;
237 u16 host_unit_id; 230 __u16 host_unit_id;
238 u16 segment_number:12; 231 __u16 segment_number:12;
239 u16 i2o_version:4; 232 __u16 i2o_version:4;
240 u8 iop_state; 233 __u8 iop_state;
241 u8 msg_type; 234 __u8 msg_type;
242 u16 inbound_frame_size; 235 __u16 inbound_frame_size;
243 u8 init_code; 236 __u8 init_code;
244 u8 reserved2; 237 __u8 reserved2;
245 u32 max_inbound_frames; 238 __u32 max_inbound_frames;
246 u32 cur_inbound_frames; 239 __u32 cur_inbound_frames;
247 u32 max_outbound_frames; 240 __u32 max_outbound_frames;
248 char product_id[24]; 241 char product_id[24];
249 u32 expected_lct_size; 242 __u32 expected_lct_size;
250 u32 iop_capabilities; 243 __u32 iop_capabilities;
251 u32 desired_mem_size; 244 __u32 desired_mem_size;
252 u32 current_mem_size; 245 __u32 current_mem_size;
253 u32 current_mem_base; 246 __u32 current_mem_base;
254 u32 desired_io_size; 247 __u32 desired_io_size;
255 u32 current_io_size; 248 __u32 current_io_size;
256 u32 current_io_base; 249 __u32 current_io_base;
257 u32 reserved3:24; 250 __u32 reserved3:24;
258 u32 cmd_status:8; 251 __u32 cmd_status:8;
259} i2o_status_block; 252} i2o_status_block;
260 253
261/* Event indicator mask flags */ 254/* Event indicator mask flags */