diff options
author | Avinash Patil <patila@marvell.com> | 2013-02-08 21:18:09 -0500 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2013-02-11 15:34:57 -0500 |
commit | ca8f21127883f8c1ea48b9ce8f93ead2175142a7 (patch) | |
tree | ed2e9a71c0871e396115f8010993926fbbf43ea2 | |
parent | e05dc3e93c136ecd329ed2d57d4eb2e82f530304 (diff) |
mwifiex: add PCIe8897 support
This patch adds PCIe8897 support to mwifiex.
In PCIe8897 PFU (pre-fetch unit) is enabled by default.
This patch adds support to accommodate this feaure as well.
Signed-off-by: Avinash Patil <patila@marvell.com>
Signed-off-by: Yogesh Ashok Powar <yogeshp@marvell.com>
Signed-off-by: Nishant Sarmukadam <nishants@marvell.com>
Signed-off-by: Bing Zhao <bzhao@marvell.com>
Signed-off-by: Frank Huang <frankh@marvell.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
-rw-r--r-- | drivers/net/wireless/mwifiex/Kconfig | 4 | ||||
-rw-r--r-- | drivers/net/wireless/mwifiex/pcie.c | 242 | ||||
-rw-r--r-- | drivers/net/wireless/mwifiex/pcie.h | 99 |
3 files changed, 275 insertions, 70 deletions
diff --git a/drivers/net/wireless/mwifiex/Kconfig b/drivers/net/wireless/mwifiex/Kconfig index b2e27723f801..4f614aad9ded 100644 --- a/drivers/net/wireless/mwifiex/Kconfig +++ b/drivers/net/wireless/mwifiex/Kconfig | |||
@@ -20,12 +20,12 @@ config MWIFIEX_SDIO | |||
20 | mwifiex_sdio. | 20 | mwifiex_sdio. |
21 | 21 | ||
22 | config MWIFIEX_PCIE | 22 | config MWIFIEX_PCIE |
23 | tristate "Marvell WiFi-Ex Driver for PCIE 8766" | 23 | tristate "Marvell WiFi-Ex Driver for PCIE 8766/8897" |
24 | depends on MWIFIEX && PCI | 24 | depends on MWIFIEX && PCI |
25 | select FW_LOADER | 25 | select FW_LOADER |
26 | ---help--- | 26 | ---help--- |
27 | This adds support for wireless adapters based on Marvell | 27 | This adds support for wireless adapters based on Marvell |
28 | 8766 chipset with PCIe interface. | 28 | 8766/8897 chipsets with PCIe interface. |
29 | 29 | ||
30 | If you choose to build it as a module, it will be called | 30 | If you choose to build it as a module, it will be called |
31 | mwifiex_pcie. | 31 | mwifiex_pcie. |
diff --git a/drivers/net/wireless/mwifiex/pcie.c b/drivers/net/wireless/mwifiex/pcie.c index 6c15969efd55..3b9be7c185cb 100644 --- a/drivers/net/wireless/mwifiex/pcie.c +++ b/drivers/net/wireless/mwifiex/pcie.c | |||
@@ -237,15 +237,17 @@ static int mwifiex_pcie_resume(struct pci_dev *pdev) | |||
237 | return 0; | 237 | return 0; |
238 | } | 238 | } |
239 | 239 | ||
240 | #define PCIE_VENDOR_ID_MARVELL (0x11ab) | ||
241 | #define PCIE_DEVICE_ID_MARVELL_88W8766P (0x2b30) | ||
242 | |||
243 | static DEFINE_PCI_DEVICE_TABLE(mwifiex_ids) = { | 240 | static DEFINE_PCI_DEVICE_TABLE(mwifiex_ids) = { |
244 | { | 241 | { |
245 | PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8766P, | 242 | PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8766P, |
246 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, | 243 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
247 | .driver_data = (unsigned long) &mwifiex_pcie8766, | 244 | .driver_data = (unsigned long) &mwifiex_pcie8766, |
248 | }, | 245 | }, |
246 | { | ||
247 | PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8897, | ||
248 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, | ||
249 | .driver_data = (unsigned long) &mwifiex_pcie8897, | ||
250 | }, | ||
249 | {}, | 251 | {}, |
250 | }; | 252 | }; |
251 | 253 | ||
@@ -377,15 +379,24 @@ static int mwifiex_pcie_enable_host_int(struct mwifiex_adapter *adapter) | |||
377 | static int mwifiex_init_txq_ring(struct mwifiex_adapter *adapter) | 379 | static int mwifiex_init_txq_ring(struct mwifiex_adapter *adapter) |
378 | { | 380 | { |
379 | struct pcie_service_card *card = adapter->card; | 381 | struct pcie_service_card *card = adapter->card; |
382 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; | ||
380 | struct mwifiex_pcie_buf_desc *desc; | 383 | struct mwifiex_pcie_buf_desc *desc; |
384 | struct mwifiex_pfu_buf_desc *desc2; | ||
381 | int i; | 385 | int i; |
382 | 386 | ||
383 | for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) { | 387 | for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) { |
384 | card->tx_buf_list[i] = NULL; | 388 | card->tx_buf_list[i] = NULL; |
385 | card->txbd_ring[i] = (void *)(card->txbd_ring_vbase + | 389 | if (reg->pfu_enabled) { |
386 | (sizeof(*desc) * i)); | 390 | card->txbd_ring[i] = (void *)card->txbd_ring_vbase + |
387 | desc = card->txbd_ring[i]; | 391 | (sizeof(*desc2) * i); |
388 | memset(desc, 0, sizeof(*desc)); | 392 | desc2 = card->txbd_ring[i]; |
393 | memset(desc2, 0, sizeof(*desc2)); | ||
394 | } else { | ||
395 | card->txbd_ring[i] = (void *)card->txbd_ring_vbase + | ||
396 | (sizeof(*desc) * i); | ||
397 | desc = card->txbd_ring[i]; | ||
398 | memset(desc, 0, sizeof(*desc)); | ||
399 | } | ||
389 | } | 400 | } |
390 | 401 | ||
391 | return 0; | 402 | return 0; |
@@ -398,8 +409,10 @@ static int mwifiex_init_txq_ring(struct mwifiex_adapter *adapter) | |||
398 | static int mwifiex_init_rxq_ring(struct mwifiex_adapter *adapter) | 409 | static int mwifiex_init_rxq_ring(struct mwifiex_adapter *adapter) |
399 | { | 410 | { |
400 | struct pcie_service_card *card = adapter->card; | 411 | struct pcie_service_card *card = adapter->card; |
412 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; | ||
401 | struct sk_buff *skb; | 413 | struct sk_buff *skb; |
402 | struct mwifiex_pcie_buf_desc *desc; | 414 | struct mwifiex_pcie_buf_desc *desc; |
415 | struct mwifiex_pfu_buf_desc *desc2; | ||
403 | dma_addr_t buf_pa; | 416 | dma_addr_t buf_pa; |
404 | int i; | 417 | int i; |
405 | 418 | ||
@@ -426,12 +439,23 @@ static int mwifiex_init_rxq_ring(struct mwifiex_adapter *adapter) | |||
426 | (u32)((u64)buf_pa >> 32)); | 439 | (u32)((u64)buf_pa >> 32)); |
427 | 440 | ||
428 | card->rx_buf_list[i] = skb; | 441 | card->rx_buf_list[i] = skb; |
429 | card->rxbd_ring[i] = (void *)(card->rxbd_ring_vbase + | 442 | if (reg->pfu_enabled) { |
430 | (sizeof(*desc) * i)); | 443 | card->rxbd_ring[i] = (void *)card->rxbd_ring_vbase + |
431 | desc = card->rxbd_ring[i]; | 444 | (sizeof(*desc2) * i); |
432 | desc->paddr = buf_pa; | 445 | desc2 = card->rxbd_ring[i]; |
433 | desc->len = (u16)skb->len; | 446 | desc2->paddr = buf_pa; |
434 | desc->flags = 0; | 447 | desc2->len = (u16)skb->len; |
448 | desc2->frag_len = (u16)skb->len; | ||
449 | desc2->flags = reg->ring_flag_eop | reg->ring_flag_sop; | ||
450 | desc2->offset = 0; | ||
451 | } else { | ||
452 | card->rxbd_ring[i] = (void *)(card->rxbd_ring_vbase + | ||
453 | (sizeof(*desc) * i)); | ||
454 | desc = card->rxbd_ring[i]; | ||
455 | desc->paddr = buf_pa; | ||
456 | desc->len = (u16)skb->len; | ||
457 | desc->flags = 0; | ||
458 | } | ||
435 | } | 459 | } |
436 | 460 | ||
437 | return 0; | 461 | return 0; |
@@ -489,20 +513,33 @@ static int mwifiex_pcie_init_evt_ring(struct mwifiex_adapter *adapter) | |||
489 | static void mwifiex_cleanup_txq_ring(struct mwifiex_adapter *adapter) | 513 | static void mwifiex_cleanup_txq_ring(struct mwifiex_adapter *adapter) |
490 | { | 514 | { |
491 | struct pcie_service_card *card = adapter->card; | 515 | struct pcie_service_card *card = adapter->card; |
516 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; | ||
492 | struct sk_buff *skb; | 517 | struct sk_buff *skb; |
493 | struct mwifiex_pcie_buf_desc *desc; | 518 | struct mwifiex_pcie_buf_desc *desc; |
519 | struct mwifiex_pfu_buf_desc *desc2; | ||
494 | int i; | 520 | int i; |
495 | 521 | ||
496 | for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) { | 522 | for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) { |
497 | desc = card->txbd_ring[i]; | 523 | if (reg->pfu_enabled) { |
498 | if (card->tx_buf_list[i]) { | 524 | desc2 = card->txbd_ring[i]; |
499 | skb = card->tx_buf_list[i]; | 525 | if (card->tx_buf_list[i]) { |
500 | pci_unmap_single(card->dev, desc->paddr, skb->len, | 526 | skb = card->tx_buf_list[i]; |
501 | PCI_DMA_TODEVICE); | 527 | pci_unmap_single(card->dev, desc2->paddr, |
502 | dev_kfree_skb_any(skb); | 528 | skb->len, PCI_DMA_TODEVICE); |
529 | dev_kfree_skb_any(skb); | ||
530 | } | ||
531 | memset(desc2, 0, sizeof(*desc2)); | ||
532 | } else { | ||
533 | desc = card->txbd_ring[i]; | ||
534 | if (card->tx_buf_list[i]) { | ||
535 | skb = card->tx_buf_list[i]; | ||
536 | pci_unmap_single(card->dev, desc->paddr, | ||
537 | skb->len, PCI_DMA_TODEVICE); | ||
538 | dev_kfree_skb_any(skb); | ||
539 | } | ||
540 | memset(desc, 0, sizeof(*desc)); | ||
503 | } | 541 | } |
504 | card->tx_buf_list[i] = NULL; | 542 | card->tx_buf_list[i] = NULL; |
505 | memset(desc, 0, sizeof(*desc)); | ||
506 | } | 543 | } |
507 | 544 | ||
508 | return; | 545 | return; |
@@ -514,20 +551,33 @@ static void mwifiex_cleanup_txq_ring(struct mwifiex_adapter *adapter) | |||
514 | static void mwifiex_cleanup_rxq_ring(struct mwifiex_adapter *adapter) | 551 | static void mwifiex_cleanup_rxq_ring(struct mwifiex_adapter *adapter) |
515 | { | 552 | { |
516 | struct pcie_service_card *card = adapter->card; | 553 | struct pcie_service_card *card = adapter->card; |
554 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; | ||
517 | struct mwifiex_pcie_buf_desc *desc; | 555 | struct mwifiex_pcie_buf_desc *desc; |
556 | struct mwifiex_pfu_buf_desc *desc2; | ||
518 | struct sk_buff *skb; | 557 | struct sk_buff *skb; |
519 | int i; | 558 | int i; |
520 | 559 | ||
521 | for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) { | 560 | for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) { |
522 | desc = card->rxbd_ring[i]; | 561 | if (reg->pfu_enabled) { |
523 | if (card->rx_buf_list[i]) { | 562 | desc2 = card->rxbd_ring[i]; |
524 | skb = card->rx_buf_list[i]; | 563 | if (card->rx_buf_list[i]) { |
525 | pci_unmap_single(card->dev, desc->paddr, | 564 | skb = card->rx_buf_list[i]; |
526 | MWIFIEX_RX_DATA_BUF_SIZE, | 565 | pci_unmap_single(card->dev, desc2->paddr, |
527 | PCI_DMA_FROMDEVICE); | 566 | skb->len, PCI_DMA_TODEVICE); |
528 | dev_kfree_skb_any(skb); | 567 | dev_kfree_skb_any(skb); |
568 | } | ||
569 | memset(desc2, 0, sizeof(*desc2)); | ||
570 | } else { | ||
571 | desc = card->rxbd_ring[i]; | ||
572 | if (card->rx_buf_list[i]) { | ||
573 | skb = card->rx_buf_list[i]; | ||
574 | pci_unmap_single(card->dev, desc->paddr, | ||
575 | skb->len, PCI_DMA_TODEVICE); | ||
576 | dev_kfree_skb_any(skb); | ||
577 | } | ||
578 | memset(desc, 0, sizeof(*desc)); | ||
529 | } | 579 | } |
530 | memset(desc, 0, sizeof(*desc)); | 580 | card->rx_buf_list[i] = NULL; |
531 | } | 581 | } |
532 | 582 | ||
533 | return; | 583 | return; |
@@ -571,12 +621,21 @@ static int mwifiex_pcie_create_txbd_ring(struct mwifiex_adapter *adapter) | |||
571 | * starts at zero with rollover bit set | 621 | * starts at zero with rollover bit set |
572 | */ | 622 | */ |
573 | card->txbd_wrptr = 0; | 623 | card->txbd_wrptr = 0; |
574 | card->txbd_rdptr |= reg->tx_rollover_ind; | 624 | |
625 | if (reg->pfu_enabled) | ||
626 | card->txbd_rdptr = 0; | ||
627 | else | ||
628 | card->txbd_rdptr |= reg->tx_rollover_ind; | ||
575 | 629 | ||
576 | /* allocate shared memory for the BD ring and divide the same in to | 630 | /* allocate shared memory for the BD ring and divide the same in to |
577 | several descriptors */ | 631 | several descriptors */ |
578 | card->txbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) * | 632 | if (reg->pfu_enabled) |
579 | MWIFIEX_MAX_TXRX_BD; | 633 | card->txbd_ring_size = sizeof(struct mwifiex_pfu_buf_desc) * |
634 | MWIFIEX_MAX_TXRX_BD; | ||
635 | else | ||
636 | card->txbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) * | ||
637 | MWIFIEX_MAX_TXRX_BD; | ||
638 | |||
580 | dev_dbg(adapter->dev, "info: txbd_ring: Allocating %d bytes\n", | 639 | dev_dbg(adapter->dev, "info: txbd_ring: Allocating %d bytes\n", |
581 | card->txbd_ring_size); | 640 | card->txbd_ring_size); |
582 | card->txbd_ring_vbase = pci_alloc_consistent(card->dev, | 641 | card->txbd_ring_vbase = pci_alloc_consistent(card->dev, |
@@ -632,8 +691,13 @@ static int mwifiex_pcie_create_rxbd_ring(struct mwifiex_adapter *adapter) | |||
632 | card->rxbd_wrptr = 0; | 691 | card->rxbd_wrptr = 0; |
633 | card->rxbd_rdptr = reg->rx_rollover_ind; | 692 | card->rxbd_rdptr = reg->rx_rollover_ind; |
634 | 693 | ||
635 | card->rxbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) * | 694 | if (reg->pfu_enabled) |
636 | MWIFIEX_MAX_TXRX_BD; | 695 | card->rxbd_ring_size = sizeof(struct mwifiex_pfu_buf_desc) * |
696 | MWIFIEX_MAX_TXRX_BD; | ||
697 | else | ||
698 | card->rxbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) * | ||
699 | MWIFIEX_MAX_TXRX_BD; | ||
700 | |||
637 | dev_dbg(adapter->dev, "info: rxbd_ring: Allocating %d bytes\n", | 701 | dev_dbg(adapter->dev, "info: rxbd_ring: Allocating %d bytes\n", |
638 | card->rxbd_ring_size); | 702 | card->rxbd_ring_size); |
639 | card->rxbd_ring_vbase = pci_alloc_consistent(card->dev, | 703 | card->rxbd_ring_vbase = pci_alloc_consistent(card->dev, |
@@ -695,7 +759,8 @@ static int mwifiex_pcie_create_evtbd_ring(struct mwifiex_adapter *adapter) | |||
695 | card->evtbd_rdptr = reg->evt_rollover_ind; | 759 | card->evtbd_rdptr = reg->evt_rollover_ind; |
696 | 760 | ||
697 | card->evtbd_ring_size = sizeof(struct mwifiex_evt_buf_desc) * | 761 | card->evtbd_ring_size = sizeof(struct mwifiex_evt_buf_desc) * |
698 | MWIFIEX_MAX_EVT_BD; | 762 | MWIFIEX_MAX_EVT_BD; |
763 | |||
699 | dev_dbg(adapter->dev, "info: evtbd_ring: Allocating %d bytes\n", | 764 | dev_dbg(adapter->dev, "info: evtbd_ring: Allocating %d bytes\n", |
700 | card->evtbd_ring_size); | 765 | card->evtbd_ring_size); |
701 | card->evtbd_ring_vbase = pci_alloc_consistent(card->dev, | 766 | card->evtbd_ring_vbase = pci_alloc_consistent(card->dev, |
@@ -875,11 +940,11 @@ static int mwifiex_clean_pcie_ring_buf(struct mwifiex_adapter *adapter) | |||
875 | */ | 940 | */ |
876 | static int mwifiex_pcie_send_data_complete(struct mwifiex_adapter *adapter) | 941 | static int mwifiex_pcie_send_data_complete(struct mwifiex_adapter *adapter) |
877 | { | 942 | { |
878 | const u32 num_tx_buffs = MWIFIEX_MAX_TXRX_BD; | ||
879 | struct sk_buff *skb; | 943 | struct sk_buff *skb; |
880 | dma_addr_t buf_pa; | 944 | dma_addr_t buf_pa; |
881 | u32 wrdoneidx, rdptr, unmap_count = 0; | 945 | u32 wrdoneidx, rdptr, num_tx_buffs, unmap_count = 0; |
882 | struct mwifiex_pcie_buf_desc *desc; | 946 | struct mwifiex_pcie_buf_desc *desc; |
947 | struct mwifiex_pfu_buf_desc *desc2; | ||
883 | struct pcie_service_card *card = adapter->card; | 948 | struct pcie_service_card *card = adapter->card; |
884 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; | 949 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; |
885 | 950 | ||
@@ -896,12 +961,14 @@ static int mwifiex_pcie_send_data_complete(struct mwifiex_adapter *adapter) | |||
896 | dev_dbg(adapter->dev, "SEND COMP: rdptr_prev=0x%x, rdptr=0x%x\n", | 961 | dev_dbg(adapter->dev, "SEND COMP: rdptr_prev=0x%x, rdptr=0x%x\n", |
897 | card->txbd_rdptr, rdptr); | 962 | card->txbd_rdptr, rdptr); |
898 | 963 | ||
964 | num_tx_buffs = MWIFIEX_MAX_TXRX_BD << reg->tx_start_ptr; | ||
899 | /* free from previous txbd_rdptr to current txbd_rdptr */ | 965 | /* free from previous txbd_rdptr to current txbd_rdptr */ |
900 | while (((card->txbd_rdptr & reg->tx_mask) != | 966 | while (((card->txbd_rdptr & reg->tx_mask) != |
901 | (rdptr & reg->tx_mask)) || | 967 | (rdptr & reg->tx_mask)) || |
902 | ((card->txbd_rdptr & reg->tx_rollover_ind) != | 968 | ((card->txbd_rdptr & reg->tx_rollover_ind) != |
903 | (rdptr & reg->tx_rollover_ind))) { | 969 | (rdptr & reg->tx_rollover_ind))) { |
904 | wrdoneidx = card->txbd_rdptr & reg->tx_mask; | 970 | wrdoneidx = (card->txbd_rdptr & reg->tx_mask) >> |
971 | reg->tx_start_ptr; | ||
905 | 972 | ||
906 | skb = card->tx_buf_list[wrdoneidx]; | 973 | skb = card->tx_buf_list[wrdoneidx]; |
907 | if (skb) { | 974 | if (skb) { |
@@ -922,9 +989,23 @@ static int mwifiex_pcie_send_data_complete(struct mwifiex_adapter *adapter) | |||
922 | } | 989 | } |
923 | 990 | ||
924 | card->tx_buf_list[wrdoneidx] = NULL; | 991 | card->tx_buf_list[wrdoneidx] = NULL; |
925 | desc = card->txbd_ring[wrdoneidx]; | 992 | |
926 | memset(desc, 0, sizeof(*desc)); | 993 | if (reg->pfu_enabled) { |
927 | card->txbd_rdptr++; | 994 | desc2 = (void *)card->txbd_ring[wrdoneidx]; |
995 | memset(desc2, 0, sizeof(*desc2)); | ||
996 | } else { | ||
997 | desc = card->txbd_ring[wrdoneidx]; | ||
998 | memset(desc, 0, sizeof(*desc)); | ||
999 | } | ||
1000 | switch (card->dev->device) { | ||
1001 | case PCIE_DEVICE_ID_MARVELL_88W8766P: | ||
1002 | card->txbd_rdptr++; | ||
1003 | break; | ||
1004 | case PCIE_DEVICE_ID_MARVELL_88W8897: | ||
1005 | card->txbd_rdptr += reg->ring_tx_start_ptr; | ||
1006 | break; | ||
1007 | } | ||
1008 | |||
928 | 1009 | ||
929 | if ((card->txbd_rdptr & reg->tx_mask) == num_tx_buffs) | 1010 | if ((card->txbd_rdptr & reg->tx_mask) == num_tx_buffs) |
930 | card->txbd_rdptr = ((card->txbd_rdptr & | 1011 | card->txbd_rdptr = ((card->txbd_rdptr & |
@@ -960,10 +1041,11 @@ mwifiex_pcie_send_data(struct mwifiex_adapter *adapter, struct sk_buff *skb, | |||
960 | { | 1041 | { |
961 | struct pcie_service_card *card = adapter->card; | 1042 | struct pcie_service_card *card = adapter->card; |
962 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; | 1043 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; |
963 | u32 wrindx; | 1044 | u32 wrindx, num_tx_buffs, rx_val; |
964 | int ret; | 1045 | int ret; |
965 | dma_addr_t buf_pa; | 1046 | dma_addr_t buf_pa; |
966 | struct mwifiex_pcie_buf_desc *desc; | 1047 | struct mwifiex_pcie_buf_desc *desc; |
1048 | struct mwifiex_pfu_buf_desc *desc2; | ||
967 | __le16 *tmp; | 1049 | __le16 *tmp; |
968 | 1050 | ||
969 | if (!(skb->data && skb->len)) { | 1051 | if (!(skb->data && skb->len)) { |
@@ -975,6 +1057,7 @@ mwifiex_pcie_send_data(struct mwifiex_adapter *adapter, struct sk_buff *skb, | |||
975 | if (!mwifiex_pcie_ok_to_access_hw(adapter)) | 1057 | if (!mwifiex_pcie_ok_to_access_hw(adapter)) |
976 | mwifiex_pm_wakeup_card(adapter); | 1058 | mwifiex_pm_wakeup_card(adapter); |
977 | 1059 | ||
1060 | num_tx_buffs = MWIFIEX_MAX_TXRX_BD << reg->tx_start_ptr; | ||
978 | dev_dbg(adapter->dev, "info: SEND DATA: <Rd: %#x, Wr: %#x>\n", | 1061 | dev_dbg(adapter->dev, "info: SEND DATA: <Rd: %#x, Wr: %#x>\n", |
979 | card->txbd_rdptr, card->txbd_wrptr); | 1062 | card->txbd_rdptr, card->txbd_wrptr); |
980 | if (mwifiex_pcie_txbd_not_full(card)) { | 1063 | if (mwifiex_pcie_txbd_not_full(card)) { |
@@ -991,24 +1074,44 @@ mwifiex_pcie_send_data(struct mwifiex_adapter *adapter, struct sk_buff *skb, | |||
991 | PCI_DMA_TODEVICE)) | 1074 | PCI_DMA_TODEVICE)) |
992 | return -1; | 1075 | return -1; |
993 | 1076 | ||
994 | wrindx = card->txbd_wrptr & reg->tx_mask; | 1077 | wrindx = (card->txbd_wrptr & reg->tx_mask) >> reg->tx_start_ptr; |
995 | MWIFIEX_SKB_PACB(skb, &buf_pa); | 1078 | MWIFIEX_SKB_PACB(skb, &buf_pa); |
996 | card->tx_buf_list[wrindx] = skb; | 1079 | card->tx_buf_list[wrindx] = skb; |
997 | desc = card->txbd_ring[wrindx]; | ||
998 | desc->paddr = buf_pa; | ||
999 | desc->len = (u16)skb->len; | ||
1000 | desc->flags = MWIFIEX_BD_FLAG_FIRST_DESC | | ||
1001 | MWIFIEX_BD_FLAG_LAST_DESC; | ||
1002 | 1080 | ||
1003 | if ((++card->txbd_wrptr & reg->tx_mask) == | 1081 | if (reg->pfu_enabled) { |
1004 | MWIFIEX_MAX_TXRX_BD) | 1082 | desc2 = (void *)card->txbd_ring[wrindx]; |
1083 | desc2->paddr = buf_pa; | ||
1084 | desc2->len = (u16)skb->len; | ||
1085 | desc2->frag_len = (u16)skb->len; | ||
1086 | desc2->offset = 0; | ||
1087 | desc2->flags = MWIFIEX_BD_FLAG_FIRST_DESC | | ||
1088 | MWIFIEX_BD_FLAG_LAST_DESC; | ||
1089 | } else { | ||
1090 | desc = card->txbd_ring[wrindx]; | ||
1091 | desc->paddr = buf_pa; | ||
1092 | desc->len = (u16)skb->len; | ||
1093 | desc->flags = MWIFIEX_BD_FLAG_FIRST_DESC | | ||
1094 | MWIFIEX_BD_FLAG_LAST_DESC; | ||
1095 | } | ||
1096 | |||
1097 | switch (card->dev->device) { | ||
1098 | case PCIE_DEVICE_ID_MARVELL_88W8766P: | ||
1099 | card->txbd_wrptr++; | ||
1100 | break; | ||
1101 | case PCIE_DEVICE_ID_MARVELL_88W8897: | ||
1102 | card->txbd_wrptr += reg->ring_tx_start_ptr; | ||
1103 | break; | ||
1104 | } | ||
1105 | |||
1106 | if ((card->txbd_wrptr & reg->tx_mask) == num_tx_buffs) | ||
1005 | card->txbd_wrptr = ((card->txbd_wrptr & | 1107 | card->txbd_wrptr = ((card->txbd_wrptr & |
1006 | reg->tx_rollover_ind) ^ | 1108 | reg->tx_rollover_ind) ^ |
1007 | reg->tx_rollover_ind); | 1109 | reg->tx_rollover_ind); |
1008 | 1110 | ||
1111 | rx_val = card->rxbd_rdptr & reg->rx_wrap_mask; | ||
1009 | /* Write the TX ring write pointer in to reg->tx_wrptr */ | 1112 | /* Write the TX ring write pointer in to reg->tx_wrptr */ |
1010 | if (mwifiex_write_reg(adapter, reg->tx_wrptr, | 1113 | if (mwifiex_write_reg(adapter, reg->tx_wrptr, |
1011 | card->txbd_wrptr)) { | 1114 | card->txbd_wrptr | rx_val)) { |
1012 | dev_err(adapter->dev, | 1115 | dev_err(adapter->dev, |
1013 | "SEND DATA: failed to write reg->tx_wrptr\n"); | 1116 | "SEND DATA: failed to write reg->tx_wrptr\n"); |
1014 | ret = -1; | 1117 | ret = -1; |
@@ -1050,7 +1153,11 @@ done_unmap: | |||
1050 | MWIFIEX_SKB_PACB(skb, &buf_pa); | 1153 | MWIFIEX_SKB_PACB(skb, &buf_pa); |
1051 | pci_unmap_single(card->dev, buf_pa, skb->len, PCI_DMA_TODEVICE); | 1154 | pci_unmap_single(card->dev, buf_pa, skb->len, PCI_DMA_TODEVICE); |
1052 | card->tx_buf_list[wrindx] = NULL; | 1155 | card->tx_buf_list[wrindx] = NULL; |
1053 | memset(desc, 0, sizeof(*desc)); | 1156 | if (reg->pfu_enabled) |
1157 | memset(desc2, 0, sizeof(*desc2)); | ||
1158 | else | ||
1159 | memset(desc, 0, sizeof(*desc)); | ||
1160 | |||
1054 | return ret; | 1161 | return ret; |
1055 | } | 1162 | } |
1056 | 1163 | ||
@@ -1062,11 +1169,12 @@ static int mwifiex_pcie_process_recv_data(struct mwifiex_adapter *adapter) | |||
1062 | { | 1169 | { |
1063 | struct pcie_service_card *card = adapter->card; | 1170 | struct pcie_service_card *card = adapter->card; |
1064 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; | 1171 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; |
1065 | u32 wrptr, rd_index; | 1172 | u32 wrptr, rd_index, tx_val; |
1066 | dma_addr_t buf_pa; | 1173 | dma_addr_t buf_pa; |
1067 | int ret = 0; | 1174 | int ret = 0; |
1068 | struct sk_buff *skb_tmp = NULL; | 1175 | struct sk_buff *skb_tmp = NULL; |
1069 | struct mwifiex_pcie_buf_desc *desc; | 1176 | struct mwifiex_pcie_buf_desc *desc; |
1177 | struct mwifiex_pfu_buf_desc *desc2; | ||
1070 | 1178 | ||
1071 | if (!mwifiex_pcie_ok_to_access_hw(adapter)) | 1179 | if (!mwifiex_pcie_ok_to_access_hw(adapter)) |
1072 | mwifiex_pm_wakeup_card(adapter); | 1180 | mwifiex_pm_wakeup_card(adapter); |
@@ -1126,10 +1234,20 @@ static int mwifiex_pcie_process_recv_data(struct mwifiex_adapter *adapter) | |||
1126 | "RECV DATA: Attach new sk_buff %p at rxbd_rdidx=%d\n", | 1234 | "RECV DATA: Attach new sk_buff %p at rxbd_rdidx=%d\n", |
1127 | skb_tmp, rd_index); | 1235 | skb_tmp, rd_index); |
1128 | card->rx_buf_list[rd_index] = skb_tmp; | 1236 | card->rx_buf_list[rd_index] = skb_tmp; |
1129 | desc = card->rxbd_ring[rd_index]; | 1237 | |
1130 | desc->paddr = buf_pa; | 1238 | if (reg->pfu_enabled) { |
1131 | desc->len = skb_tmp->len; | 1239 | desc2 = (void *)card->rxbd_ring[rd_index]; |
1132 | desc->flags = 0; | 1240 | desc2->paddr = buf_pa; |
1241 | desc2->len = skb_tmp->len; | ||
1242 | desc2->frag_len = skb_tmp->len; | ||
1243 | desc2->offset = 0; | ||
1244 | desc2->flags = reg->ring_flag_sop | reg->ring_flag_eop; | ||
1245 | } else { | ||
1246 | desc = card->rxbd_ring[rd_index]; | ||
1247 | desc->paddr = buf_pa; | ||
1248 | desc->len = skb_tmp->len; | ||
1249 | desc->flags = 0; | ||
1250 | } | ||
1133 | 1251 | ||
1134 | if ((++card->rxbd_rdptr & reg->rx_mask) == | 1252 | if ((++card->rxbd_rdptr & reg->rx_mask) == |
1135 | MWIFIEX_MAX_TXRX_BD) { | 1253 | MWIFIEX_MAX_TXRX_BD) { |
@@ -1140,9 +1258,10 @@ static int mwifiex_pcie_process_recv_data(struct mwifiex_adapter *adapter) | |||
1140 | dev_dbg(adapter->dev, "info: RECV DATA: <Rd: %#x, Wr: %#x>\n", | 1258 | dev_dbg(adapter->dev, "info: RECV DATA: <Rd: %#x, Wr: %#x>\n", |
1141 | card->rxbd_rdptr, wrptr); | 1259 | card->rxbd_rdptr, wrptr); |
1142 | 1260 | ||
1261 | tx_val = card->txbd_wrptr & reg->tx_wrap_mask; | ||
1143 | /* Write the RX ring read pointer in to reg->rx_rdptr */ | 1262 | /* Write the RX ring read pointer in to reg->rx_rdptr */ |
1144 | if (mwifiex_write_reg(adapter, reg->rx_rdptr, | 1263 | if (mwifiex_write_reg(adapter, reg->rx_rdptr, |
1145 | card->rxbd_rdptr)) { | 1264 | card->rxbd_rdptr | tx_val)) { |
1146 | dev_err(adapter->dev, | 1265 | dev_err(adapter->dev, |
1147 | "RECV DATA: failed to write reg->rx_rdptr\n"); | 1266 | "RECV DATA: failed to write reg->rx_rdptr\n"); |
1148 | ret = -1; | 1267 | ret = -1; |
@@ -1242,9 +1361,11 @@ static int mwifiex_pcie_init_fw_port(struct mwifiex_adapter *adapter) | |||
1242 | { | 1361 | { |
1243 | struct pcie_service_card *card = adapter->card; | 1362 | struct pcie_service_card *card = adapter->card; |
1244 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; | 1363 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; |
1364 | int tx_wrap = card->txbd_wrptr & reg->tx_wrap_mask; | ||
1245 | 1365 | ||
1246 | /* Write the RX ring read pointer in to reg->rx_rdptr */ | 1366 | /* Write the RX ring read pointer in to reg->rx_rdptr */ |
1247 | if (mwifiex_write_reg(adapter, reg->rx_rdptr, card->rxbd_rdptr)) { | 1367 | if (mwifiex_write_reg(adapter, reg->rx_rdptr, card->rxbd_rdptr | |
1368 | tx_wrap)) { | ||
1248 | dev_err(adapter->dev, | 1369 | dev_err(adapter->dev, |
1249 | "RECV DATA: failed to write reg->rx_rdptr\n"); | 1370 | "RECV DATA: failed to write reg->rx_rdptr\n"); |
1250 | return -1; | 1371 | return -1; |
@@ -2259,7 +2380,7 @@ static int mwifiex_pcie_init_module(void) | |||
2259 | { | 2380 | { |
2260 | int ret; | 2381 | int ret; |
2261 | 2382 | ||
2262 | pr_debug("Marvell 8766 PCIe Driver\n"); | 2383 | pr_debug("Marvell PCIe Driver\n"); |
2263 | 2384 | ||
2264 | sema_init(&add_remove_card_sem, 1); | 2385 | sema_init(&add_remove_card_sem, 1); |
2265 | 2386 | ||
@@ -2302,4 +2423,5 @@ MODULE_AUTHOR("Marvell International Ltd."); | |||
2302 | MODULE_DESCRIPTION("Marvell WiFi-Ex PCI-Express Driver version " PCIE_VERSION); | 2423 | MODULE_DESCRIPTION("Marvell WiFi-Ex PCI-Express Driver version " PCIE_VERSION); |
2303 | MODULE_VERSION(PCIE_VERSION); | 2424 | MODULE_VERSION(PCIE_VERSION); |
2304 | MODULE_LICENSE("GPL v2"); | 2425 | MODULE_LICENSE("GPL v2"); |
2305 | MODULE_FIRMWARE("mrvl/pcie8766_uapsta.bin"); | 2426 | MODULE_FIRMWARE(PCIE8766_DEFAULT_FW_NAME); |
2427 | MODULE_FIRMWARE(PCIE8897_DEFAULT_FW_NAME); | ||
diff --git a/drivers/net/wireless/mwifiex/pcie.h b/drivers/net/wireless/mwifiex/pcie.h index 7ebdc74f2bbf..608061578b37 100644 --- a/drivers/net/wireless/mwifiex/pcie.h +++ b/drivers/net/wireless/mwifiex/pcie.h | |||
@@ -29,6 +29,11 @@ | |||
29 | #include "main.h" | 29 | #include "main.h" |
30 | 30 | ||
31 | #define PCIE8766_DEFAULT_FW_NAME "mrvl/pcie8766_uapsta.bin" | 31 | #define PCIE8766_DEFAULT_FW_NAME "mrvl/pcie8766_uapsta.bin" |
32 | #define PCIE8897_DEFAULT_FW_NAME "mrvl/pcie8897_uapsta.bin" | ||
33 | |||
34 | #define PCIE_VENDOR_ID_MARVELL (0x11ab) | ||
35 | #define PCIE_DEVICE_ID_MARVELL_88W8766P (0x2b30) | ||
36 | #define PCIE_DEVICE_ID_MARVELL_88W8897 (0x2b38) | ||
32 | 37 | ||
33 | /* Constants for Buffer Descriptor (BD) rings */ | 38 | /* Constants for Buffer Descriptor (BD) rings */ |
34 | #define MWIFIEX_MAX_TXRX_BD 0x20 | 39 | #define MWIFIEX_MAX_TXRX_BD 0x20 |
@@ -57,6 +62,8 @@ | |||
57 | #define PCIE_SCRATCH_10_REG 0xCE8 | 62 | #define PCIE_SCRATCH_10_REG 0xCE8 |
58 | #define PCIE_SCRATCH_11_REG 0xCEC | 63 | #define PCIE_SCRATCH_11_REG 0xCEC |
59 | #define PCIE_SCRATCH_12_REG 0xCF0 | 64 | #define PCIE_SCRATCH_12_REG 0xCF0 |
65 | #define PCIE_RD_DATA_PTR_Q0_Q1 0xC08C | ||
66 | #define PCIE_WR_DATA_PTR_Q0_Q1 0xC05C | ||
60 | 67 | ||
61 | #define CPU_INTR_DNLD_RDY BIT(0) | 68 | #define CPU_INTR_DNLD_RDY BIT(0) |
62 | #define CPU_INTR_DOOR_BELL BIT(1) | 69 | #define CPU_INTR_DOOR_BELL BIT(1) |
@@ -75,6 +82,14 @@ | |||
75 | #define MWIFIEX_BD_FLAG_ROLLOVER_IND BIT(7) | 82 | #define MWIFIEX_BD_FLAG_ROLLOVER_IND BIT(7) |
76 | #define MWIFIEX_BD_FLAG_FIRST_DESC BIT(0) | 83 | #define MWIFIEX_BD_FLAG_FIRST_DESC BIT(0) |
77 | #define MWIFIEX_BD_FLAG_LAST_DESC BIT(1) | 84 | #define MWIFIEX_BD_FLAG_LAST_DESC BIT(1) |
85 | #define MWIFIEX_BD_FLAG_SOP BIT(0) | ||
86 | #define MWIFIEX_BD_FLAG_EOP BIT(1) | ||
87 | #define MWIFIEX_BD_FLAG_XS_SOP BIT(2) | ||
88 | #define MWIFIEX_BD_FLAG_XS_EOP BIT(3) | ||
89 | #define MWIFIEX_BD_FLAG_EVT_ROLLOVER_IND BIT(7) | ||
90 | #define MWIFIEX_BD_FLAG_RX_ROLLOVER_IND BIT(10) | ||
91 | #define MWIFIEX_BD_FLAG_TX_START_PTR BIT(16) | ||
92 | #define MWIFIEX_BD_FLAG_TX_ROLLOVER_IND BIT(26) | ||
78 | 93 | ||
79 | /* Max retry number of command write */ | 94 | /* Max retry number of command write */ |
80 | #define MAX_WRITE_IOMEM_RETRY 2 | 95 | #define MAX_WRITE_IOMEM_RETRY 2 |
@@ -143,6 +158,36 @@ static const struct mwifiex_pcie_card_reg mwifiex_reg_8766 = { | |||
143 | .pfu_enabled = 0, | 158 | .pfu_enabled = 0, |
144 | }; | 159 | }; |
145 | 160 | ||
161 | static const struct mwifiex_pcie_card_reg mwifiex_reg_8897 = { | ||
162 | .cmd_addr_lo = PCIE_SCRATCH_0_REG, | ||
163 | .cmd_addr_hi = PCIE_SCRATCH_1_REG, | ||
164 | .cmd_size = PCIE_SCRATCH_2_REG, | ||
165 | .fw_status = PCIE_SCRATCH_3_REG, | ||
166 | .cmdrsp_addr_lo = PCIE_SCRATCH_4_REG, | ||
167 | .cmdrsp_addr_hi = PCIE_SCRATCH_5_REG, | ||
168 | .tx_rdptr = PCIE_RD_DATA_PTR_Q0_Q1, | ||
169 | .tx_wrptr = PCIE_WR_DATA_PTR_Q0_Q1, | ||
170 | .rx_rdptr = PCIE_WR_DATA_PTR_Q0_Q1, | ||
171 | .rx_wrptr = PCIE_RD_DATA_PTR_Q0_Q1, | ||
172 | .evt_rdptr = PCIE_SCRATCH_10_REG, | ||
173 | .evt_wrptr = PCIE_SCRATCH_11_REG, | ||
174 | .drv_rdy = PCIE_SCRATCH_12_REG, | ||
175 | .tx_start_ptr = 16, | ||
176 | .tx_mask = 0x03FF0000, | ||
177 | .tx_wrap_mask = 0x07FF0000, | ||
178 | .rx_mask = 0x000003FF, | ||
179 | .rx_wrap_mask = 0x000007FF, | ||
180 | .tx_rollover_ind = MWIFIEX_BD_FLAG_TX_ROLLOVER_IND, | ||
181 | .rx_rollover_ind = MWIFIEX_BD_FLAG_RX_ROLLOVER_IND, | ||
182 | .evt_rollover_ind = MWIFIEX_BD_FLAG_EVT_ROLLOVER_IND, | ||
183 | .ring_flag_sop = MWIFIEX_BD_FLAG_SOP, | ||
184 | .ring_flag_eop = MWIFIEX_BD_FLAG_EOP, | ||
185 | .ring_flag_xs_sop = MWIFIEX_BD_FLAG_XS_SOP, | ||
186 | .ring_flag_xs_eop = MWIFIEX_BD_FLAG_XS_EOP, | ||
187 | .ring_tx_start_ptr = MWIFIEX_BD_FLAG_TX_START_PTR, | ||
188 | .pfu_enabled = 1, | ||
189 | }; | ||
190 | |||
146 | struct mwifiex_pcie_device { | 191 | struct mwifiex_pcie_device { |
147 | const char *firmware; | 192 | const char *firmware; |
148 | const struct mwifiex_pcie_card_reg *reg; | 193 | const struct mwifiex_pcie_card_reg *reg; |
@@ -155,6 +200,12 @@ static const struct mwifiex_pcie_device mwifiex_pcie8766 = { | |||
155 | .blksz_fw_dl = MWIFIEX_PCIE_BLOCK_SIZE_FW_DNLD, | 200 | .blksz_fw_dl = MWIFIEX_PCIE_BLOCK_SIZE_FW_DNLD, |
156 | }; | 201 | }; |
157 | 202 | ||
203 | static const struct mwifiex_pcie_device mwifiex_pcie8897 = { | ||
204 | .firmware = PCIE8897_DEFAULT_FW_NAME, | ||
205 | .reg = &mwifiex_reg_8897, | ||
206 | .blksz_fw_dl = MWIFIEX_PCIE_BLOCK_SIZE_FW_DNLD, | ||
207 | }; | ||
208 | |||
158 | struct mwifiex_evt_buf_desc { | 209 | struct mwifiex_evt_buf_desc { |
159 | u64 paddr; | 210 | u64 paddr; |
160 | u16 len; | 211 | u16 len; |
@@ -167,6 +218,15 @@ struct mwifiex_pcie_buf_desc { | |||
167 | u16 flags; | 218 | u16 flags; |
168 | } __packed; | 219 | } __packed; |
169 | 220 | ||
221 | struct mwifiex_pfu_buf_desc { | ||
222 | u16 flags; | ||
223 | u16 offset; | ||
224 | u16 frag_len; | ||
225 | u16 len; | ||
226 | u64 paddr; | ||
227 | u32 reserved; | ||
228 | } __packed; | ||
229 | |||
170 | struct pcie_service_card { | 230 | struct pcie_service_card { |
171 | struct pci_dev *dev; | 231 | struct pci_dev *dev; |
172 | struct mwifiex_adapter *adapter; | 232 | struct mwifiex_adapter *adapter; |
@@ -210,10 +270,22 @@ mwifiex_pcie_txbd_empty(struct pcie_service_card *card, u32 rdptr) | |||
210 | { | 270 | { |
211 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; | 271 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; |
212 | 272 | ||
213 | if (((card->txbd_wrptr & reg->tx_mask) == (rdptr & reg->tx_mask)) && | 273 | switch (card->dev->device) { |
214 | ((card->txbd_wrptr & reg->tx_rollover_ind) != | 274 | case PCIE_DEVICE_ID_MARVELL_88W8766P: |
275 | if (((card->txbd_wrptr & reg->tx_mask) == | ||
276 | (rdptr & reg->tx_mask)) && | ||
277 | ((card->txbd_wrptr & reg->tx_rollover_ind) != | ||
278 | (rdptr & reg->tx_rollover_ind))) | ||
279 | return 1; | ||
280 | break; | ||
281 | case PCIE_DEVICE_ID_MARVELL_88W8897: | ||
282 | if (((card->txbd_wrptr & reg->tx_mask) == | ||
283 | (rdptr & reg->tx_mask)) && | ||
284 | ((card->txbd_wrptr & reg->tx_rollover_ind) == | ||
215 | (rdptr & reg->tx_rollover_ind))) | 285 | (rdptr & reg->tx_rollover_ind))) |
216 | return 1; | 286 | return 1; |
287 | break; | ||
288 | } | ||
217 | 289 | ||
218 | return 0; | 290 | return 0; |
219 | } | 291 | } |
@@ -223,11 +295,22 @@ mwifiex_pcie_txbd_not_full(struct pcie_service_card *card) | |||
223 | { | 295 | { |
224 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; | 296 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; |
225 | 297 | ||
226 | if (((card->txbd_wrptr & reg->tx_mask) != | 298 | switch (card->dev->device) { |
227 | (card->txbd_rdptr & reg->tx_mask)) || | 299 | case PCIE_DEVICE_ID_MARVELL_88W8766P: |
228 | ((card->txbd_wrptr & reg->tx_rollover_ind) != | 300 | if (((card->txbd_wrptr & reg->tx_mask) != |
229 | (card->txbd_rdptr & reg->tx_rollover_ind))) | 301 | (card->txbd_rdptr & reg->tx_mask)) || |
230 | return 1; | 302 | ((card->txbd_wrptr & reg->tx_rollover_ind) != |
303 | (card->txbd_rdptr & reg->tx_rollover_ind))) | ||
304 | return 1; | ||
305 | break; | ||
306 | case PCIE_DEVICE_ID_MARVELL_88W8897: | ||
307 | if (((card->txbd_wrptr & reg->tx_mask) != | ||
308 | (card->txbd_rdptr & reg->tx_mask)) || | ||
309 | ((card->txbd_wrptr & reg->tx_rollover_ind) == | ||
310 | (card->txbd_rdptr & reg->tx_rollover_ind))) | ||
311 | return 1; | ||
312 | break; | ||
313 | } | ||
231 | 314 | ||
232 | return 0; | 315 | return 0; |
233 | } | 316 | } |