Merge tag 'sirf-dts-for-3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/baohua/linux into next/dt

Pull "change pinmux pingroup and add some lost node/prop" from Barry Song:

1. add resets properity for some nodes;
2. change pinctrl groups for audio
3. add PMU node

* tag 'sirf-dts-for-3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/baohua/linux:
  ARM: dts: atlas6: add resets property for SPI nodes
  ARM: dts: atlas6: add resets property for VPP nodes
  ARM: dts: prima2: add resets property for VPP nodes
  ARM: dts: prima2: add resets property for GPS nodes
  ARM: dts: prima2: add node for Performance Monitor Unit
  ARM: dts: atlas6: Add I2S external clock input pingroup
  ARM: dts: atlas6: add a separate pingroup for i2s mclk output
  ARM: dts: prima2: add I2S 2ch, 6ch, nodin, mclk groups

Signed-off-by: Arnd Bergmann <arnd@arndb.de>

2 files changed, 48 insertions, 0 deletions

diff --git a/arch/arm/boot/dts/atlas6.dtsi b/arch/arm/boot/dts/atlas6.dtsi
index bb22842a0826..29598667420b 100644
--- a/arch/arm/boot/dts/atlas6.dtsi
+++ b/arch/arm/boot/dts/atlas6.dtsi
@@ -131,6 +131,7 @@
                                 reg = <0x90020000 0x10000>;
                                 interrupts = <31>;
                                 clocks = <&clks 35>;
+                                resets = <&rstc 6>;
                         };
                 };
 
@@ -312,6 +313,7 @@
                                 #address-cells = <1>;
                                 #size-cells = <0>;
                                 clocks = <&clks 19>;
+                                resets = <&rstc 26>;
                                 status = "disabled";
                         };
 
@@ -327,6 +329,7 @@
                                 #address-cells = <1>;
                                 #size-cells = <0>;
                                 clocks = <&clks 20>;
+                                resets = <&rstc 27>;
                                 status = "disabled";
                         };
 
@@ -522,6 +525,18 @@
                                                 sirf,function = "sdmmc5";
                                         };
                                 };
+                                i2s_mclk_pins_a: i2s_mclk@0 {
+                                        i2s_mclk {
+                                                sirf,pins = "i2smclkgrp";
+                                                sirf,function = "i2s_mclk";
+                                        };
+                                };
+                                i2s_ext_clk_input_pins_a: i2s_ext_clk_input@0 {
+                                        i2s_ext_clk_input {
+                                                sirf,pins = "i2s_ext_clk_inputgrp";
+                                                sirf,function = "i2s_ext_clk_input";
+                                        };
+                                };
                                 i2s_pins_a: i2s@0 {
                                         i2s {
                                                 sirf,pins = "i2sgrp";
diff --git a/arch/arm/boot/dts/prima2.dtsi b/arch/arm/boot/dts/prima2.dtsi
index 963b7e54ab15..1ca1a9aa953f 100644
--- a/arch/arm/boot/dts/prima2.dtsi
+++ b/arch/arm/boot/dts/prima2.dtsi
@@ -41,6 +41,11 @@
                 };
         };
 
+        arm-pmu {
+                compatible = "arm,cortex-a9-pmu";
+                interrupts = <29>;
+        };
+
         axi {
                 compatible = "simple-bus";
                 #address-cells = <1>;
@@ -132,6 +137,7 @@
                                 reg = <0x90020000 0x10000>;
                                 interrupts = <31>;
                                 clocks = <&clks 35>;
+                                resets = <&rstc 6>;
                         };
                 };
 
@@ -173,6 +179,7 @@
                                 compatible = "sirf,prima2-dspif";
                                 reg = <0xa8000000 0x10000>;
                                 interrupts = <9>;
+                                resets = <&rstc 1>;
                         };
 
                         gps@a8010000 {
@@ -180,6 +187,7 @@
                                 reg = <0xa8010000 0x10000>;
                                 interrupts = <7>;
                                 clocks = <&clks 9>;
+                                resets = <&rstc 2>;
                         };
 
                         dsp@a9000000 {
@@ -187,6 +195,7 @@
                                 reg = <0xa9000000 0x1000000>;
                                 interrupts = <8>;
                                 clocks = <&clks 8>;
+                                resets = <&rstc 0>;
                         };
                 };
 
@@ -524,12 +533,36 @@
                                                 sirf,function = "sdmmc5";
                                         };
                                 };
+                                i2s_mclk_pins_a: i2s_mclk@0 {
+                                        i2s_mclk {
+                                                sirf,pins = "i2smclkgrp";
+                                                sirf,function = "i2s_mclk";
+                                        };
+                                };
+                                i2s_ext_clk_input_pins_a: i2s_ext_clk_input@0 {
+                                        i2s_ext_clk_input {
+                                                sirf,pins = "i2s_ext_clk_inputgrp";
+                                                sirf,function = "i2s_ext_clk_input";
+                                        };
+                                };
                                 i2s_pins_a: i2s@0 {
                                         i2s {
                                                 sirf,pins = "i2sgrp";
                                                 sirf,function = "i2s";
                                         };
                                 };
+                                i2s_no_din_pins_a: i2s_no_din@0 {
+                                        i2s_no_din {
+                                                sirf,pins = "i2s_no_dingrp";
+                                                sirf,function = "i2s_no_din";
+                                        };
+                                };
+                                i2s_6chn_pins_a: i2s_6chn@0 {
+                                        i2s_6chn {
+                                                sirf,pins = "i2s_6chngrp";
+                                                sirf,function = "i2s_6chn";
+                                        };
+                                };
                                 ac97_pins_a: ac97@0 {
                                         ac97 {
                                                 sirf,pins = "ac97grp";