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authorMark Brown <broonie@sirena.org.uk>2013-04-27 21:13:34 -0400
committerMark Brown <broonie@sirena.org.uk>2013-04-27 21:13:34 -0400
commitc98cac899b6cd8ce5908c1d87708d78b41f6472d (patch)
treea31eaf8bef22c731c03e01f92fa709a6b3b5050a
parent9e63d23056c0157ba2ab3a1339a8e69d759b2f34 (diff)
parent5d9de8b1216c60c15b02982c9f6b4875f757db02 (diff)
Merge remote-tracking branch 'regulator/topic/ab8500' into v3.9-rc8
Diffstat
-rw-r--r--arch/arm/mach-ux500/board-mop500-regulators.c774
-rw-r--r--arch/arm/mach-ux500/board-mop500-regulators.h7
-rw-r--r--arch/arm/mach-ux500/board-mop500.c5
-rw-r--r--drivers/regulator/Makefile2
-rw-r--r--drivers/regulator/ab8500-ext.c407
-rw-r--r--drivers/regulator/ab8500.c2662
-rw-r--r--drivers/regulator/dbx500-prcmu.h2
-rw-r--r--include/linux/mfd/abx500/ab8500.h11
-rw-r--r--include/linux/regulator/ab8500.h217
9 files changed, 3855 insertions, 232 deletions
diff --git a/arch/arm/mach-ux500/board-mop500-regulators.c b/arch/arm/mach-ux500/board-mop500-regulators.c
index 2a17bc506cff..ff3c9f016591 100644
--- a/arch/arm/mach-ux500/board-mop500-regulators.c
+++ b/arch/arm/mach-ux500/board-mop500-regulators.c
@@ -5,6 +5,7 @@
5 * 5 *
6 * Authors: Sundar Iyer <sundar.iyer@stericsson.com> 6 * Authors: Sundar Iyer <sundar.iyer@stericsson.com>
7 * Bengt Jonsson <bengt.g.jonsson@stericsson.com> 7 * Bengt Jonsson <bengt.g.jonsson@stericsson.com>
8 * Daniel Willerud <daniel.willerud@stericsson.com>
8 * 9 *
9 * MOP500 board specific initialization for regulators 10 * MOP500 board specific initialization for regulators
10 */ 11 */
@@ -12,6 +13,7 @@
12#include <linux/regulator/machine.h> 13#include <linux/regulator/machine.h>
13#include <linux/regulator/ab8500.h> 14#include <linux/regulator/ab8500.h>
14#include "board-mop500-regulators.h" 15#include "board-mop500-regulators.h"
16#include "id.h"
15 17
16static struct regulator_consumer_supply gpio_en_3v3_consumers[] = { 18static struct regulator_consumer_supply gpio_en_3v3_consumers[] = {
17 REGULATOR_SUPPLY("vdd33a", "smsc911x.0"), 19 REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
@@ -53,21 +55,37 @@ struct regulator_init_data tps61052_regulator = {
53}; 55};
54 56
55static struct regulator_consumer_supply ab8500_vaux1_consumers[] = { 57static struct regulator_consumer_supply ab8500_vaux1_consumers[] = {
56 /* External displays, connector on board 2v5 power supply */ 58 /* Main display, u8500 R3 uib */
57 REGULATOR_SUPPLY("vaux12v5", "mcde.0"), 59 REGULATOR_SUPPLY("vddi", "mcde_disp_sony_acx424akp.0"),
60 /* Main display, u8500 uib and ST uib */
61 REGULATOR_SUPPLY("vdd1", "samsung_s6d16d0.0"),
62 /* Secondary display, ST uib */
63 REGULATOR_SUPPLY("vdd1", "samsung_s6d16d0.1"),
58 /* SFH7741 proximity sensor */ 64 /* SFH7741 proximity sensor */
59 REGULATOR_SUPPLY("vcc", "gpio-keys.0"), 65 REGULATOR_SUPPLY("vcc", "gpio-keys.0"),
60 /* BH1780GLS ambient light sensor */ 66 /* BH1780GLS ambient light sensor */
61 REGULATOR_SUPPLY("vcc", "2-0029"), 67 REGULATOR_SUPPLY("vcc", "2-0029"),
62 /* lsm303dlh accelerometer */ 68 /* lsm303dlh accelerometer */
63 REGULATOR_SUPPLY("vdd", "3-0018"), 69 REGULATOR_SUPPLY("vdd", "2-0018"),
70 /* lsm303dlhc accelerometer */
71 REGULATOR_SUPPLY("vdd", "2-0019"),
64 /* lsm303dlh magnetometer */ 72 /* lsm303dlh magnetometer */
65 REGULATOR_SUPPLY("vdd", "3-001e"), 73 REGULATOR_SUPPLY("vdd", "2-001e"),
66 /* Rohm BU21013 Touchscreen devices */ 74 /* Rohm BU21013 Touchscreen devices */
67 REGULATOR_SUPPLY("avdd", "3-005c"), 75 REGULATOR_SUPPLY("avdd", "3-005c"),
68 REGULATOR_SUPPLY("avdd", "3-005d"), 76 REGULATOR_SUPPLY("avdd", "3-005d"),
69 /* Synaptics RMI4 Touchscreen device */ 77 /* Synaptics RMI4 Touchscreen device */
70 REGULATOR_SUPPLY("vdd", "3-004b"), 78 REGULATOR_SUPPLY("vdd", "3-004b"),
79 /* L3G4200D Gyroscope device */
80 REGULATOR_SUPPLY("vdd", "2-0068"),
81 /* Ambient light sensor device */
82 REGULATOR_SUPPLY("vdd", "3-0029"),
83 /* Pressure sensor device */
84 REGULATOR_SUPPLY("vdd", "2-005c"),
85 /* Cypress TrueTouch Touchscreen device */
86 REGULATOR_SUPPLY("vcpin", "spi8.0"),
87 /* Camera device */
88 REGULATOR_SUPPLY("vaux12v5", "mmio_camera"),
71}; 89};
72 90
73static struct regulator_consumer_supply ab8500_vaux2_consumers[] = { 91static struct regulator_consumer_supply ab8500_vaux2_consumers[] = {
@@ -75,18 +93,50 @@ static struct regulator_consumer_supply ab8500_vaux2_consumers[] = {
75 REGULATOR_SUPPLY("vmmc", "sdi4"), 93 REGULATOR_SUPPLY("vmmc", "sdi4"),
76 /* AB8500 audio codec */ 94 /* AB8500 audio codec */
77 REGULATOR_SUPPLY("vcc-N2158", "ab8500-codec.0"), 95 REGULATOR_SUPPLY("vcc-N2158", "ab8500-codec.0"),
96 /* AB8500 accessory detect 1 */
97 REGULATOR_SUPPLY("vcc-N2158", "ab8500-acc-det.0"),
98 /* AB8500 Tv-out device */
99 REGULATOR_SUPPLY("vcc-N2158", "mcde_tv_ab8500.4"),
100 /* AV8100 HDMI device */
101 REGULATOR_SUPPLY("vcc-N2158", "av8100_hdmi.3"),
78}; 102};
79 103
80static struct regulator_consumer_supply ab8500_vaux3_consumers[] = { 104static struct regulator_consumer_supply ab8500_vaux3_consumers[] = {
105 REGULATOR_SUPPLY("v-SD-STM", "stm"),
81 /* External MMC slot power */ 106 /* External MMC slot power */
82 REGULATOR_SUPPLY("vmmc", "sdi0"), 107 REGULATOR_SUPPLY("vmmc", "sdi0"),
83}; 108};
84 109
110static struct regulator_consumer_supply ab8505_vaux4_consumers[] = {
111};
112
113static struct regulator_consumer_supply ab8505_vaux5_consumers[] = {
114};
115
116static struct regulator_consumer_supply ab8505_vaux6_consumers[] = {
117};
118
119static struct regulator_consumer_supply ab8505_vaux8_consumers[] = {
120 /* AB8500 audio codec device */
121 REGULATOR_SUPPLY("v-aux8", NULL),
122};
123
124static struct regulator_consumer_supply ab8505_vadc_consumers[] = {
125 /* Internal general-purpose ADC */
126 REGULATOR_SUPPLY("vddadc", "ab8500-gpadc.0"),
127 /* ADC for charger */
128 REGULATOR_SUPPLY("vddadc", "ab8500-charger.0"),
129};
130
85static struct regulator_consumer_supply ab8500_vtvout_consumers[] = { 131static struct regulator_consumer_supply ab8500_vtvout_consumers[] = {
86 /* TV-out DENC supply */ 132 /* TV-out DENC supply */
87 REGULATOR_SUPPLY("vtvout", "ab8500-denc.0"), 133 REGULATOR_SUPPLY("vtvout", "ab8500-denc.0"),
88 /* Internal general-purpose ADC */ 134 /* Internal general-purpose ADC */
89 REGULATOR_SUPPLY("vddadc", "ab8500-gpadc.0"), 135 REGULATOR_SUPPLY("vddadc", "ab8500-gpadc.0"),
136 /* ADC for charger */
137 REGULATOR_SUPPLY("vddadc", "ab8500-charger.0"),
138 /* AB8500 Tv-out device */
139 REGULATOR_SUPPLY("vtvout", "mcde_tv_ab8500.4"),
90}; 140};
91 141
92static struct regulator_consumer_supply ab8500_vaud_consumers[] = { 142static struct regulator_consumer_supply ab8500_vaud_consumers[] = {
@@ -114,77 +164,90 @@ static struct regulator_consumer_supply ab8500_vintcore_consumers[] = {
114 REGULATOR_SUPPLY("v-intcore", NULL), 164 REGULATOR_SUPPLY("v-intcore", NULL),
115 /* USB Transceiver */ 165 /* USB Transceiver */
116 REGULATOR_SUPPLY("vddulpivio18", "ab8500-usb.0"), 166 REGULATOR_SUPPLY("vddulpivio18", "ab8500-usb.0"),
167 /* Handled by abx500 clk driver */
168 REGULATOR_SUPPLY("v-intcore", "abx500-clk.0"),
169};
170
171static struct regulator_consumer_supply ab8505_usb_consumers[] = {
172 /* HS USB OTG physical interface */
173 REGULATOR_SUPPLY("v-ape", NULL),
117}; 174};
118 175
119static struct regulator_consumer_supply ab8500_vana_consumers[] = { 176static struct regulator_consumer_supply ab8500_vana_consumers[] = {
120 /* External displays, connector on board, 1v8 power supply */ 177 /* DB8500 DSI */
121 REGULATOR_SUPPLY("vsmps2", "mcde.0"), 178 REGULATOR_SUPPLY("vdddsi1v2", "mcde"),
179 REGULATOR_SUPPLY("vdddsi1v2", "b2r2_core"),
180 REGULATOR_SUPPLY("vdddsi1v2", "b2r2_1_core"),
181 REGULATOR_SUPPLY("vdddsi1v2", "dsilink.0"),
182 REGULATOR_SUPPLY("vdddsi1v2", "dsilink.1"),
183 REGULATOR_SUPPLY("vdddsi1v2", "dsilink.2"),
184 /* DB8500 CSI */
185 REGULATOR_SUPPLY("vddcsi1v2", "mmio_camera"),
122}; 186};
123 187
124/* ab8500 regulator register initialization */ 188/* ab8500 regulator register initialization */
125struct ab8500_regulator_reg_init 189static struct ab8500_regulator_reg_init ab8500_reg_init[] = {
126ab8500_regulator_reg_init[AB8500_NUM_REGULATOR_REGISTERS] = {
127 /* 190 /*
128 * VanaRequestCtrl = HP/LP depending on VxRequest 191 * VanaRequestCtrl = HP/LP depending on VxRequest
129 * VextSupply1RequestCtrl = HP/LP depending on VxRequest 192 * VextSupply1RequestCtrl = HP/LP depending on VxRequest
130 */ 193 */
131 INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL2, 0x00), 194 INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL2, 0xf0, 0x00),
132 /* 195 /*
133 * VextSupply2RequestCtrl = HP/LP depending on VxRequest 196 * VextSupply2RequestCtrl = HP/LP depending on VxRequest
134 * VextSupply3RequestCtrl = HP/LP depending on VxRequest 197 * VextSupply3RequestCtrl = HP/LP depending on VxRequest
135 * Vaux1RequestCtrl = HP/LP depending on VxRequest 198 * Vaux1RequestCtrl = HP/LP depending on VxRequest
136 * Vaux2RequestCtrl = HP/LP depending on VxRequest 199 * Vaux2RequestCtrl = HP/LP depending on VxRequest
137 */ 200 */
138 INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL3, 0x00), 201 INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL3, 0xff, 0x00),
139 /* 202 /*
140 * Vaux3RequestCtrl = HP/LP depending on VxRequest 203 * Vaux3RequestCtrl = HP/LP depending on VxRequest
141 * SwHPReq = Control through SWValid disabled 204 * SwHPReq = Control through SWValid disabled
142 */ 205 */
143 INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL4, 0x00), 206 INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL4, 0x07, 0x00),
144 /* 207 /*
145 * VanaSysClkReq1HPValid = disabled 208 * VanaSysClkReq1HPValid = disabled
146 * Vaux1SysClkReq1HPValid = disabled 209 * Vaux1SysClkReq1HPValid = disabled
147 * Vaux2SysClkReq1HPValid = disabled 210 * Vaux2SysClkReq1HPValid = disabled
148 * Vaux3SysClkReq1HPValid = disabled 211 * Vaux3SysClkReq1HPValid = disabled
149 */ 212 */
150 INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQ1HPVALID1, 0x00), 213 INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQ1HPVALID1, 0xe8, 0x00),
151 /* 214 /*
152 * VextSupply1SysClkReq1HPValid = disabled 215 * VextSupply1SysClkReq1HPValid = disabled
153 * VextSupply2SysClkReq1HPValid = disabled 216 * VextSupply2SysClkReq1HPValid = disabled
154 * VextSupply3SysClkReq1HPValid = SysClkReq1 controlled 217 * VextSupply3SysClkReq1HPValid = SysClkReq1 controlled
155 */ 218 */
156 INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQ1HPVALID2, 0x40), 219 INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQ1HPVALID2, 0x70, 0x40),
157 /* 220 /*
158 * VanaHwHPReq1Valid = disabled 221 * VanaHwHPReq1Valid = disabled
159 * Vaux1HwHPreq1Valid = disabled 222 * Vaux1HwHPreq1Valid = disabled
160 * Vaux2HwHPReq1Valid = disabled 223 * Vaux2HwHPReq1Valid = disabled
161 * Vaux3HwHPReqValid = disabled 224 * Vaux3HwHPReqValid = disabled
162 */ 225 */
163 INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ1VALID1, 0x00), 226 INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ1VALID1, 0xe8, 0x00),
164 /* 227 /*
165 * VextSupply1HwHPReq1Valid = disabled 228 * VextSupply1HwHPReq1Valid = disabled
166 * VextSupply2HwHPReq1Valid = disabled 229 * VextSupply2HwHPReq1Valid = disabled
167 * VextSupply3HwHPReq1Valid = disabled 230 * VextSupply3HwHPReq1Valid = disabled
168 */ 231 */
169 INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ1VALID2, 0x00), 232 INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ1VALID2, 0x07, 0x00),
170 /* 233 /*
171 * VanaHwHPReq2Valid = disabled 234 * VanaHwHPReq2Valid = disabled
172 * Vaux1HwHPReq2Valid = disabled 235 * Vaux1HwHPReq2Valid = disabled
173 * Vaux2HwHPReq2Valid = disabled 236 * Vaux2HwHPReq2Valid = disabled
174 * Vaux3HwHPReq2Valid = disabled 237 * Vaux3HwHPReq2Valid = disabled
175 */ 238 */
176 INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ2VALID1, 0x00), 239 INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ2VALID1, 0xe8, 0x00),
177 /* 240 /*
178 * VextSupply1HwHPReq2Valid = disabled 241 * VextSupply1HwHPReq2Valid = disabled
179 * VextSupply2HwHPReq2Valid = disabled 242 * VextSupply2HwHPReq2Valid = disabled
180 * VextSupply3HwHPReq2Valid = HWReq2 controlled 243 * VextSupply3HwHPReq2Valid = HWReq2 controlled
181 */ 244 */
182 INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ2VALID2, 0x04), 245 INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ2VALID2, 0x07, 0x04),
183 /* 246 /*
184 * VanaSwHPReqValid = disabled 247 * VanaSwHPReqValid = disabled
185 * Vaux1SwHPReqValid = disabled 248 * Vaux1SwHPReqValid = disabled
186 */ 249 */
187 INIT_REGULATOR_REGISTER(AB8500_REGUSWHPREQVALID1, 0x00), 250 INIT_REGULATOR_REGISTER(AB8500_REGUSWHPREQVALID1, 0xa0, 0x00),
188 /* 251 /*
189 * Vaux2SwHPReqValid = disabled 252 * Vaux2SwHPReqValid = disabled
190 * Vaux3SwHPReqValid = disabled 253 * Vaux3SwHPReqValid = disabled
@@ -192,7 +255,7 @@ ab8500_regulator_reg_init[AB8500_NUM_REGULATOR_REGISTERS] = {
192 * VextSupply2SwHPReqValid = disabled 255 * VextSupply2SwHPReqValid = disabled
193 * VextSupply3SwHPReqValid = disabled 256 * VextSupply3SwHPReqValid = disabled
194 */ 257 */
195 INIT_REGULATOR_REGISTER(AB8500_REGUSWHPREQVALID2, 0x00), 258 INIT_REGULATOR_REGISTER(AB8500_REGUSWHPREQVALID2, 0x1f, 0x00),
196 /* 259 /*
197 * SysClkReq2Valid1 = SysClkReq2 controlled 260 * SysClkReq2Valid1 = SysClkReq2 controlled
198 * SysClkReq3Valid1 = disabled 261 * SysClkReq3Valid1 = disabled
@@ -202,7 +265,7 @@ ab8500_regulator_reg_init[AB8500_NUM_REGULATOR_REGISTERS] = {
202 * SysClkReq7Valid1 = disabled 265 * SysClkReq7Valid1 = disabled
203 * SysClkReq8Valid1 = disabled 266 * SysClkReq8Valid1 = disabled
204 */ 267 */
205 INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQVALID1, 0x2a), 268 INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQVALID1, 0xfe, 0x2a),
206 /* 269 /*
207 * SysClkReq2Valid2 = disabled 270 * SysClkReq2Valid2 = disabled
208 * SysClkReq3Valid2 = disabled 271 * SysClkReq3Valid2 = disabled
@@ -212,7 +275,7 @@ ab8500_regulator_reg_init[AB8500_NUM_REGULATOR_REGISTERS] = {
212 * SysClkReq7Valid2 = disabled 275 * SysClkReq7Valid2 = disabled
213 * SysClkReq8Valid2 = disabled 276 * SysClkReq8Valid2 = disabled
214 */ 277 */
215 INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQVALID2, 0x20), 278 INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQVALID2, 0xfe, 0x20),
216 /* 279 /*
217 * VTVoutEna = disabled 280 * VTVoutEna = disabled
218 * Vintcore12Ena = disabled 281 * Vintcore12Ena = disabled
@@ -220,66 +283,62 @@ ab8500_regulator_reg_init[AB8500_NUM_REGULATOR_REGISTERS] = {
220 * Vintcore12LP = inactive (HP) 283 * Vintcore12LP = inactive (HP)
221 * VTVoutLP = inactive (HP) 284 * VTVoutLP = inactive (HP)
222 */ 285 */
223 INIT_REGULATOR_REGISTER(AB8500_REGUMISC1, 0x10), 286 INIT_REGULATOR_REGISTER(AB8500_REGUMISC1, 0xfe, 0x10),
224 /* 287 /*
225 * VaudioEna = disabled 288 * VaudioEna = disabled
226 * VdmicEna = disabled 289 * VdmicEna = disabled
227 * Vamic1Ena = disabled 290 * Vamic1Ena = disabled
228 * Vamic2Ena = disabled 291 * Vamic2Ena = disabled
229 */ 292 */
230 INIT_REGULATOR_REGISTER(AB8500_VAUDIOSUPPLY, 0x00), 293 INIT_REGULATOR_REGISTER(AB8500_VAUDIOSUPPLY, 0x1e, 0x00),
231 /* 294 /*
232 * Vamic1_dzout = high-Z when Vamic1 is disabled 295 * Vamic1_dzout = high-Z when Vamic1 is disabled
233 * Vamic2_dzout = high-Z when Vamic2 is disabled 296 * Vamic2_dzout = high-Z when Vamic2 is disabled
234 */ 297 */
235 INIT_REGULATOR_REGISTER(AB8500_REGUCTRL1VAMIC, 0x00), 298 INIT_REGULATOR_REGISTER(AB8500_REGUCTRL1VAMIC, 0x03, 0x00),
236 /* 299 /*
237 * VPll = Hw controlled 300 * VPll = Hw controlled (NOTE! PRCMU bits)
238 * VanaRegu = force off 301 * VanaRegu = force off
239 */ 302 */
240 INIT_REGULATOR_REGISTER(AB8500_VPLLVANAREGU, 0x02), 303 INIT_REGULATOR_REGISTER(AB8500_VPLLVANAREGU, 0x0f, 0x02),
241 /* 304 /*
242 * VrefDDREna = disabled 305 * VrefDDREna = disabled
243 * VrefDDRSleepMode = inactive (no pulldown) 306 * VrefDDRSleepMode = inactive (no pulldown)
244 */ 307 */
245 INIT_REGULATOR_REGISTER(AB8500_VREFDDR, 0x00), 308 INIT_REGULATOR_REGISTER(AB8500_VREFDDR, 0x03, 0x00),
246 /* 309 /*
247 * VextSupply1Regu = HW control 310 * VextSupply1Regu = force LP
248 * VextSupply2Regu = HW control 311 * VextSupply2Regu = force OFF
249 * VextSupply3Regu = HW control 312 * VextSupply3Regu = force HP (-> STBB2=LP and TPS=LP)
250 * ExtSupply2Bypass = ExtSupply12LPn ball is 0 when Ena is 0 313 * ExtSupply2Bypass = ExtSupply12LPn ball is 0 when Ena is 0
251 * ExtSupply3Bypass = ExtSupply3LPn ball is 0 when Ena is 0 314 * ExtSupply3Bypass = ExtSupply3LPn ball is 0 when Ena is 0
252 */ 315 */
253 INIT_REGULATOR_REGISTER(AB8500_EXTSUPPLYREGU, 0x2a), 316 INIT_REGULATOR_REGISTER(AB8500_EXTSUPPLYREGU, 0xff, 0x13),
254 /* 317 /*
255 * Vaux1Regu = force HP 318 * Vaux1Regu = force HP
256 * Vaux2Regu = force off 319 * Vaux2Regu = force off
257 */ 320 */
258 INIT_REGULATOR_REGISTER(AB8500_VAUX12REGU, 0x01), 321 INIT_REGULATOR_REGISTER(AB8500_VAUX12REGU, 0x0f, 0x01),
259 /* 322 /*
260 * Vaux3regu = force off 323 * Vaux3Regu = force off
261 */ 324 */
262 INIT_REGULATOR_REGISTER(AB8500_VRF1VAUX3REGU, 0x00), 325 INIT_REGULATOR_REGISTER(AB8500_VRF1VAUX3REGU, 0x03, 0x00),
263 /* 326 /*
264 * Vsmps1 = 1.15V 327 * Vaux1Sel = 2.8 V
265 */ 328 */
266 INIT_REGULATOR_REGISTER(AB8500_VSMPS1SEL1, 0x24), 329 INIT_REGULATOR_REGISTER(AB8500_VAUX1SEL, 0x0f, 0x0C),
267 /*
268 * Vaux1Sel = 2.5 V
269 */
270 INIT_REGULATOR_REGISTER(AB8500_VAUX1SEL, 0x08),
271 /* 330 /*
272 * Vaux2Sel = 2.9 V 331 * Vaux2Sel = 2.9 V
273 */ 332 */
274 INIT_REGULATOR_REGISTER(AB8500_VAUX2SEL, 0x0d), 333 INIT_REGULATOR_REGISTER(AB8500_VAUX2SEL, 0x0f, 0x0d),
275 /* 334 /*
276 * Vaux3Sel = 2.91 V 335 * Vaux3Sel = 2.91 V
277 */ 336 */
278 INIT_REGULATOR_REGISTER(AB8500_VRF1VAUX3SEL, 0x07), 337 INIT_REGULATOR_REGISTER(AB8500_VRF1VAUX3SEL, 0x07, 0x07),
279 /* 338 /*
280 * VextSupply12LP = disabled (no LP) 339 * VextSupply12LP = disabled (no LP)
281 */ 340 */
282 INIT_REGULATOR_REGISTER(AB8500_REGUCTRL2SPARE, 0x00), 341 INIT_REGULATOR_REGISTER(AB8500_REGUCTRL2SPARE, 0x01, 0x00),
283 /* 342 /*
284 * Vaux1Disch = short discharge time 343 * Vaux1Disch = short discharge time
285 * Vaux2Disch = short discharge time 344 * Vaux2Disch = short discharge time
@@ -288,33 +347,26 @@ ab8500_regulator_reg_init[AB8500_NUM_REGULATOR_REGISTERS] = {
288 * VTVoutDisch = short discharge time 347 * VTVoutDisch = short discharge time
289 * VaudioDisch = short discharge time 348 * VaudioDisch = short discharge time
290 */ 349 */
291 INIT_REGULATOR_REGISTER(AB8500_REGUCTRLDISCH, 0x00), 350 INIT_REGULATOR_REGISTER(AB8500_REGUCTRLDISCH, 0xfc, 0x00),
292 /* 351 /*
293 * VanaDisch = short discharge time 352 * VanaDisch = short discharge time
294 * VdmicPullDownEna = pulldown disabled when Vdmic is disabled 353 * VdmicPullDownEna = pulldown disabled when Vdmic is disabled
295 * VdmicDisch = short discharge time 354 * VdmicDisch = short discharge time
296 */ 355 */
297 INIT_REGULATOR_REGISTER(AB8500_REGUCTRLDISCH2, 0x00), 356 INIT_REGULATOR_REGISTER(AB8500_REGUCTRLDISCH2, 0x16, 0x00),
298}; 357};
299 358
300/* AB8500 regulators */ 359/* AB8500 regulators */
301struct regulator_init_data ab8500_regulators[AB8500_NUM_REGULATORS] = { 360static struct regulator_init_data ab8500_regulators[AB8500_NUM_REGULATORS] = {
302 /* supplies to the display/camera */ 361 /* supplies to the display/camera */
303 [AB8500_LDO_AUX1] = { 362 [AB8500_LDO_AUX1] = {
304 .constraints = { 363 .constraints = {
305 .name = "V-DISPLAY", 364 .name = "V-DISPLAY",
306 .min_uV = 2500000, 365 .min_uV = 2800000,
307 .max_uV = 2900000, 366 .max_uV = 3300000,
308 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | 367 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
309 REGULATOR_CHANGE_STATUS, 368 REGULATOR_CHANGE_STATUS,
310 .boot_on = 1, /* display is on at boot */ 369 .boot_on = 1, /* display is on at boot */
311 /*
312 * This voltage cannot be disabled right now because
313 * it is somehow affecting the external MMC
314 * functionality, though that typically will use
315 * AUX3.
316 */
317 .always_on = 1,
318 }, 370 },
319 .num_consumer_supplies = ARRAY_SIZE(ab8500_vaux1_consumers), 371 .num_consumer_supplies = ARRAY_SIZE(ab8500_vaux1_consumers),
320 .consumer_supplies = ab8500_vaux1_consumers, 372 .consumer_supplies = ab8500_vaux1_consumers,
@@ -326,7 +378,10 @@ struct regulator_init_data ab8500_regulators[AB8500_NUM_REGULATORS] = {
326 .min_uV = 1100000, 378 .min_uV = 1100000,
327 .max_uV = 3300000, 379 .max_uV = 3300000,
328 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | 380 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
329 REGULATOR_CHANGE_STATUS, 381 REGULATOR_CHANGE_STATUS |
382 REGULATOR_CHANGE_MODE,
383 .valid_modes_mask = REGULATOR_MODE_NORMAL |
384 REGULATOR_MODE_IDLE,
330 }, 385 },
331 .num_consumer_supplies = ARRAY_SIZE(ab8500_vaux2_consumers), 386 .num_consumer_supplies = ARRAY_SIZE(ab8500_vaux2_consumers),
332 .consumer_supplies = ab8500_vaux2_consumers, 387 .consumer_supplies = ab8500_vaux2_consumers,
@@ -338,7 +393,10 @@ struct regulator_init_data ab8500_regulators[AB8500_NUM_REGULATORS] = {
338 .min_uV = 1100000, 393 .min_uV = 1100000,
339 .max_uV = 3300000, 394 .max_uV = 3300000,
340 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | 395 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
341 REGULATOR_CHANGE_STATUS, 396 REGULATOR_CHANGE_STATUS |
397 REGULATOR_CHANGE_MODE,
398 .valid_modes_mask = REGULATOR_MODE_NORMAL |
399 REGULATOR_MODE_IDLE,
342 }, 400 },
343 .num_consumer_supplies = ARRAY_SIZE(ab8500_vaux3_consumers), 401 .num_consumer_supplies = ARRAY_SIZE(ab8500_vaux3_consumers),
344 .consumer_supplies = ab8500_vaux3_consumers, 402 .consumer_supplies = ab8500_vaux3_consumers,
@@ -392,18 +450,614 @@ struct regulator_init_data ab8500_regulators[AB8500_NUM_REGULATORS] = {
392 [AB8500_LDO_INTCORE] = { 450 [AB8500_LDO_INTCORE] = {
393 .constraints = { 451 .constraints = {
394 .name = "V-INTCORE", 452 .name = "V-INTCORE",
395 .valid_ops_mask = REGULATOR_CHANGE_STATUS, 453 .min_uV = 1250000,
454 .max_uV = 1350000,
455 .input_uV = 1800000,
456 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
457 REGULATOR_CHANGE_STATUS |
458 REGULATOR_CHANGE_MODE |
459 REGULATOR_CHANGE_DRMS,
460 .valid_modes_mask = REGULATOR_MODE_NORMAL |
461 REGULATOR_MODE_IDLE,
396 }, 462 },
397 .num_consumer_supplies = ARRAY_SIZE(ab8500_vintcore_consumers), 463 .num_consumer_supplies = ARRAY_SIZE(ab8500_vintcore_consumers),
398 .consumer_supplies = ab8500_vintcore_consumers, 464 .consumer_supplies = ab8500_vintcore_consumers,
399 }, 465 },
400 /* supply for U8500 CSI/DSI, VANA LDO */ 466 /* supply for U8500 CSI-DSI, VANA LDO */
401 [AB8500_LDO_ANA] = { 467 [AB8500_LDO_ANA] = {
402 .constraints = { 468 .constraints = {
403 .name = "V-CSI/DSI", 469 .name = "V-CSI-DSI",
404 .valid_ops_mask = REGULATOR_CHANGE_STATUS, 470 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
405 }, 471 },
406 .num_consumer_supplies = ARRAY_SIZE(ab8500_vana_consumers), 472 .num_consumer_supplies = ARRAY_SIZE(ab8500_vana_consumers),
407 .consumer_supplies = ab8500_vana_consumers, 473 .consumer_supplies = ab8500_vana_consumers,
408 }, 474 },
409}; 475};
476
477/* supply for VextSupply3 */
478static struct regulator_consumer_supply ab8500_ext_supply3_consumers[] = {
479 /* SIM supply for 3 V SIM cards */
480 REGULATOR_SUPPLY("vinvsim", "sim-detect.0"),
481};
482
483/* extended configuration for VextSupply2, only used for HREFP_V20 boards */
484static struct ab8500_ext_regulator_cfg ab8500_ext_supply2 = {
485 .hwreq = true,
486};
487
488/*
489 * AB8500 external regulators
490 */
491static struct regulator_init_data ab8500_ext_regulators[] = {
492 /* fixed Vbat supplies VSMPS1_EXT_1V8 */
493 [AB8500_EXT_SUPPLY1] = {
494 .constraints = {
495 .name = "ab8500-ext-supply1",
496 .min_uV = 1800000,
497 .max_uV = 1800000,
498 .initial_mode = REGULATOR_MODE_IDLE,
499 .boot_on = 1,
500 .always_on = 1,
501 },
502 },
503 /* fixed Vbat supplies VSMPS2_EXT_1V36 and VSMPS5_EXT_1V15 */
504 [AB8500_EXT_SUPPLY2] = {
505 .constraints = {
506 .name = "ab8500-ext-supply2",
507 .min_uV = 1360000,
508 .max_uV = 1360000,
509 },
510 },
511 /* fixed Vbat supplies VSMPS3_EXT_3V4 and VSMPS4_EXT_3V4 */
512 [AB8500_EXT_SUPPLY3] = {
513 .constraints = {
514 .name = "ab8500-ext-supply3",
515 .min_uV = 3400000,
516 .max_uV = 3400000,
517 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
518 .boot_on = 1,
519 },
520 .num_consumer_supplies =
521 ARRAY_SIZE(ab8500_ext_supply3_consumers),
522 .consumer_supplies = ab8500_ext_supply3_consumers,
523 },
524};
525
526/* ab8505 regulator register initialization */
527static struct ab8500_regulator_reg_init ab8505_reg_init[] = {
528 /*
529 * VarmRequestCtrl
530 * VsmpsCRequestCtrl
531 * VsmpsARequestCtrl
532 * VsmpsBRequestCtrl
533 */
534 INIT_REGULATOR_REGISTER(AB8505_REGUREQUESTCTRL1, 0x00, 0x00),
535 /*
536 * VsafeRequestCtrl
537 * VpllRequestCtrl
538 * VanaRequestCtrl = HP/LP depending on VxRequest
539 */
540 INIT_REGULATOR_REGISTER(AB8505_REGUREQUESTCTRL2, 0x30, 0x00),
541 /*
542 * Vaux1RequestCtrl = HP/LP depending on VxRequest
543 * Vaux2RequestCtrl = HP/LP depending on VxRequest
544 */
545 INIT_REGULATOR_REGISTER(AB8505_REGUREQUESTCTRL3, 0xf0, 0x00),
546 /*
547 * Vaux3RequestCtrl = HP/LP depending on VxRequest
548 * SwHPReq = Control through SWValid disabled
549 */
550 INIT_REGULATOR_REGISTER(AB8505_REGUREQUESTCTRL4, 0x07, 0x00),
551 /*
552 * VsmpsASysClkReq1HPValid
553 * VsmpsBSysClkReq1HPValid
554 * VsafeSysClkReq1HPValid
555 * VanaSysClkReq1HPValid = disabled
556 * VpllSysClkReq1HPValid
557 * Vaux1SysClkReq1HPValid = disabled
558 * Vaux2SysClkReq1HPValid = disabled
559 * Vaux3SysClkReq1HPValid = disabled
560 */
561 INIT_REGULATOR_REGISTER(AB8505_REGUSYSCLKREQ1HPVALID1, 0xe8, 0x00),
562 /*
563 * VsmpsCSysClkReq1HPValid
564 * VarmSysClkReq1HPValid
565 * VbbSysClkReq1HPValid
566 * VsmpsMSysClkReq1HPValid
567 */
568 INIT_REGULATOR_REGISTER(AB8505_REGUSYSCLKREQ1HPVALID2, 0x00, 0x00),
569 /*
570 * VsmpsAHwHPReq1Valid
571 * VsmpsBHwHPReq1Valid
572 * VsafeHwHPReq1Valid
573 * VanaHwHPReq1Valid = disabled
574 * VpllHwHPReq1Valid
575 * Vaux1HwHPreq1Valid = disabled
576 * Vaux2HwHPReq1Valid = disabled
577 * Vaux3HwHPReqValid = disabled
578 */
579 INIT_REGULATOR_REGISTER(AB8505_REGUHWHPREQ1VALID1, 0xe8, 0x00),
580 /*
581 * VsmpsMHwHPReq1Valid
582 */
583 INIT_REGULATOR_REGISTER(AB8505_REGUHWHPREQ1VALID2, 0x00, 0x00),
584 /*
585 * VsmpsAHwHPReq2Valid
586 * VsmpsBHwHPReq2Valid
587 * VsafeHwHPReq2Valid
588 * VanaHwHPReq2Valid = disabled
589 * VpllHwHPReq2Valid
590 * Vaux1HwHPReq2Valid = disabled
591 * Vaux2HwHPReq2Valid = disabled
592 * Vaux3HwHPReq2Valid = disabled
593 */
594 INIT_REGULATOR_REGISTER(AB8505_REGUHWHPREQ2VALID1, 0xe8, 0x00),
595 /*
596 * VsmpsMHwHPReq2Valid
597 */
598 INIT_REGULATOR_REGISTER(AB8505_REGUHWHPREQ2VALID2, 0x00, 0x00),
599 /**
600 * VsmpsCSwHPReqValid
601 * VarmSwHPReqValid
602 * VsmpsASwHPReqValid
603 * VsmpsBSwHPReqValid
604 * VsafeSwHPReqValid
605 * VanaSwHPReqValid
606 * VanaSwHPReqValid = disabled
607 * VpllSwHPReqValid
608 * Vaux1SwHPReqValid = disabled
609 */
610 INIT_REGULATOR_REGISTER(AB8505_REGUSWHPREQVALID1, 0xa0, 0x00),
611 /*
612 * Vaux2SwHPReqValid = disabled
613 * Vaux3SwHPReqValid = disabled
614 * VsmpsMSwHPReqValid
615 */
616 INIT_REGULATOR_REGISTER(AB8505_REGUSWHPREQVALID2, 0x03, 0x00),
617 /*
618 * SysClkReq2Valid1 = SysClkReq2 controlled
619 * SysClkReq3Valid1 = disabled
620 * SysClkReq4Valid1 = SysClkReq4 controlled
621 */
622 INIT_REGULATOR_REGISTER(AB8505_REGUSYSCLKREQVALID1, 0x0e, 0x0a),
623 /*
624 * SysClkReq2Valid2 = disabled
625 * SysClkReq3Valid2 = disabled
626 * SysClkReq4Valid2 = disabled
627 */
628 INIT_REGULATOR_REGISTER(AB8505_REGUSYSCLKREQVALID2, 0x0e, 0x00),
629 /*
630 * Vaux4SwHPReqValid
631 * Vaux4HwHPReq2Valid
632 * Vaux4HwHPReq1Valid
633 * Vaux4SysClkReq1HPValid
634 */
635 INIT_REGULATOR_REGISTER(AB8505_REGUVAUX4REQVALID, 0x00, 0x00),
636 /*
637 * VadcEna = disabled
638 * VintCore12Ena = disabled
639 * VintCore12Sel = 1.25 V
640 * VintCore12LP = inactive (HP)
641 * VadcLP = inactive (HP)
642 */
643 INIT_REGULATOR_REGISTER(AB8505_REGUMISC1, 0xfe, 0x10),
644 /*
645 * VaudioEna = disabled
646 * Vaux8Ena = disabled
647 * Vamic1Ena = disabled
648 * Vamic2Ena = disabled
649 */
650 INIT_REGULATOR_REGISTER(AB8505_VAUDIOSUPPLY, 0x1e, 0x00),
651 /*
652 * Vamic1_dzout = high-Z when Vamic1 is disabled
653 * Vamic2_dzout = high-Z when Vamic2 is disabled
654 */
655 INIT_REGULATOR_REGISTER(AB8505_REGUCTRL1VAMIC, 0x03, 0x00),
656 /*
657 * VsmpsARegu
658 * VsmpsASelCtrl
659 * VsmpsAAutoMode
660 * VsmpsAPWMMode
661 */
662 INIT_REGULATOR_REGISTER(AB8505_VSMPSAREGU, 0x00, 0x00),
663 /*
664 * VsmpsBRegu
665 * VsmpsBSelCtrl
666 * VsmpsBAutoMode
667 * VsmpsBPWMMode
668 */
669 INIT_REGULATOR_REGISTER(AB8505_VSMPSBREGU, 0x00, 0x00),
670 /*
671 * VsafeRegu
672 * VsafeSelCtrl
673 * VsafeAutoMode
674 * VsafePWMMode
675 */
676 INIT_REGULATOR_REGISTER(AB8505_VSAFEREGU, 0x00, 0x00),
677 /*
678 * VPll = Hw controlled (NOTE! PRCMU bits)
679 * VanaRegu = force off
680 */
681 INIT_REGULATOR_REGISTER(AB8505_VPLLVANAREGU, 0x0f, 0x02),
682 /*
683 * VextSupply1Regu = force OFF (OTP_ExtSupply12LPnPolarity 1)
684 * VextSupply2Regu = force OFF (OTP_ExtSupply12LPnPolarity 1)
685 * VextSupply3Regu = force OFF (OTP_ExtSupply3LPnPolarity 0)
686 * ExtSupply2Bypass = ExtSupply12LPn ball is 0 when Ena is 0
687 * ExtSupply3Bypass = ExtSupply3LPn ball is 0 when Ena is 0
688 */
689 INIT_REGULATOR_REGISTER(AB8505_EXTSUPPLYREGU, 0xff, 0x30),
690 /*
691 * Vaux1Regu = force HP
692 * Vaux2Regu = force off
693 */
694 INIT_REGULATOR_REGISTER(AB8505_VAUX12REGU, 0x0f, 0x01),
695 /*
696 * Vaux3Regu = force off
697 */
698 INIT_REGULATOR_REGISTER(AB8505_VRF1VAUX3REGU, 0x03, 0x00),
699 /*
700 * VsmpsASel1
701 */
702 INIT_REGULATOR_REGISTER(AB8505_VSMPSASEL1, 0x00, 0x00),
703 /*
704 * VsmpsASel2
705 */
706 INIT_REGULATOR_REGISTER(AB8505_VSMPSASEL2, 0x00, 0x00),
707 /*
708 * VsmpsASel3
709 */
710 INIT_REGULATOR_REGISTER(AB8505_VSMPSASEL3, 0x00, 0x00),
711 /*
712 * VsmpsBSel1
713 */
714 INIT_REGULATOR_REGISTER(AB8505_VSMPSBSEL1, 0x00, 0x00),
715 /*
716 * VsmpsBSel2
717 */
718 INIT_REGULATOR_REGISTER(AB8505_VSMPSBSEL2, 0x00, 0x00),
719 /*
720 * VsmpsBSel3
721 */
722 INIT_REGULATOR_REGISTER(AB8505_VSMPSBSEL3, 0x00, 0x00),
723 /*
724 * VsafeSel1
725 */
726 INIT_REGULATOR_REGISTER(AB8505_VSAFESEL1, 0x00, 0x00),
727 /*
728 * VsafeSel2
729 */
730 INIT_REGULATOR_REGISTER(AB8505_VSAFESEL2, 0x00, 0x00),
731 /*
732 * VsafeSel3
733 */
734 INIT_REGULATOR_REGISTER(AB8505_VSAFESEL3, 0x00, 0x00),
735 /*
736 * Vaux1Sel = 2.8 V
737 */
738 INIT_REGULATOR_REGISTER(AB8505_VAUX1SEL, 0x0f, 0x0C),
739 /*
740 * Vaux2Sel = 2.9 V
741 */
742 INIT_REGULATOR_REGISTER(AB8505_VAUX2SEL, 0x0f, 0x0d),
743 /*
744 * Vaux3Sel = 2.91 V
745 */
746 INIT_REGULATOR_REGISTER(AB8505_VRF1VAUX3SEL, 0x07, 0x07),
747 /*
748 * Vaux4RequestCtrl
749 */
750 INIT_REGULATOR_REGISTER(AB8505_VAUX4REQCTRL, 0x00, 0x00),
751 /*
752 * Vaux4Regu
753 */
754 INIT_REGULATOR_REGISTER(AB8505_VAUX4REGU, 0x00, 0x00),
755 /*
756 * Vaux4Sel
757 */
758 INIT_REGULATOR_REGISTER(AB8505_VAUX4SEL, 0x00, 0x00),
759 /*
760 * Vaux1Disch = short discharge time
761 * Vaux2Disch = short discharge time
762 * Vaux3Disch = short discharge time
763 * Vintcore12Disch = short discharge time
764 * VTVoutDisch = short discharge time
765 * VaudioDisch = short discharge time
766 */
767 INIT_REGULATOR_REGISTER(AB8505_REGUCTRLDISCH, 0xfc, 0x00),
768 /*
769 * VanaDisch = short discharge time
770 * Vaux8PullDownEna = pulldown disabled when Vaux8 is disabled
771 * Vaux8Disch = short discharge time
772 */
773 INIT_REGULATOR_REGISTER(AB8505_REGUCTRLDISCH2, 0x16, 0x00),
774 /*
775 * Vaux4Disch = short discharge time
776 */
777 INIT_REGULATOR_REGISTER(AB8505_REGUCTRLDISCH3, 0x01, 0x00),
778 /*
779 * Vaux5Sel
780 * Vaux5LP
781 * Vaux5Ena
782 * Vaux5Disch
783 * Vaux5DisSfst
784 * Vaux5DisPulld
785 */
786 INIT_REGULATOR_REGISTER(AB8505_CTRLVAUX5, 0x00, 0x00),
787 /*
788 * Vaux6Sel
789 * Vaux6LP
790 * Vaux6Ena
791 * Vaux6DisPulld
792 */
793 INIT_REGULATOR_REGISTER(AB8505_CTRLVAUX6, 0x00, 0x00),
794};
795
796struct regulator_init_data ab8505_regulators[AB8505_NUM_REGULATORS] = {
797 /* supplies to the display/camera */
798 [AB8505_LDO_AUX1] = {
799 .constraints = {
800 .name = "V-DISPLAY",
801 .min_uV = 2800000,
802 .max_uV = 3300000,
803 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
804 REGULATOR_CHANGE_STATUS,
805 .boot_on = 1, /* display is on at boot */
806 },
807 .num_consumer_supplies = ARRAY_SIZE(ab8500_vaux1_consumers),
808 .consumer_supplies = ab8500_vaux1_consumers,
809 },
810 /* supplies to the on-board eMMC */
811 [AB8505_LDO_AUX2] = {
812 .constraints = {
813 .name = "V-eMMC1",
814 .min_uV = 1100000,
815 .max_uV = 3300000,
816 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
817 REGULATOR_CHANGE_STATUS |
818 REGULATOR_CHANGE_MODE,
819 .valid_modes_mask = REGULATOR_MODE_NORMAL |
820 REGULATOR_MODE_IDLE,
821 },
822 .num_consumer_supplies = ARRAY_SIZE(ab8500_vaux2_consumers),
823 .consumer_supplies = ab8500_vaux2_consumers,
824 },
825 /* supply for VAUX3, supplies to SDcard slots */
826 [AB8505_LDO_AUX3] = {
827 .constraints = {
828 .name = "V-MMC-SD",
829 .min_uV = 1100000,
830 .max_uV = 3300000,
831 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
832 REGULATOR_CHANGE_STATUS |
833 REGULATOR_CHANGE_MODE,
834 .valid_modes_mask = REGULATOR_MODE_NORMAL |
835 REGULATOR_MODE_IDLE,
836 },
837 .num_consumer_supplies = ARRAY_SIZE(ab8500_vaux3_consumers),
838 .consumer_supplies = ab8500_vaux3_consumers,
839 },
840 /* supply for VAUX4, supplies to NFC and standalone secure element */
841 [AB8505_LDO_AUX4] = {
842 .constraints = {
843 .name = "V-NFC-SE",
844 .min_uV = 1100000,
845 .max_uV = 3300000,
846 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
847 REGULATOR_CHANGE_STATUS |
848 REGULATOR_CHANGE_MODE,
849 .valid_modes_mask = REGULATOR_MODE_NORMAL |
850 REGULATOR_MODE_IDLE,
851 },
852 .num_consumer_supplies = ARRAY_SIZE(ab8505_vaux4_consumers),
853 .consumer_supplies = ab8505_vaux4_consumers,
854 },
855 /* supply for VAUX5, supplies to TBD */
856 [AB8505_LDO_AUX5] = {
857 .constraints = {
858 .name = "V-AUX5",
859 .min_uV = 1050000,
860 .max_uV = 2790000,
861 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
862 REGULATOR_CHANGE_STATUS |
863 REGULATOR_CHANGE_MODE,
864 .valid_modes_mask = REGULATOR_MODE_NORMAL |
865 REGULATOR_MODE_IDLE,
866 },
867 .num_consumer_supplies = ARRAY_SIZE(ab8505_vaux5_consumers),
868 .consumer_supplies = ab8505_vaux5_consumers,
869 },
870 /* supply for VAUX6, supplies to TBD */
871 [AB8505_LDO_AUX6] = {
872 .constraints = {
873 .name = "V-AUX6",
874 .min_uV = 1050000,
875 .max_uV = 2790000,
876 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
877 REGULATOR_CHANGE_STATUS |
878 REGULATOR_CHANGE_MODE,
879 .valid_modes_mask = REGULATOR_MODE_NORMAL |
880 REGULATOR_MODE_IDLE,
881 },
882 .num_consumer_supplies = ARRAY_SIZE(ab8505_vaux6_consumers),
883 .consumer_supplies = ab8505_vaux6_consumers,
884 },
885 /* supply for gpadc, ADC LDO */
886 [AB8505_LDO_ADC] = {
887 .constraints = {
888 .name = "V-ADC",
889 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
890 },
891 .num_consumer_supplies = ARRAY_SIZE(ab8505_vadc_consumers),
892 .consumer_supplies = ab8505_vadc_consumers,
893 },
894 /* supply for ab8500-vaudio, VAUDIO LDO */
895 [AB8505_LDO_AUDIO] = {
896 .constraints = {
897 .name = "V-AUD",
898 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
899 },
900 .num_consumer_supplies = ARRAY_SIZE(ab8500_vaud_consumers),
901 .consumer_supplies = ab8500_vaud_consumers,
902 },
903 /* supply for v-anamic1 VAMic1-LDO */
904 [AB8505_LDO_ANAMIC1] = {
905 .constraints = {
906 .name = "V-AMIC1",
907 .valid_ops_mask = REGULATOR_CHANGE_STATUS |
908 REGULATOR_CHANGE_MODE,
909 .valid_modes_mask = REGULATOR_MODE_NORMAL |
910 REGULATOR_MODE_IDLE,
911 },
912 .num_consumer_supplies = ARRAY_SIZE(ab8500_vamic1_consumers),
913 .consumer_supplies = ab8500_vamic1_consumers,
914 },
915 /* supply for v-amic2, VAMIC2 LDO, reuse constants for AMIC1 */
916 [AB8505_LDO_ANAMIC2] = {
917 .constraints = {
918 .name = "V-AMIC2",
919 .valid_ops_mask = REGULATOR_CHANGE_STATUS |
920 REGULATOR_CHANGE_MODE,
921 .valid_modes_mask = REGULATOR_MODE_NORMAL |
922 REGULATOR_MODE_IDLE,
923 },
924 .num_consumer_supplies = ARRAY_SIZE(ab8500_vamic2_consumers),
925 .consumer_supplies = ab8500_vamic2_consumers,
926 },
927 /* supply for v-aux8, VAUX8 LDO */
928 [AB8505_LDO_AUX8] = {
929 .constraints = {
930 .name = "V-AUX8",
931 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
932 },
933 .num_consumer_supplies = ARRAY_SIZE(ab8505_vaux8_consumers),
934 .consumer_supplies = ab8505_vaux8_consumers,
935 },
936 /* supply for v-intcore12, VINTCORE12 LDO */
937 [AB8505_LDO_INTCORE] = {
938 .constraints = {
939 .name = "V-INTCORE",
940 .min_uV = 1250000,
941 .max_uV = 1350000,
942 .input_uV = 1800000,
943 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
944 REGULATOR_CHANGE_STATUS |
945 REGULATOR_CHANGE_MODE |
946 REGULATOR_CHANGE_DRMS,
947 .valid_modes_mask = REGULATOR_MODE_NORMAL |
948 REGULATOR_MODE_IDLE,
949 },
950 .num_consumer_supplies = ARRAY_SIZE(ab8500_vintcore_consumers),
951 .consumer_supplies = ab8500_vintcore_consumers,
952 },
953 /* supply for LDO USB */
954 [AB8505_LDO_USB] = {
955 .constraints = {
956 .name = "V-USB",
957 .valid_ops_mask = REGULATOR_CHANGE_STATUS |
958 REGULATOR_CHANGE_MODE,
959 .valid_modes_mask = REGULATOR_MODE_NORMAL |
960 REGULATOR_MODE_IDLE,
961 },
962 .num_consumer_supplies = ARRAY_SIZE(ab8505_usb_consumers),
963 .consumer_supplies = ab8505_usb_consumers,
964 },
965 /* supply for U8500 CSI-DSI, VANA LDO */
966 [AB8505_LDO_ANA] = {
967 .constraints = {
968 .name = "V-CSI-DSI",
969 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
970 },
971 .num_consumer_supplies = ARRAY_SIZE(ab8500_vana_consumers),
972 .consumer_supplies = ab8500_vana_consumers,
973 },
974};
975
976struct ab8500_regulator_platform_data ab8500_regulator_plat_data = {
977 .reg_init = ab8500_reg_init,
978 .num_reg_init = ARRAY_SIZE(ab8500_reg_init),
979 .regulator = ab8500_regulators,
980 .num_regulator = ARRAY_SIZE(ab8500_regulators),
981 .ext_regulator = ab8500_ext_regulators,
982 .num_ext_regulator = ARRAY_SIZE(ab8500_ext_regulators),
983};
984
985/* Use the AB8500 init settings for AB8505 as they are the same right now */
986struct ab8500_regulator_platform_data ab8505_regulator_plat_data = {
987 .reg_init = ab8505_reg_init,
988 .num_reg_init = ARRAY_SIZE(ab8505_reg_init),
989 .regulator = ab8505_regulators,
990 .num_regulator = ARRAY_SIZE(ab8505_regulators),
991};
992
993static void ab8500_modify_reg_init(int id, u8 mask, u8 value)
994{
995 int i;
996
997 if (cpu_is_u8520()) {
998 for (i = ARRAY_SIZE(ab8505_reg_init) - 1; i >= 0; i--) {
999 if (ab8505_reg_init[i].id == id) {
1000 u8 initval = ab8505_reg_init[i].value;
1001 initval = (initval & ~mask) | (value & mask);
1002 ab8505_reg_init[i].value = initval;
1003
1004 BUG_ON(mask & ~ab8505_reg_init[i].mask);
1005 return;
1006 }
1007 }
1008 } else {
1009 for (i = ARRAY_SIZE(ab8500_reg_init) - 1; i >= 0; i--) {
1010 if (ab8500_reg_init[i].id == id) {
1011 u8 initval = ab8500_reg_init[i].value;
1012 initval = (initval & ~mask) | (value & mask);
1013 ab8500_reg_init[i].value = initval;
1014
1015 BUG_ON(mask & ~ab8500_reg_init[i].mask);
1016 return;
1017 }
1018 }
1019 }
1020
1021 BUG_ON(1);
1022}
1023
1024void mop500_regulator_init(void)
1025{
1026 struct regulator_init_data *regulator;
1027
1028 /*
1029 * Temporarily turn on Vaux2 on 8520 machine
1030 */
1031 if (cpu_is_u8520()) {
1032 /* Vaux2 initialized to be on */
1033 ab8500_modify_reg_init(AB8505_VAUX12REGU, 0x0f, 0x05);
1034 }
1035
1036 /*
1037 * Handle AB8500_EXT_SUPPLY2 on HREFP_V20_V50 boards (do it for
1038 * all HREFP_V20 boards)
1039 */
1040 if (cpu_is_u8500v20()) {
1041 /* VextSupply2RequestCtrl = HP/OFF depending on VxRequest */
1042 ab8500_modify_reg_init(AB8500_REGUREQUESTCTRL3, 0x01, 0x01);
1043
1044 /* VextSupply2SysClkReq1HPValid = SysClkReq1 controlled */
1045 ab8500_modify_reg_init(AB8500_REGUSYSCLKREQ1HPVALID2,
1046 0x20, 0x20);
1047
1048 /* VextSupply2 = force HP at initialization */
1049 ab8500_modify_reg_init(AB8500_EXTSUPPLYREGU, 0x0c, 0x04);
1050
1051 /* enable VextSupply2 during platform active */
1052 regulator = &ab8500_ext_regulators[AB8500_EXT_SUPPLY2];
1053 regulator->constraints.always_on = 1;
1054
1055 /* disable VextSupply2 in suspend */
1056 regulator = &ab8500_ext_regulators[AB8500_EXT_SUPPLY2];
1057 regulator->constraints.state_mem.disabled = 1;
1058 regulator->constraints.state_standby.disabled = 1;
1059
1060 /* enable VextSupply2 HW control (used in suspend) */
1061 regulator->driver_data = (void *)&ab8500_ext_supply2;
1062 }
1063}
diff --git a/arch/arm/mach-ux500/board-mop500-regulators.h b/arch/arm/mach-ux500/board-mop500-regulators.h
index 78a0642a2206..9bece38fe933 100644
--- a/arch/arm/mach-ux500/board-mop500-regulators.h
+++ b/arch/arm/mach-ux500/board-mop500-regulators.h
@@ -14,10 +14,11 @@
14#include <linux/regulator/machine.h> 14#include <linux/regulator/machine.h>
15#include <linux/regulator/ab8500.h> 15#include <linux/regulator/ab8500.h>
16 16
17extern struct ab8500_regulator_reg_init 17extern struct ab8500_regulator_platform_data ab8500_regulator_plat_data;
18ab8500_regulator_reg_init[AB8500_NUM_REGULATOR_REGISTERS]; 18extern struct ab8500_regulator_platform_data ab8505_regulator_plat_data;
19extern struct regulator_init_data ab8500_regulators[AB8500_NUM_REGULATORS];
20extern struct regulator_init_data tps61052_regulator; 19extern struct regulator_init_data tps61052_regulator;
21extern struct regulator_init_data gpio_en_3v3_regulator; 20extern struct regulator_init_data gpio_en_3v3_regulator;
22 21
22void mop500_regulator_init(void);
23
23#endif 24#endif
diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c
index 87d2d7b38ce9..ce672378a830 100644
--- a/arch/arm/mach-ux500/board-mop500.c
+++ b/arch/arm/mach-ux500/board-mop500.c
@@ -199,10 +199,7 @@ static struct platform_device snowball_sbnet_dev = {
199 199
200struct ab8500_platform_data ab8500_platdata = { 200struct ab8500_platform_data ab8500_platdata = {
201 .irq_base = MOP500_AB8500_IRQ_BASE, 201 .irq_base = MOP500_AB8500_IRQ_BASE,
202 .regulator_reg_init = ab8500_regulator_reg_init, 202 .regulator = &ab8500_regulator_plat_data,
203 .num_regulator_reg_init = ARRAY_SIZE(ab8500_regulator_reg_init),
204 .regulator = ab8500_regulators,
205 .num_regulator = ARRAY_SIZE(ab8500_regulators),
206 .gpio = &ab8500_gpio_pdata, 203 .gpio = &ab8500_gpio_pdata,
207 .codec = &ab8500_codec_pdata, 204 .codec = &ab8500_codec_pdata,
208}; 205};
diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile
index 6e8250382def..47a34ff88f98 100644
--- a/drivers/regulator/Makefile
+++ b/drivers/regulator/Makefile
@@ -12,7 +12,7 @@ obj-$(CONFIG_REGULATOR_USERSPACE_CONSUMER) += userspace-consumer.o
12obj-$(CONFIG_REGULATOR_88PM8607) += 88pm8607.o 12obj-$(CONFIG_REGULATOR_88PM8607) += 88pm8607.o
13obj-$(CONFIG_REGULATOR_AAT2870) += aat2870-regulator.o 13obj-$(CONFIG_REGULATOR_AAT2870) += aat2870-regulator.o
14obj-$(CONFIG_REGULATOR_AB3100) += ab3100.o 14obj-$(CONFIG_REGULATOR_AB3100) += ab3100.o
15obj-$(CONFIG_REGULATOR_AB8500) += ab8500.o 15obj-$(CONFIG_REGULATOR_AB8500) += ab8500.o ab8500-ext.o
16obj-$(CONFIG_REGULATOR_AD5398) += ad5398.o 16obj-$(CONFIG_REGULATOR_AD5398) += ad5398.o
17obj-$(CONFIG_REGULATOR_ANATOP) += anatop-regulator.o 17obj-$(CONFIG_REGULATOR_ANATOP) += anatop-regulator.o
18obj-$(CONFIG_REGULATOR_ARIZONA) += arizona-micsupp.o arizona-ldo1.o 18obj-$(CONFIG_REGULATOR_ARIZONA) += arizona-micsupp.o arizona-ldo1.o
diff --git a/drivers/regulator/ab8500-ext.c b/drivers/regulator/ab8500-ext.c
new file mode 100644
index 000000000000..b4d45472aae6
--- /dev/null
+++ b/drivers/regulator/ab8500-ext.c
@@ -0,0 +1,407 @@
1/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * License Terms: GNU General Public License v2
5 *
6 * Authors: Bengt Jonsson <bengt.g.jonsson@stericsson.com>
7 *
8 * This file is based on drivers/regulator/ab8500.c
9 *
10 * AB8500 external regulators
11 *
12 * ab8500-ext supports the following regulators:
13 * - VextSupply3
14 */
15#include <linux/init.h>
16#include <linux/kernel.h>
17#include <linux/err.h>
18#include <linux/module.h>
19#include <linux/platform_device.h>
20#include <linux/regulator/driver.h>
21#include <linux/regulator/machine.h>
22#include <linux/mfd/abx500.h>
23#include <linux/mfd/abx500/ab8500.h>
24#include <linux/regulator/ab8500.h>
25
26/**
27 * struct ab8500_ext_regulator_info - ab8500 regulator information
28 * @dev: device pointer
29 * @desc: regulator description
30 * @rdev: regulator device
31 * @cfg: regulator configuration (extension of regulator FW configuration)
32 * @update_bank: bank to control on/off
33 * @update_reg: register to control on/off
34 * @update_mask: mask to enable/disable and set mode of regulator
35 * @update_val: bits holding the regulator current mode
36 * @update_val_hp: bits to set EN pin active (LPn pin deactive)
37 * normally this means high power mode
38 * @update_val_lp: bits to set EN pin active and LPn pin active
39 * normally this means low power mode
40 * @update_val_hw: bits to set regulator pins in HW control
41 * SysClkReq pins and logic will choose mode
42 */
43struct ab8500_ext_regulator_info {
44 struct device *dev;
45 struct regulator_desc desc;
46 struct regulator_dev *rdev;
47 struct ab8500_ext_regulator_cfg *cfg;
48 u8 update_bank;
49 u8 update_reg;
50 u8 update_mask;
51 u8 update_val;
52 u8 update_val_hp;
53 u8 update_val_lp;
54 u8 update_val_hw;
55};
56
57static int ab8500_ext_regulator_enable(struct regulator_dev *rdev)
58{
59 int ret;
60 struct ab8500_ext_regulator_info *info = rdev_get_drvdata(rdev);
61 u8 regval;
62
63 if (info == NULL) {
64 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
65 return -EINVAL;
66 }
67
68 /*
69 * To satisfy both HW high power request and SW request, the regulator
70 * must be on in high power.
71 */
72 if (info->cfg && info->cfg->hwreq)
73 regval = info->update_val_hp;
74 else
75 regval = info->update_val;
76
77 ret = abx500_mask_and_set_register_interruptible(info->dev,
78 info->update_bank, info->update_reg,
79 info->update_mask, regval);
80 if (ret < 0) {
81 dev_err(rdev_get_dev(info->rdev),
82 "couldn't set enable bits for regulator\n");
83 return ret;
84 }
85
86 dev_dbg(rdev_get_dev(rdev),
87 "%s-enable (bank, reg, mask, value): 0x%02x, 0x%02x, 0x%02x, 0x%02x\n",
88 info->desc.name, info->update_bank, info->update_reg,
89 info->update_mask, regval);
90
91 return 0;
92}
93
94static int ab8500_ext_regulator_disable(struct regulator_dev *rdev)
95{
96 int ret;
97 struct ab8500_ext_regulator_info *info = rdev_get_drvdata(rdev);
98 u8 regval;
99
100 if (info == NULL) {
101 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
102 return -EINVAL;
103 }
104
105 /*
106 * Set the regulator in HW request mode if configured
107 */
108 if (info->cfg && info->cfg->hwreq)
109 regval = info->update_val_hw;
110 else
111 regval = 0;
112
113 ret = abx500_mask_and_set_register_interruptible(info->dev,
114 info->update_bank, info->update_reg,
115 info->update_mask, regval);
116 if (ret < 0) {
117 dev_err(rdev_get_dev(info->rdev),
118 "couldn't set disable bits for regulator\n");
119 return ret;
120 }
121
122 dev_dbg(rdev_get_dev(rdev), "%s-disable (bank, reg, mask, value):"
123 " 0x%02x, 0x%02x, 0x%02x, 0x%02x\n",
124 info->desc.name, info->update_bank, info->update_reg,
125 info->update_mask, regval);
126
127 return 0;
128}
129
130static int ab8500_ext_regulator_is_enabled(struct regulator_dev *rdev)
131{
132 int ret;
133 struct ab8500_ext_regulator_info *info = rdev_get_drvdata(rdev);
134 u8 regval;
135
136 if (info == NULL) {
137 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
138 return -EINVAL;
139 }
140
141 ret = abx500_get_register_interruptible(info->dev,
142 info->update_bank, info->update_reg, &regval);
143 if (ret < 0) {
144 dev_err(rdev_get_dev(rdev),
145 "couldn't read 0x%x register\n", info->update_reg);
146 return ret;
147 }
148
149 dev_dbg(rdev_get_dev(rdev), "%s-is_enabled (bank, reg, mask, value):"
150 " 0x%02x, 0x%02x, 0x%02x, 0x%02x\n",
151 info->desc.name, info->update_bank, info->update_reg,
152 info->update_mask, regval);
153
154 if (((regval & info->update_mask) == info->update_val_lp) ||
155 ((regval & info->update_mask) == info->update_val_hp))
156 return 1;
157 else
158 return 0;
159}
160
161static int ab8500_ext_regulator_set_mode(struct regulator_dev *rdev,
162 unsigned int mode)
163{
164 int ret = 0;
165 struct ab8500_ext_regulator_info *info = rdev_get_drvdata(rdev);
166 u8 regval;
167
168 if (info == NULL) {
169 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
170 return -EINVAL;
171 }
172
173 switch (mode) {
174 case REGULATOR_MODE_NORMAL:
175 regval = info->update_val_hp;
176 break;
177 case REGULATOR_MODE_IDLE:
178 regval = info->update_val_lp;
179 break;
180
181 default:
182 return -EINVAL;
183 }
184
185 /* If regulator is enabled and info->cfg->hwreq is set, the regulator
186 must be on in high power, so we don't need to write the register with
187 the same value.
188 */
189 if (ab8500_ext_regulator_is_enabled(rdev) &&
190 !(info->cfg && info->cfg->hwreq)) {
191 ret = abx500_mask_and_set_register_interruptible(info->dev,
192 info->update_bank, info->update_reg,
193 info->update_mask, regval);
194 if (ret < 0) {
195 dev_err(rdev_get_dev(rdev),
196 "Could not set regulator mode.\n");
197 return ret;
198 }
199
200 dev_dbg(rdev_get_dev(rdev),
201 "%s-set_mode (bank, reg, mask, value): "
202 "0x%x, 0x%x, 0x%x, 0x%x\n",
203 info->desc.name, info->update_bank, info->update_reg,
204 info->update_mask, regval);
205 }
206
207 info->update_val = regval;
208
209 return 0;
210}
211
212static unsigned int ab8500_ext_regulator_get_mode(struct regulator_dev *rdev)
213{
214 struct ab8500_ext_regulator_info *info = rdev_get_drvdata(rdev);
215 int ret;
216
217 if (info == NULL) {
218 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
219 return -EINVAL;
220 }
221
222 if (info->update_val == info->update_val_hp)
223 ret = REGULATOR_MODE_NORMAL;
224 else if (info->update_val == info->update_val_lp)
225 ret = REGULATOR_MODE_IDLE;
226 else
227 ret = -EINVAL;
228
229 return ret;
230}
231
232static int ab8500_ext_list_voltage(struct regulator_dev *rdev,
233 unsigned selector)
234{
235 struct regulation_constraints *regu_constraints = rdev->constraints;
236
237 if (regu_constraints == NULL) {
238 dev_err(rdev_get_dev(rdev), "regulator constraints null pointer\n");
239 return -EINVAL;
240 }
241 /* return the uV for the fixed regulators */
242 if (regu_constraints->min_uV && regu_constraints->max_uV) {
243 if (regu_constraints->min_uV == regu_constraints->max_uV)
244 return regu_constraints->min_uV;
245 }
246 return -EINVAL;
247}
248
249static struct regulator_ops ab8500_ext_regulator_ops = {
250 .enable = ab8500_ext_regulator_enable,
251 .disable = ab8500_ext_regulator_disable,
252 .is_enabled = ab8500_ext_regulator_is_enabled,
253 .set_mode = ab8500_ext_regulator_set_mode,
254 .get_mode = ab8500_ext_regulator_get_mode,
255 .list_voltage = ab8500_ext_list_voltage,
256};
257
258static struct ab8500_ext_regulator_info
259 ab8500_ext_regulator_info[AB8500_NUM_EXT_REGULATORS] = {
260 [AB8500_EXT_SUPPLY1] = {
261 .desc = {
262 .name = "VEXTSUPPLY1",
263 .ops = &ab8500_ext_regulator_ops,
264 .type = REGULATOR_VOLTAGE,
265 .id = AB8500_EXT_SUPPLY1,
266 .owner = THIS_MODULE,
267 .n_voltages = 1,
268 },
269 .update_bank = 0x04,
270 .update_reg = 0x08,
271 .update_mask = 0x03,
272 .update_val = 0x01,
273 .update_val_hp = 0x01,
274 .update_val_lp = 0x03,
275 .update_val_hw = 0x02,
276 },
277 [AB8500_EXT_SUPPLY2] = {
278 .desc = {
279 .name = "VEXTSUPPLY2",
280 .ops = &ab8500_ext_regulator_ops,
281 .type = REGULATOR_VOLTAGE,
282 .id = AB8500_EXT_SUPPLY2,
283 .owner = THIS_MODULE,
284 .n_voltages = 1,
285 },
286 .update_bank = 0x04,
287 .update_reg = 0x08,
288 .update_mask = 0x0c,
289 .update_val = 0x04,
290 .update_val_hp = 0x04,
291 .update_val_lp = 0x0c,
292 .update_val_hw = 0x08,
293 },
294 [AB8500_EXT_SUPPLY3] = {
295 .desc = {
296 .name = "VEXTSUPPLY3",
297 .ops = &ab8500_ext_regulator_ops,
298 .type = REGULATOR_VOLTAGE,
299 .id = AB8500_EXT_SUPPLY3,
300 .owner = THIS_MODULE,
301 .n_voltages = 1,
302 },
303 .update_bank = 0x04,
304 .update_reg = 0x08,
305 .update_mask = 0x30,
306 .update_val = 0x10,
307 .update_val_hp = 0x10,
308 .update_val_lp = 0x30,
309 .update_val_hw = 0x20,
310 },
311};
312
313int ab8500_ext_regulator_init(struct platform_device *pdev)
314{
315 struct ab8500 *ab8500 = dev_get_drvdata(pdev->dev.parent);
316 struct ab8500_platform_data *ppdata;
317 struct ab8500_regulator_platform_data *pdata;
318 struct regulator_config config = { };
319 int i, err;
320
321 if (!ab8500) {
322 dev_err(&pdev->dev, "null mfd parent\n");
323 return -EINVAL;
324 }
325 ppdata = dev_get_platdata(ab8500->dev);
326 if (!ppdata) {
327 dev_err(&pdev->dev, "null parent pdata\n");
328 return -EINVAL;
329 }
330
331 pdata = ppdata->regulator;
332 if (!pdata) {
333 dev_err(&pdev->dev, "null pdata\n");
334 return -EINVAL;
335 }
336
337 /* make sure the platform data has the correct size */
338 if (pdata->num_ext_regulator != ARRAY_SIZE(ab8500_ext_regulator_info)) {
339 dev_err(&pdev->dev, "Configuration error: size mismatch.\n");
340 return -EINVAL;
341 }
342
343 /* check for AB8500 2.x */
344 if (is_ab8500_2p0_or_earlier(ab8500)) {
345 struct ab8500_ext_regulator_info *info;
346
347 /* VextSupply3LPn is inverted on AB8500 2.x */
348 info = &ab8500_ext_regulator_info[AB8500_EXT_SUPPLY3];
349 info->update_val = 0x30;
350 info->update_val_hp = 0x30;
351 info->update_val_lp = 0x10;
352 }
353
354 /* register all regulators */
355 for (i = 0; i < ARRAY_SIZE(ab8500_ext_regulator_info); i++) {
356 struct ab8500_ext_regulator_info *info = NULL;
357
358 /* assign per-regulator data */
359 info = &ab8500_ext_regulator_info[i];
360 info->dev = &pdev->dev;
361 info->cfg = (struct ab8500_ext_regulator_cfg *)
362 pdata->ext_regulator[i].driver_data;
363
364 config.dev = &pdev->dev;
365 config.init_data = &pdata->ext_regulator[i];
366 config.driver_data = info;
367
368 /* register regulator with framework */
369 info->rdev = regulator_register(&info->desc, &config);
370 if (IS_ERR(info->rdev)) {
371 err = PTR_ERR(info->rdev);
372 dev_err(&pdev->dev, "failed to register regulator %s\n",
373 info->desc.name);
374 /* when we fail, un-register all earlier regulators */
375 while (--i >= 0) {
376 info = &ab8500_ext_regulator_info[i];
377 regulator_unregister(info->rdev);
378 }
379 return err;
380 }
381
382 dev_dbg(rdev_get_dev(info->rdev),
383 "%s-probed\n", info->desc.name);
384 }
385
386 return 0;
387}
388
389void ab8500_ext_regulator_exit(struct platform_device *pdev)
390{
391 int i;
392
393 for (i = 0; i < ARRAY_SIZE(ab8500_ext_regulator_info); i++) {
394 struct ab8500_ext_regulator_info *info = NULL;
395 info = &ab8500_ext_regulator_info[i];
396
397 dev_vdbg(rdev_get_dev(info->rdev),
398 "%s-remove\n", info->desc.name);
399
400 regulator_unregister(info->rdev);
401 }
402}
403
404MODULE_LICENSE("GPL v2");
405MODULE_AUTHOR("Bengt Jonsson <bengt.g.jonsson@stericsson.com>");
406MODULE_DESCRIPTION("AB8500 external regulator driver");
407MODULE_ALIAS("platform:ab8500-ext-regulator");
diff --git a/drivers/regulator/ab8500.c b/drivers/regulator/ab8500.c
index 09014f38a948..f6656b8c28b6 100644
--- a/drivers/regulator/ab8500.c
+++ b/drivers/regulator/ab8500.c
@@ -5,11 +5,15 @@
5 * 5 *
6 * Authors: Sundar Iyer <sundar.iyer@stericsson.com> for ST-Ericsson 6 * Authors: Sundar Iyer <sundar.iyer@stericsson.com> for ST-Ericsson
7 * Bengt Jonsson <bengt.g.jonsson@stericsson.com> for ST-Ericsson 7 * Bengt Jonsson <bengt.g.jonsson@stericsson.com> for ST-Ericsson
8 * Daniel Willerud <daniel.willerud@stericsson.com> for ST-Ericsson
8 * 9 *
9 * AB8500 peripheral regulators 10 * AB8500 peripheral regulators
10 * 11 *
11 * AB8500 supports the following regulators: 12 * AB8500 supports the following regulators:
12 * VAUX1/2/3, VINTCORE, VTVOUT, VUSB, VAUDIO, VAMIC1/2, VDMIC, VANA 13 * VAUX1/2/3, VINTCORE, VTVOUT, VUSB, VAUDIO, VAMIC1/2, VDMIC, VANA
14 *
15 * AB8505 supports the following regulators:
16 * VAUX1/2/3/4/5/6, VINTCORE, VADC, VUSB, VAUDIO, VAMIC1/2, VDMIC, VANA
13 */ 17 */
14#include <linux/init.h> 18#include <linux/init.h>
15#include <linux/kernel.h> 19#include <linux/kernel.h>
@@ -26,33 +30,64 @@
26#include <linux/slab.h> 30#include <linux/slab.h>
27 31
28/** 32/**
33 * struct ab8500_shared_mode - is used when mode is shared between
34 * two regulators.
35 * @shared_regulator: pointer to the other sharing regulator
36 * @lp_mode_req: low power mode requested by this regulator
37 */
38struct ab8500_shared_mode {
39 struct ab8500_regulator_info *shared_regulator;
40 bool lp_mode_req;
41};
42
43/**
29 * struct ab8500_regulator_info - ab8500 regulator information 44 * struct ab8500_regulator_info - ab8500 regulator information
30 * @dev: device pointer 45 * @dev: device pointer
31 * @desc: regulator description 46 * @desc: regulator description
32 * @regulator_dev: regulator device 47 * @regulator_dev: regulator device
48 * @shared_mode: used when mode is shared between two regulators
49 * @load_lp_uA: maximum load in idle (low power) mode
33 * @update_bank: bank to control on/off 50 * @update_bank: bank to control on/off
34 * @update_reg: register to control on/off 51 * @update_reg: register to control on/off
35 * @update_mask: mask to enable/disable regulator 52 * @update_mask: mask to enable/disable and set mode of regulator
36 * @update_val_enable: bits to enable the regulator in normal (high power) mode 53 * @update_val: bits holding the regulator current mode
54 * @update_val_idle: bits to enable the regulator in idle (low power) mode
55 * @update_val_normal: bits to enable the regulator in normal (high power) mode
56 * @mode_bank: bank with location of mode register
57 * @mode_reg: mode register
58 * @mode_mask: mask for setting mode
59 * @mode_val_idle: mode setting for low power
60 * @mode_val_normal: mode setting for normal power
37 * @voltage_bank: bank to control regulator voltage 61 * @voltage_bank: bank to control regulator voltage
38 * @voltage_reg: register to control regulator voltage 62 * @voltage_reg: register to control regulator voltage
39 * @voltage_mask: mask to control regulator voltage 63 * @voltage_mask: mask to control regulator voltage
40 * @voltage_shift: shift to control regulator voltage
41 * @delay: startup/set voltage delay in us
42 */ 64 */
43struct ab8500_regulator_info { 65struct ab8500_regulator_info {
44 struct device *dev; 66 struct device *dev;
45 struct regulator_desc desc; 67 struct regulator_desc desc;
46 struct regulator_dev *regulator; 68 struct regulator_dev *regulator;
69 struct ab8500_shared_mode *shared_mode;
70 int load_lp_uA;
47 u8 update_bank; 71 u8 update_bank;
48 u8 update_reg; 72 u8 update_reg;
49 u8 update_mask; 73 u8 update_mask;
50 u8 update_val_enable; 74 u8 update_val;
75 u8 update_val_idle;
76 u8 update_val_normal;
77 u8 mode_bank;
78 u8 mode_reg;
79 u8 mode_mask;
80 u8 mode_val_idle;
81 u8 mode_val_normal;
51 u8 voltage_bank; 82 u8 voltage_bank;
52 u8 voltage_reg; 83 u8 voltage_reg;
53 u8 voltage_mask; 84 u8 voltage_mask;
54 u8 voltage_shift; 85 struct {
55 unsigned int delay; 86 u8 voltage_limit;
87 u8 voltage_bank;
88 u8 voltage_reg;
89 u8 voltage_mask;
90 } expand_register;
56}; 91};
57 92
58/* voltage tables for the vauxn/vintcore supplies */ 93/* voltage tables for the vauxn/vintcore supplies */
@@ -86,6 +121,44 @@ static const unsigned int ldo_vaux3_voltages[] = {
86 2910000, 121 2910000,
87}; 122};
88 123
124static const unsigned int ldo_vaux56_voltages[] = {
125 1800000,
126 1050000,
127 1100000,
128 1200000,
129 1500000,
130 2200000,
131 2500000,
132 2790000,
133};
134
135static const unsigned int ldo_vaux3_ab8540_voltages[] = {
136 1200000,
137 1500000,
138 1800000,
139 2100000,
140 2500000,
141 2750000,
142 2790000,
143 2910000,
144 3050000,
145};
146
147static const unsigned int ldo_vaux56_ab8540_voltages[] = {
148 750000, 760000, 770000, 780000, 790000, 800000,
149 810000, 820000, 830000, 840000, 850000, 860000,
150 870000, 880000, 890000, 900000, 910000, 920000,
151 930000, 940000, 950000, 960000, 970000, 980000,
152 990000, 1000000, 1010000, 1020000, 1030000,
153 1040000, 1050000, 1060000, 1070000, 1080000,
154 1090000, 1100000, 1110000, 1120000, 1130000,
155 1140000, 1150000, 1160000, 1170000, 1180000,
156 1190000, 1200000, 1210000, 1220000, 1230000,
157 1240000, 1250000, 1260000, 1270000, 1280000,
158 1290000, 1300000, 1310000, 1320000, 1330000,
159 1340000, 1350000, 1360000, 1800000, 2790000,
160};
161
89static const unsigned int ldo_vintcore_voltages[] = { 162static const unsigned int ldo_vintcore_voltages[] = {
90 1200000, 163 1200000,
91 1225000, 164 1225000,
@@ -96,6 +169,72 @@ static const unsigned int ldo_vintcore_voltages[] = {
96 1350000, 169 1350000,
97}; 170};
98 171
172static const unsigned int ldo_sdio_voltages[] = {
173 1160000,
174 1050000,
175 1100000,
176 1500000,
177 1800000,
178 2200000,
179 2910000,
180 3050000,
181};
182
183static const unsigned int fixed_1200000_voltage[] = {
184 1200000,
185};
186
187static const unsigned int fixed_1800000_voltage[] = {
188 1800000,
189};
190
191static const unsigned int fixed_2000000_voltage[] = {
192 2000000,
193};
194
195static const unsigned int fixed_2050000_voltage[] = {
196 2050000,
197};
198
199static const unsigned int fixed_3300000_voltage[] = {
200 3300000,
201};
202
203static const unsigned int ldo_vana_voltages[] = {
204 1050000,
205 1075000,
206 1100000,
207 1125000,
208 1150000,
209 1175000,
210 1200000,
211 1225000,
212};
213
214static const unsigned int ldo_vaudio_voltages[] = {
215 2000000,
216 2100000,
217 2200000,
218 2300000,
219 2400000,
220 2500000,
221 2600000,
222 2600000, /* Duplicated in Vaudio and IsoUicc Control register. */
223};
224
225static const unsigned int ldo_vdmic_voltages[] = {
226 1800000,
227 1900000,
228 2000000,
229 2850000,
230};
231
232static DEFINE_MUTEX(shared_mode_mutex);
233static struct ab8500_shared_mode ldo_anamic1_shared;
234static struct ab8500_shared_mode ldo_anamic2_shared;
235static struct ab8500_shared_mode ab8540_ldo_anamic1_shared;
236static struct ab8500_shared_mode ab8540_ldo_anamic2_shared;
237
99static int ab8500_regulator_enable(struct regulator_dev *rdev) 238static int ab8500_regulator_enable(struct regulator_dev *rdev)
100{ 239{
101 int ret; 240 int ret;
@@ -108,15 +247,17 @@ static int ab8500_regulator_enable(struct regulator_dev *rdev)
108 247
109 ret = abx500_mask_and_set_register_interruptible(info->dev, 248 ret = abx500_mask_and_set_register_interruptible(info->dev,
110 info->update_bank, info->update_reg, 249 info->update_bank, info->update_reg,
111 info->update_mask, info->update_val_enable); 250 info->update_mask, info->update_val);
112 if (ret < 0) 251 if (ret < 0) {
113 dev_err(rdev_get_dev(rdev), 252 dev_err(rdev_get_dev(rdev),
114 "couldn't set enable bits for regulator\n"); 253 "couldn't set enable bits for regulator\n");
254 return ret;
255 }
115 256
116 dev_vdbg(rdev_get_dev(rdev), 257 dev_vdbg(rdev_get_dev(rdev),
117 "%s-enable (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n", 258 "%s-enable (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n",
118 info->desc.name, info->update_bank, info->update_reg, 259 info->desc.name, info->update_bank, info->update_reg,
119 info->update_mask, info->update_val_enable); 260 info->update_mask, info->update_val);
120 261
121 return ret; 262 return ret;
122} 263}
@@ -134,9 +275,11 @@ static int ab8500_regulator_disable(struct regulator_dev *rdev)
134 ret = abx500_mask_and_set_register_interruptible(info->dev, 275 ret = abx500_mask_and_set_register_interruptible(info->dev,
135 info->update_bank, info->update_reg, 276 info->update_bank, info->update_reg,
136 info->update_mask, 0x0); 277 info->update_mask, 0x0);
137 if (ret < 0) 278 if (ret < 0) {
138 dev_err(rdev_get_dev(rdev), 279 dev_err(rdev_get_dev(rdev),
139 "couldn't set disable bits for regulator\n"); 280 "couldn't set disable bits for regulator\n");
281 return ret;
282 }
140 283
141 dev_vdbg(rdev_get_dev(rdev), 284 dev_vdbg(rdev_get_dev(rdev),
142 "%s-disable (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n", 285 "%s-disable (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n",
@@ -172,14 +315,170 @@ static int ab8500_regulator_is_enabled(struct regulator_dev *rdev)
172 info->update_mask, regval); 315 info->update_mask, regval);
173 316
174 if (regval & info->update_mask) 317 if (regval & info->update_mask)
175 return true; 318 return 1;
319 else
320 return 0;
321}
322
323static unsigned int ab8500_regulator_get_optimum_mode(
324 struct regulator_dev *rdev, int input_uV,
325 int output_uV, int load_uA)
326{
327 unsigned int mode;
328
329 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
330
331 if (info == NULL) {
332 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
333 return -EINVAL;
334 }
335
336 if (load_uA <= info->load_lp_uA)
337 mode = REGULATOR_MODE_IDLE;
338 else
339 mode = REGULATOR_MODE_NORMAL;
340
341 return mode;
342}
343
344static int ab8500_regulator_set_mode(struct regulator_dev *rdev,
345 unsigned int mode)
346{
347 int ret = 0;
348 u8 bank, reg, mask, val;
349 bool lp_mode_req = false;
350 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
351
352 if (info == NULL) {
353 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
354 return -EINVAL;
355 }
356
357 if (info->mode_mask) {
358 bank = info->mode_bank;
359 reg = info->mode_reg;
360 mask = info->mode_mask;
361 } else {
362 bank = info->update_bank;
363 reg = info->update_reg;
364 mask = info->update_mask;
365 }
366
367 if (info->shared_mode)
368 mutex_lock(&shared_mode_mutex);
369
370 switch (mode) {
371 case REGULATOR_MODE_NORMAL:
372 if (info->shared_mode)
373 lp_mode_req = false;
374
375 if (info->mode_mask)
376 val = info->mode_val_normal;
377 else
378 val = info->update_val_normal;
379 break;
380 case REGULATOR_MODE_IDLE:
381 if (info->shared_mode) {
382 struct ab8500_regulator_info *shared_regulator;
383
384 shared_regulator = info->shared_mode->shared_regulator;
385 if (!shared_regulator->shared_mode->lp_mode_req) {
386 /* Other regulator prevent LP mode */
387 info->shared_mode->lp_mode_req = true;
388 goto out_unlock;
389 }
390
391 lp_mode_req = true;
392 }
393
394 if (info->mode_mask)
395 val = info->mode_val_idle;
396 else
397 val = info->update_val_idle;
398 break;
399 default:
400 ret = -EINVAL;
401 goto out_unlock;
402 }
403
404 if (info->mode_mask || ab8500_regulator_is_enabled(rdev)) {
405 ret = abx500_mask_and_set_register_interruptible(info->dev,
406 bank, reg, mask, val);
407 if (ret < 0) {
408 dev_err(rdev_get_dev(rdev),
409 "couldn't set regulator mode\n");
410 goto out_unlock;
411 }
412
413 dev_vdbg(rdev_get_dev(rdev),
414 "%s-set_mode (bank, reg, mask, value): "
415 "0x%x, 0x%x, 0x%x, 0x%x\n",
416 info->desc.name, bank, reg,
417 mask, val);
418 }
419
420 if (!info->mode_mask)
421 info->update_val = val;
422
423 if (info->shared_mode)
424 info->shared_mode->lp_mode_req = lp_mode_req;
425
426out_unlock:
427 if (info->shared_mode)
428 mutex_unlock(&shared_mode_mutex);
429
430 return ret;
431}
432
433static unsigned int ab8500_regulator_get_mode(struct regulator_dev *rdev)
434{
435 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
436 int ret;
437 u8 val;
438 u8 val_normal;
439 u8 val_idle;
440
441 if (info == NULL) {
442 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
443 return -EINVAL;
444 }
445
446 /* Need special handling for shared mode */
447 if (info->shared_mode) {
448 if (info->shared_mode->lp_mode_req)
449 return REGULATOR_MODE_IDLE;
450 else
451 return REGULATOR_MODE_NORMAL;
452 }
453
454 if (info->mode_mask) {
455 /* Dedicated register for handling mode */
456 ret = abx500_get_register_interruptible(info->dev,
457 info->mode_bank, info->mode_reg, &val);
458 val = val & info->mode_mask;
459
460 val_normal = info->mode_val_normal;
461 val_idle = info->mode_val_idle;
462 } else {
463 /* Mode register same as enable register */
464 val = info->update_val;
465 val_normal = info->update_val_normal;
466 val_idle = info->update_val_idle;
467 }
468
469 if (val == val_normal)
470 ret = REGULATOR_MODE_NORMAL;
471 else if (val == val_idle)
472 ret = REGULATOR_MODE_IDLE;
176 else 473 else
177 return false; 474 ret = -EINVAL;
475
476 return ret;
178} 477}
179 478
180static int ab8500_regulator_get_voltage_sel(struct regulator_dev *rdev) 479static int ab8500_regulator_get_voltage_sel(struct regulator_dev *rdev)
181{ 480{
182 int ret, val; 481 int ret, voltage_shift;
183 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev); 482 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
184 u8 regval; 483 u8 regval;
185 484
@@ -188,6 +487,8 @@ static int ab8500_regulator_get_voltage_sel(struct regulator_dev *rdev)
188 return -EINVAL; 487 return -EINVAL;
189 } 488 }
190 489
490 voltage_shift = ffs(info->voltage_mask) - 1;
491
191 ret = abx500_get_register_interruptible(info->dev, 492 ret = abx500_get_register_interruptible(info->dev,
192 info->voltage_bank, info->voltage_reg, &regval); 493 info->voltage_bank, info->voltage_reg, &regval);
193 if (ret < 0) { 494 if (ret < 0) {
@@ -201,16 +502,62 @@ static int ab8500_regulator_get_voltage_sel(struct regulator_dev *rdev)
201 "0x%x, 0x%x, 0x%x, 0x%x, 0x%x\n", 502 "0x%x, 0x%x, 0x%x, 0x%x, 0x%x\n",
202 info->desc.name, info->voltage_bank, 503 info->desc.name, info->voltage_bank,
203 info->voltage_reg, info->voltage_mask, 504 info->voltage_reg, info->voltage_mask,
204 info->voltage_shift, regval); 505 voltage_shift, regval);
205 506
206 val = regval & info->voltage_mask; 507 return (regval & info->voltage_mask) >> voltage_shift;
207 return val >> info->voltage_shift; 508}
509
510static int ab8540_aux3_regulator_get_voltage_sel(struct regulator_dev *rdev)
511{
512 int ret, voltage_shift;
513 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
514 u8 regval, regval_expand;
515
516 if (info == NULL) {
517 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
518 return -EINVAL;
519 }
520
521 ret = abx500_get_register_interruptible(info->dev,
522 info->expand_register.voltage_bank,
523 info->expand_register.voltage_reg, &regval_expand);
524 if (ret < 0) {
525 dev_err(rdev_get_dev(rdev),
526 "couldn't read voltage expand reg for regulator\n");
527 return ret;
528 }
529
530 dev_vdbg(rdev_get_dev(rdev),
531 "%s-get_voltage expand (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n",
532 info->desc.name, info->expand_register.voltage_bank,
533 info->expand_register.voltage_reg,
534 info->expand_register.voltage_mask, regval_expand);
535
536 if (regval_expand & info->expand_register.voltage_mask)
537 return info->expand_register.voltage_limit;
538
539 ret = abx500_get_register_interruptible(info->dev,
540 info->voltage_bank, info->voltage_reg, &regval);
541 if (ret < 0) {
542 dev_err(rdev_get_dev(rdev),
543 "couldn't read voltage reg for regulator\n");
544 return ret;
545 }
546
547 dev_vdbg(rdev_get_dev(rdev),
548 "%s-get_voltage (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n",
549 info->desc.name, info->voltage_bank, info->voltage_reg,
550 info->voltage_mask, regval);
551
552 voltage_shift = ffs(info->voltage_mask) - 1;
553
554 return (regval & info->voltage_mask) >> voltage_shift;
208} 555}
209 556
210static int ab8500_regulator_set_voltage_sel(struct regulator_dev *rdev, 557static int ab8500_regulator_set_voltage_sel(struct regulator_dev *rdev,
211 unsigned selector) 558 unsigned selector)
212{ 559{
213 int ret; 560 int ret, voltage_shift;
214 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev); 561 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
215 u8 regval; 562 u8 regval;
216 563
@@ -219,8 +566,10 @@ static int ab8500_regulator_set_voltage_sel(struct regulator_dev *rdev,
219 return -EINVAL; 566 return -EINVAL;
220 } 567 }
221 568
569 voltage_shift = ffs(info->voltage_mask) - 1;
570
222 /* set the registers for the request */ 571 /* set the registers for the request */
223 regval = (u8)selector << info->voltage_shift; 572 regval = (u8)selector << voltage_shift;
224 ret = abx500_mask_and_set_register_interruptible(info->dev, 573 ret = abx500_mask_and_set_register_interruptible(info->dev,
225 info->voltage_bank, info->voltage_reg, 574 info->voltage_bank, info->voltage_reg,
226 info->voltage_mask, regval); 575 info->voltage_mask, regval);
@@ -237,32 +586,121 @@ static int ab8500_regulator_set_voltage_sel(struct regulator_dev *rdev,
237 return ret; 586 return ret;
238} 587}
239 588
240static int ab8500_regulator_set_voltage_time_sel(struct regulator_dev *rdev, 589static int ab8540_aux3_regulator_set_voltage_sel(struct regulator_dev *rdev,
241 unsigned int old_sel, 590 unsigned selector)
242 unsigned int new_sel)
243{ 591{
592 int ret;
244 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev); 593 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
594 u8 regval, regval_expand;
595
596 if (info == NULL) {
597 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
598 return -EINVAL;
599 }
600
601 if (selector < info->expand_register.voltage_limit) {
602 int voltage_shift = ffs(info->voltage_mask) - 1;
603
604 regval = (u8)selector << voltage_shift;
605 ret = abx500_mask_and_set_register_interruptible(info->dev,
606 info->voltage_bank, info->voltage_reg,
607 info->voltage_mask, regval);
608 if (ret < 0) {
609 dev_err(rdev_get_dev(rdev),
610 "couldn't set voltage reg for regulator\n");
611 return ret;
612 }
245 613
246 return info->delay; 614 dev_vdbg(rdev_get_dev(rdev),
615 "%s-set_voltage (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n",
616 info->desc.name, info->voltage_bank, info->voltage_reg,
617 info->voltage_mask, regval);
618
619 regval_expand = 0;
620 } else {
621 regval_expand = info->expand_register.voltage_mask;
622 }
623
624 ret = abx500_mask_and_set_register_interruptible(info->dev,
625 info->expand_register.voltage_bank,
626 info->expand_register.voltage_reg,
627 info->expand_register.voltage_mask,
628 regval_expand);
629 if (ret < 0) {
630 dev_err(rdev_get_dev(rdev),
631 "couldn't set expand voltage reg for regulator\n");
632 return ret;
633 }
634
635 dev_vdbg(rdev_get_dev(rdev),
636 "%s-set_voltage expand (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n",
637 info->desc.name, info->expand_register.voltage_bank,
638 info->expand_register.voltage_reg,
639 info->expand_register.voltage_mask, regval_expand);
640
641 return 0;
247} 642}
248 643
249static struct regulator_ops ab8500_regulator_ops = { 644static struct regulator_ops ab8500_regulator_volt_mode_ops = {
645 .enable = ab8500_regulator_enable,
646 .disable = ab8500_regulator_disable,
647 .is_enabled = ab8500_regulator_is_enabled,
648 .get_optimum_mode = ab8500_regulator_get_optimum_mode,
649 .set_mode = ab8500_regulator_set_mode,
650 .get_mode = ab8500_regulator_get_mode,
651 .get_voltage_sel = ab8500_regulator_get_voltage_sel,
652 .set_voltage_sel = ab8500_regulator_set_voltage_sel,
653 .list_voltage = regulator_list_voltage_table,
654};
655
656static struct regulator_ops ab8540_aux3_regulator_volt_mode_ops = {
657 .enable = ab8500_regulator_enable,
658 .disable = ab8500_regulator_disable,
659 .get_optimum_mode = ab8500_regulator_get_optimum_mode,
660 .set_mode = ab8500_regulator_set_mode,
661 .get_mode = ab8500_regulator_get_mode,
662 .is_enabled = ab8500_regulator_is_enabled,
663 .get_voltage_sel = ab8540_aux3_regulator_get_voltage_sel,
664 .set_voltage_sel = ab8540_aux3_regulator_set_voltage_sel,
665 .list_voltage = regulator_list_voltage_table,
666};
667
668static struct regulator_ops ab8500_regulator_volt_ops = {
250 .enable = ab8500_regulator_enable, 669 .enable = ab8500_regulator_enable,
251 .disable = ab8500_regulator_disable, 670 .disable = ab8500_regulator_disable,
252 .is_enabled = ab8500_regulator_is_enabled, 671 .is_enabled = ab8500_regulator_is_enabled,
253 .get_voltage_sel = ab8500_regulator_get_voltage_sel, 672 .get_voltage_sel = ab8500_regulator_get_voltage_sel,
254 .set_voltage_sel = ab8500_regulator_set_voltage_sel, 673 .set_voltage_sel = ab8500_regulator_set_voltage_sel,
255 .list_voltage = regulator_list_voltage_table, 674 .list_voltage = regulator_list_voltage_table,
256 .set_voltage_time_sel = ab8500_regulator_set_voltage_time_sel,
257}; 675};
258 676
259static struct regulator_ops ab8500_regulator_fixed_ops = { 677static struct regulator_ops ab8500_regulator_mode_ops = {
678 .enable = ab8500_regulator_enable,
679 .disable = ab8500_regulator_disable,
680 .is_enabled = ab8500_regulator_is_enabled,
681 .get_optimum_mode = ab8500_regulator_get_optimum_mode,
682 .set_mode = ab8500_regulator_set_mode,
683 .get_mode = ab8500_regulator_get_mode,
684 .list_voltage = regulator_list_voltage_table,
685};
686
687static struct regulator_ops ab8500_regulator_ops = {
688 .enable = ab8500_regulator_enable,
689 .disable = ab8500_regulator_disable,
690 .is_enabled = ab8500_regulator_is_enabled,
691 .list_voltage = regulator_list_voltage_table,
692};
693
694static struct regulator_ops ab8500_regulator_anamic_mode_ops = {
260 .enable = ab8500_regulator_enable, 695 .enable = ab8500_regulator_enable,
261 .disable = ab8500_regulator_disable, 696 .disable = ab8500_regulator_disable,
262 .is_enabled = ab8500_regulator_is_enabled, 697 .is_enabled = ab8500_regulator_is_enabled,
263 .list_voltage = regulator_list_voltage_linear, 698 .set_mode = ab8500_regulator_set_mode,
699 .get_mode = ab8500_regulator_get_mode,
700 .list_voltage = regulator_list_voltage_table,
264}; 701};
265 702
703/* AB8500 regulator information */
266static struct ab8500_regulator_info 704static struct ab8500_regulator_info
267 ab8500_regulator_info[AB8500_NUM_REGULATORS] = { 705 ab8500_regulator_info[AB8500_NUM_REGULATORS] = {
268 /* 706 /*
@@ -274,17 +712,21 @@ static struct ab8500_regulator_info
274 [AB8500_LDO_AUX1] = { 712 [AB8500_LDO_AUX1] = {
275 .desc = { 713 .desc = {
276 .name = "LDO-AUX1", 714 .name = "LDO-AUX1",
277 .ops = &ab8500_regulator_ops, 715 .ops = &ab8500_regulator_volt_mode_ops,
278 .type = REGULATOR_VOLTAGE, 716 .type = REGULATOR_VOLTAGE,
279 .id = AB8500_LDO_AUX1, 717 .id = AB8500_LDO_AUX1,
280 .owner = THIS_MODULE, 718 .owner = THIS_MODULE,
281 .n_voltages = ARRAY_SIZE(ldo_vauxn_voltages), 719 .n_voltages = ARRAY_SIZE(ldo_vauxn_voltages),
282 .volt_table = ldo_vauxn_voltages, 720 .volt_table = ldo_vauxn_voltages,
721 .enable_time = 200,
283 }, 722 },
723 .load_lp_uA = 5000,
284 .update_bank = 0x04, 724 .update_bank = 0x04,
285 .update_reg = 0x09, 725 .update_reg = 0x09,
286 .update_mask = 0x03, 726 .update_mask = 0x03,
287 .update_val_enable = 0x01, 727 .update_val = 0x01,
728 .update_val_idle = 0x03,
729 .update_val_normal = 0x01,
288 .voltage_bank = 0x04, 730 .voltage_bank = 0x04,
289 .voltage_reg = 0x1f, 731 .voltage_reg = 0x1f,
290 .voltage_mask = 0x0f, 732 .voltage_mask = 0x0f,
@@ -292,17 +734,21 @@ static struct ab8500_regulator_info
292 [AB8500_LDO_AUX2] = { 734 [AB8500_LDO_AUX2] = {
293 .desc = { 735 .desc = {
294 .name = "LDO-AUX2", 736 .name = "LDO-AUX2",
295 .ops = &ab8500_regulator_ops, 737 .ops = &ab8500_regulator_volt_mode_ops,
296 .type = REGULATOR_VOLTAGE, 738 .type = REGULATOR_VOLTAGE,
297 .id = AB8500_LDO_AUX2, 739 .id = AB8500_LDO_AUX2,
298 .owner = THIS_MODULE, 740 .owner = THIS_MODULE,
299 .n_voltages = ARRAY_SIZE(ldo_vauxn_voltages), 741 .n_voltages = ARRAY_SIZE(ldo_vauxn_voltages),
300 .volt_table = ldo_vauxn_voltages, 742 .volt_table = ldo_vauxn_voltages,
743 .enable_time = 200,
301 }, 744 },
745 .load_lp_uA = 5000,
302 .update_bank = 0x04, 746 .update_bank = 0x04,
303 .update_reg = 0x09, 747 .update_reg = 0x09,
304 .update_mask = 0x0c, 748 .update_mask = 0x0c,
305 .update_val_enable = 0x04, 749 .update_val = 0x04,
750 .update_val_idle = 0x0c,
751 .update_val_normal = 0x04,
306 .voltage_bank = 0x04, 752 .voltage_bank = 0x04,
307 .voltage_reg = 0x20, 753 .voltage_reg = 0x20,
308 .voltage_mask = 0x0f, 754 .voltage_mask = 0x0f,
@@ -310,17 +756,21 @@ static struct ab8500_regulator_info
310 [AB8500_LDO_AUX3] = { 756 [AB8500_LDO_AUX3] = {
311 .desc = { 757 .desc = {
312 .name = "LDO-AUX3", 758 .name = "LDO-AUX3",
313 .ops = &ab8500_regulator_ops, 759 .ops = &ab8500_regulator_volt_mode_ops,
314 .type = REGULATOR_VOLTAGE, 760 .type = REGULATOR_VOLTAGE,
315 .id = AB8500_LDO_AUX3, 761 .id = AB8500_LDO_AUX3,
316 .owner = THIS_MODULE, 762 .owner = THIS_MODULE,
317 .n_voltages = ARRAY_SIZE(ldo_vaux3_voltages), 763 .n_voltages = ARRAY_SIZE(ldo_vaux3_voltages),
318 .volt_table = ldo_vaux3_voltages, 764 .volt_table = ldo_vaux3_voltages,
765 .enable_time = 450,
319 }, 766 },
767 .load_lp_uA = 5000,
320 .update_bank = 0x04, 768 .update_bank = 0x04,
321 .update_reg = 0x0a, 769 .update_reg = 0x0a,
322 .update_mask = 0x03, 770 .update_mask = 0x03,
323 .update_val_enable = 0x01, 771 .update_val = 0x01,
772 .update_val_idle = 0x03,
773 .update_val_normal = 0x01,
324 .voltage_bank = 0x04, 774 .voltage_bank = 0x04,
325 .voltage_reg = 0x21, 775 .voltage_reg = 0x21,
326 .voltage_mask = 0x07, 776 .voltage_mask = 0x07,
@@ -328,21 +778,24 @@ static struct ab8500_regulator_info
328 [AB8500_LDO_INTCORE] = { 778 [AB8500_LDO_INTCORE] = {
329 .desc = { 779 .desc = {
330 .name = "LDO-INTCORE", 780 .name = "LDO-INTCORE",
331 .ops = &ab8500_regulator_ops, 781 .ops = &ab8500_regulator_volt_mode_ops,
332 .type = REGULATOR_VOLTAGE, 782 .type = REGULATOR_VOLTAGE,
333 .id = AB8500_LDO_INTCORE, 783 .id = AB8500_LDO_INTCORE,
334 .owner = THIS_MODULE, 784 .owner = THIS_MODULE,
335 .n_voltages = ARRAY_SIZE(ldo_vintcore_voltages), 785 .n_voltages = ARRAY_SIZE(ldo_vintcore_voltages),
336 .volt_table = ldo_vintcore_voltages, 786 .volt_table = ldo_vintcore_voltages,
787 .enable_time = 750,
337 }, 788 },
789 .load_lp_uA = 5000,
338 .update_bank = 0x03, 790 .update_bank = 0x03,
339 .update_reg = 0x80, 791 .update_reg = 0x80,
340 .update_mask = 0x44, 792 .update_mask = 0x44,
341 .update_val_enable = 0x04, 793 .update_val = 0x44,
794 .update_val_idle = 0x44,
795 .update_val_normal = 0x04,
342 .voltage_bank = 0x03, 796 .voltage_bank = 0x03,
343 .voltage_reg = 0x80, 797 .voltage_reg = 0x80,
344 .voltage_mask = 0x38, 798 .voltage_mask = 0x38,
345 .voltage_shift = 3,
346 }, 799 },
347 800
348 /* 801 /*
@@ -353,112 +806,984 @@ static struct ab8500_regulator_info
353 [AB8500_LDO_TVOUT] = { 806 [AB8500_LDO_TVOUT] = {
354 .desc = { 807 .desc = {
355 .name = "LDO-TVOUT", 808 .name = "LDO-TVOUT",
356 .ops = &ab8500_regulator_fixed_ops, 809 .ops = &ab8500_regulator_mode_ops,
357 .type = REGULATOR_VOLTAGE, 810 .type = REGULATOR_VOLTAGE,
358 .id = AB8500_LDO_TVOUT, 811 .id = AB8500_LDO_TVOUT,
359 .owner = THIS_MODULE, 812 .owner = THIS_MODULE,
360 .n_voltages = 1, 813 .n_voltages = 1,
361 .min_uV = 2000000, 814 .volt_table = fixed_2000000_voltage,
815 .enable_time = 500,
816 },
817 .load_lp_uA = 1000,
818 .update_bank = 0x03,
819 .update_reg = 0x80,
820 .update_mask = 0x82,
821 .update_val = 0x02,
822 .update_val_idle = 0x82,
823 .update_val_normal = 0x02,
824 },
825 [AB8500_LDO_AUDIO] = {
826 .desc = {
827 .name = "LDO-AUDIO",
828 .ops = &ab8500_regulator_ops,
829 .type = REGULATOR_VOLTAGE,
830 .id = AB8500_LDO_AUDIO,
831 .owner = THIS_MODULE,
832 .n_voltages = 1,
833 .enable_time = 140,
834 .volt_table = fixed_2000000_voltage,
835 },
836 .update_bank = 0x03,
837 .update_reg = 0x83,
838 .update_mask = 0x02,
839 .update_val = 0x02,
840 },
841 [AB8500_LDO_ANAMIC1] = {
842 .desc = {
843 .name = "LDO-ANAMIC1",
844 .ops = &ab8500_regulator_ops,
845 .type = REGULATOR_VOLTAGE,
846 .id = AB8500_LDO_ANAMIC1,
847 .owner = THIS_MODULE,
848 .n_voltages = 1,
849 .enable_time = 500,
850 .volt_table = fixed_2050000_voltage,
851 },
852 .update_bank = 0x03,
853 .update_reg = 0x83,
854 .update_mask = 0x08,
855 .update_val = 0x08,
856 },
857 [AB8500_LDO_ANAMIC2] = {
858 .desc = {
859 .name = "LDO-ANAMIC2",
860 .ops = &ab8500_regulator_ops,
861 .type = REGULATOR_VOLTAGE,
862 .id = AB8500_LDO_ANAMIC2,
863 .owner = THIS_MODULE,
864 .n_voltages = 1,
865 .enable_time = 500,
866 .volt_table = fixed_2050000_voltage,
867 },
868 .update_bank = 0x03,
869 .update_reg = 0x83,
870 .update_mask = 0x10,
871 .update_val = 0x10,
872 },
873 [AB8500_LDO_DMIC] = {
874 .desc = {
875 .name = "LDO-DMIC",
876 .ops = &ab8500_regulator_ops,
877 .type = REGULATOR_VOLTAGE,
878 .id = AB8500_LDO_DMIC,
879 .owner = THIS_MODULE,
880 .n_voltages = 1,
881 .enable_time = 420,
882 .volt_table = fixed_1800000_voltage,
883 },
884 .update_bank = 0x03,
885 .update_reg = 0x83,
886 .update_mask = 0x04,
887 .update_val = 0x04,
888 },
889
890 /*
891 * Regulators with fixed voltage and normal/idle modes
892 */
893 [AB8500_LDO_ANA] = {
894 .desc = {
895 .name = "LDO-ANA",
896 .ops = &ab8500_regulator_mode_ops,
897 .type = REGULATOR_VOLTAGE,
898 .id = AB8500_LDO_ANA,
899 .owner = THIS_MODULE,
900 .n_voltages = 1,
901 .enable_time = 140,
902 .volt_table = fixed_1200000_voltage,
903 },
904 .load_lp_uA = 1000,
905 .update_bank = 0x04,
906 .update_reg = 0x06,
907 .update_mask = 0x0c,
908 .update_val = 0x04,
909 .update_val_idle = 0x0c,
910 .update_val_normal = 0x04,
911 },
912};
913
914/* AB8505 regulator information */
915static struct ab8500_regulator_info
916 ab8505_regulator_info[AB8505_NUM_REGULATORS] = {
917 /*
918 * Variable Voltage Regulators
919 * name, min mV, max mV,
920 * update bank, reg, mask, enable val
921 * volt bank, reg, mask
922 */
923 [AB8505_LDO_AUX1] = {
924 .desc = {
925 .name = "LDO-AUX1",
926 .ops = &ab8500_regulator_volt_mode_ops,
927 .type = REGULATOR_VOLTAGE,
928 .id = AB8505_LDO_AUX1,
929 .owner = THIS_MODULE,
930 .n_voltages = ARRAY_SIZE(ldo_vauxn_voltages),
931 .volt_table = ldo_vauxn_voltages,
932 },
933 .load_lp_uA = 5000,
934 .update_bank = 0x04,
935 .update_reg = 0x09,
936 .update_mask = 0x03,
937 .update_val = 0x01,
938 .update_val_idle = 0x03,
939 .update_val_normal = 0x01,
940 .voltage_bank = 0x04,
941 .voltage_reg = 0x1f,
942 .voltage_mask = 0x0f,
943 },
944 [AB8505_LDO_AUX2] = {
945 .desc = {
946 .name = "LDO-AUX2",
947 .ops = &ab8500_regulator_volt_mode_ops,
948 .type = REGULATOR_VOLTAGE,
949 .id = AB8505_LDO_AUX2,
950 .owner = THIS_MODULE,
951 .n_voltages = ARRAY_SIZE(ldo_vauxn_voltages),
952 .volt_table = ldo_vauxn_voltages,
953 },
954 .load_lp_uA = 5000,
955 .update_bank = 0x04,
956 .update_reg = 0x09,
957 .update_mask = 0x0c,
958 .update_val = 0x04,
959 .update_val_idle = 0x0c,
960 .update_val_normal = 0x04,
961 .voltage_bank = 0x04,
962 .voltage_reg = 0x20,
963 .voltage_mask = 0x0f,
964 },
965 [AB8505_LDO_AUX3] = {
966 .desc = {
967 .name = "LDO-AUX3",
968 .ops = &ab8500_regulator_volt_mode_ops,
969 .type = REGULATOR_VOLTAGE,
970 .id = AB8505_LDO_AUX3,
971 .owner = THIS_MODULE,
972 .n_voltages = ARRAY_SIZE(ldo_vaux3_voltages),
973 .volt_table = ldo_vaux3_voltages,
974 },
975 .load_lp_uA = 5000,
976 .update_bank = 0x04,
977 .update_reg = 0x0a,
978 .update_mask = 0x03,
979 .update_val = 0x01,
980 .update_val_idle = 0x03,
981 .update_val_normal = 0x01,
982 .voltage_bank = 0x04,
983 .voltage_reg = 0x21,
984 .voltage_mask = 0x07,
985 },
986 [AB8505_LDO_AUX4] = {
987 .desc = {
988 .name = "LDO-AUX4",
989 .ops = &ab8500_regulator_volt_mode_ops,
990 .type = REGULATOR_VOLTAGE,
991 .id = AB8505_LDO_AUX4,
992 .owner = THIS_MODULE,
993 .n_voltages = ARRAY_SIZE(ldo_vauxn_voltages),
994 .volt_table = ldo_vauxn_voltages,
995 },
996 .load_lp_uA = 5000,
997 /* values for Vaux4Regu register */
998 .update_bank = 0x04,
999 .update_reg = 0x2e,
1000 .update_mask = 0x03,
1001 .update_val = 0x01,
1002 .update_val_idle = 0x03,
1003 .update_val_normal = 0x01,
1004 /* values for Vaux4SEL register */
1005 .voltage_bank = 0x04,
1006 .voltage_reg = 0x2f,
1007 .voltage_mask = 0x0f,
1008 },
1009 [AB8505_LDO_AUX5] = {
1010 .desc = {
1011 .name = "LDO-AUX5",
1012 .ops = &ab8500_regulator_volt_mode_ops,
1013 .type = REGULATOR_VOLTAGE,
1014 .id = AB8505_LDO_AUX5,
1015 .owner = THIS_MODULE,
1016 .n_voltages = ARRAY_SIZE(ldo_vaux56_voltages),
1017 .volt_table = ldo_vaux56_voltages,
1018 },
1019 .load_lp_uA = 2000,
1020 /* values for CtrlVaux5 register */
1021 .update_bank = 0x01,
1022 .update_reg = 0x55,
1023 .update_mask = 0x18,
1024 .update_val = 0x10,
1025 .update_val_idle = 0x18,
1026 .update_val_normal = 0x10,
1027 .voltage_bank = 0x01,
1028 .voltage_reg = 0x55,
1029 .voltage_mask = 0x07,
1030 },
1031 [AB8505_LDO_AUX6] = {
1032 .desc = {
1033 .name = "LDO-AUX6",
1034 .ops = &ab8500_regulator_volt_mode_ops,
1035 .type = REGULATOR_VOLTAGE,
1036 .id = AB8505_LDO_AUX6,
1037 .owner = THIS_MODULE,
1038 .n_voltages = ARRAY_SIZE(ldo_vaux56_voltages),
1039 .volt_table = ldo_vaux56_voltages,
1040 },
1041 .load_lp_uA = 2000,
1042 /* values for CtrlVaux6 register */
1043 .update_bank = 0x01,
1044 .update_reg = 0x56,
1045 .update_mask = 0x18,
1046 .update_val = 0x10,
1047 .update_val_idle = 0x18,
1048 .update_val_normal = 0x10,
1049 .voltage_bank = 0x01,
1050 .voltage_reg = 0x56,
1051 .voltage_mask = 0x07,
1052 },
1053 [AB8505_LDO_INTCORE] = {
1054 .desc = {
1055 .name = "LDO-INTCORE",
1056 .ops = &ab8500_regulator_volt_mode_ops,
1057 .type = REGULATOR_VOLTAGE,
1058 .id = AB8505_LDO_INTCORE,
1059 .owner = THIS_MODULE,
1060 .n_voltages = ARRAY_SIZE(ldo_vintcore_voltages),
1061 .volt_table = ldo_vintcore_voltages,
1062 },
1063 .load_lp_uA = 5000,
1064 .update_bank = 0x03,
1065 .update_reg = 0x80,
1066 .update_mask = 0x44,
1067 .update_val = 0x04,
1068 .update_val_idle = 0x44,
1069 .update_val_normal = 0x04,
1070 .voltage_bank = 0x03,
1071 .voltage_reg = 0x80,
1072 .voltage_mask = 0x38,
1073 },
1074
1075 /*
1076 * Fixed Voltage Regulators
1077 * name, fixed mV,
1078 * update bank, reg, mask, enable val
1079 */
1080 [AB8505_LDO_ADC] = {
1081 .desc = {
1082 .name = "LDO-ADC",
1083 .ops = &ab8500_regulator_mode_ops,
1084 .type = REGULATOR_VOLTAGE,
1085 .id = AB8505_LDO_ADC,
1086 .owner = THIS_MODULE,
1087 .n_voltages = 1,
1088 .volt_table = fixed_2000000_voltage,
362 .enable_time = 10000, 1089 .enable_time = 10000,
363 }, 1090 },
364 .delay = 10000, 1091 .load_lp_uA = 1000,
365 .update_bank = 0x03, 1092 .update_bank = 0x03,
366 .update_reg = 0x80, 1093 .update_reg = 0x80,
367 .update_mask = 0x82, 1094 .update_mask = 0x82,
368 .update_val_enable = 0x02, 1095 .update_val = 0x02,
1096 .update_val_idle = 0x82,
1097 .update_val_normal = 0x02,
369 }, 1098 },
370 [AB8500_LDO_USB] = { 1099 [AB8505_LDO_USB] = {
371 .desc = { 1100 .desc = {
372 .name = "LDO-USB", 1101 .name = "LDO-USB",
373 .ops = &ab8500_regulator_fixed_ops, 1102 .ops = &ab8500_regulator_mode_ops,
374 .type = REGULATOR_VOLTAGE, 1103 .type = REGULATOR_VOLTAGE,
375 .id = AB8500_LDO_USB, 1104 .id = AB8505_LDO_USB,
376 .owner = THIS_MODULE, 1105 .owner = THIS_MODULE,
377 .n_voltages = 1, 1106 .n_voltages = 1,
378 .min_uV = 3300000, 1107 .volt_table = fixed_3300000_voltage,
379 }, 1108 },
380 .update_bank = 0x03, 1109 .update_bank = 0x03,
381 .update_reg = 0x82, 1110 .update_reg = 0x82,
382 .update_mask = 0x03, 1111 .update_mask = 0x03,
383 .update_val_enable = 0x01, 1112 .update_val = 0x01,
1113 .update_val_idle = 0x03,
1114 .update_val_normal = 0x01,
384 }, 1115 },
385 [AB8500_LDO_AUDIO] = { 1116 [AB8505_LDO_AUDIO] = {
386 .desc = { 1117 .desc = {
387 .name = "LDO-AUDIO", 1118 .name = "LDO-AUDIO",
388 .ops = &ab8500_regulator_fixed_ops, 1119 .ops = &ab8500_regulator_volt_ops,
389 .type = REGULATOR_VOLTAGE, 1120 .type = REGULATOR_VOLTAGE,
390 .id = AB8500_LDO_AUDIO, 1121 .id = AB8505_LDO_AUDIO,
1122 .owner = THIS_MODULE,
1123 .n_voltages = ARRAY_SIZE(ldo_vaudio_voltages),
1124 .volt_table = ldo_vaudio_voltages,
1125 },
1126 .update_bank = 0x03,
1127 .update_reg = 0x83,
1128 .update_mask = 0x02,
1129 .update_val = 0x02,
1130 .voltage_bank = 0x01,
1131 .voltage_reg = 0x57,
1132 .voltage_mask = 0x70,
1133 },
1134 [AB8505_LDO_ANAMIC1] = {
1135 .desc = {
1136 .name = "LDO-ANAMIC1",
1137 .ops = &ab8500_regulator_anamic_mode_ops,
1138 .type = REGULATOR_VOLTAGE,
1139 .id = AB8505_LDO_ANAMIC1,
1140 .owner = THIS_MODULE,
1141 .n_voltages = 1,
1142 .volt_table = fixed_2050000_voltage,
1143 },
1144 .shared_mode = &ldo_anamic1_shared,
1145 .update_bank = 0x03,
1146 .update_reg = 0x83,
1147 .update_mask = 0x08,
1148 .update_val = 0x08,
1149 .mode_bank = 0x01,
1150 .mode_reg = 0x54,
1151 .mode_mask = 0x04,
1152 .mode_val_idle = 0x04,
1153 .mode_val_normal = 0x00,
1154 },
1155 [AB8505_LDO_ANAMIC2] = {
1156 .desc = {
1157 .name = "LDO-ANAMIC2",
1158 .ops = &ab8500_regulator_anamic_mode_ops,
1159 .type = REGULATOR_VOLTAGE,
1160 .id = AB8505_LDO_ANAMIC2,
391 .owner = THIS_MODULE, 1161 .owner = THIS_MODULE,
392 .n_voltages = 1, 1162 .n_voltages = 1,
393 .min_uV = 2000000, 1163 .volt_table = fixed_2050000_voltage,
1164 },
1165 .shared_mode = &ldo_anamic2_shared,
1166 .update_bank = 0x03,
1167 .update_reg = 0x83,
1168 .update_mask = 0x10,
1169 .update_val = 0x10,
1170 .mode_bank = 0x01,
1171 .mode_reg = 0x54,
1172 .mode_mask = 0x04,
1173 .mode_val_idle = 0x04,
1174 .mode_val_normal = 0x00,
1175 },
1176 [AB8505_LDO_AUX8] = {
1177 .desc = {
1178 .name = "LDO-AUX8",
1179 .ops = &ab8500_regulator_ops,
1180 .type = REGULATOR_VOLTAGE,
1181 .id = AB8505_LDO_AUX8,
1182 .owner = THIS_MODULE,
1183 .n_voltages = 1,
1184 .volt_table = fixed_1800000_voltage,
1185 },
1186 .update_bank = 0x03,
1187 .update_reg = 0x83,
1188 .update_mask = 0x04,
1189 .update_val = 0x04,
1190 },
1191 /*
1192 * Regulators with fixed voltage and normal/idle modes
1193 */
1194 [AB8505_LDO_ANA] = {
1195 .desc = {
1196 .name = "LDO-ANA",
1197 .ops = &ab8500_regulator_volt_mode_ops,
1198 .type = REGULATOR_VOLTAGE,
1199 .id = AB8505_LDO_ANA,
1200 .owner = THIS_MODULE,
1201 .n_voltages = ARRAY_SIZE(ldo_vana_voltages),
1202 .volt_table = ldo_vana_voltages,
1203 },
1204 .load_lp_uA = 1000,
1205 .update_bank = 0x04,
1206 .update_reg = 0x06,
1207 .update_mask = 0x0c,
1208 .update_val = 0x04,
1209 .update_val_idle = 0x0c,
1210 .update_val_normal = 0x04,
1211 .voltage_bank = 0x04,
1212 .voltage_reg = 0x29,
1213 .voltage_mask = 0x7,
1214 },
1215};
1216
1217/* AB9540 regulator information */
1218static struct ab8500_regulator_info
1219 ab9540_regulator_info[AB9540_NUM_REGULATORS] = {
1220 /*
1221 * Variable Voltage Regulators
1222 * name, min mV, max mV,
1223 * update bank, reg, mask, enable val
1224 * volt bank, reg, mask
1225 */
1226 [AB9540_LDO_AUX1] = {
1227 .desc = {
1228 .name = "LDO-AUX1",
1229 .ops = &ab8500_regulator_volt_mode_ops,
1230 .type = REGULATOR_VOLTAGE,
1231 .id = AB9540_LDO_AUX1,
1232 .owner = THIS_MODULE,
1233 .n_voltages = ARRAY_SIZE(ldo_vauxn_voltages),
1234 .volt_table = ldo_vauxn_voltages,
1235 },
1236 .load_lp_uA = 5000,
1237 .update_bank = 0x04,
1238 .update_reg = 0x09,
1239 .update_mask = 0x03,
1240 .update_val = 0x01,
1241 .update_val_idle = 0x03,
1242 .update_val_normal = 0x01,
1243 .voltage_bank = 0x04,
1244 .voltage_reg = 0x1f,
1245 .voltage_mask = 0x0f,
1246 },
1247 [AB9540_LDO_AUX2] = {
1248 .desc = {
1249 .name = "LDO-AUX2",
1250 .ops = &ab8500_regulator_volt_mode_ops,
1251 .type = REGULATOR_VOLTAGE,
1252 .id = AB9540_LDO_AUX2,
1253 .owner = THIS_MODULE,
1254 .n_voltages = ARRAY_SIZE(ldo_vauxn_voltages),
1255 .volt_table = ldo_vauxn_voltages,
1256 },
1257 .load_lp_uA = 5000,
1258 .update_bank = 0x04,
1259 .update_reg = 0x09,
1260 .update_mask = 0x0c,
1261 .update_val = 0x04,
1262 .update_val_idle = 0x0c,
1263 .update_val_normal = 0x04,
1264 .voltage_bank = 0x04,
1265 .voltage_reg = 0x20,
1266 .voltage_mask = 0x0f,
1267 },
1268 [AB9540_LDO_AUX3] = {
1269 .desc = {
1270 .name = "LDO-AUX3",
1271 .ops = &ab8500_regulator_volt_mode_ops,
1272 .type = REGULATOR_VOLTAGE,
1273 .id = AB9540_LDO_AUX3,
1274 .owner = THIS_MODULE,
1275 .n_voltages = ARRAY_SIZE(ldo_vaux3_voltages),
1276 .volt_table = ldo_vaux3_voltages,
1277 },
1278 .load_lp_uA = 5000,
1279 .update_bank = 0x04,
1280 .update_reg = 0x0a,
1281 .update_mask = 0x03,
1282 .update_val = 0x01,
1283 .update_val_idle = 0x03,
1284 .update_val_normal = 0x01,
1285 .voltage_bank = 0x04,
1286 .voltage_reg = 0x21,
1287 .voltage_mask = 0x07,
1288 },
1289 [AB9540_LDO_AUX4] = {
1290 .desc = {
1291 .name = "LDO-AUX4",
1292 .ops = &ab8500_regulator_volt_mode_ops,
1293 .type = REGULATOR_VOLTAGE,
1294 .id = AB9540_LDO_AUX4,
1295 .owner = THIS_MODULE,
1296 .n_voltages = ARRAY_SIZE(ldo_vauxn_voltages),
1297 .volt_table = ldo_vauxn_voltages,
1298 },
1299 .load_lp_uA = 5000,
1300 /* values for Vaux4Regu register */
1301 .update_bank = 0x04,
1302 .update_reg = 0x2e,
1303 .update_mask = 0x03,
1304 .update_val = 0x01,
1305 .update_val_idle = 0x03,
1306 .update_val_normal = 0x01,
1307 /* values for Vaux4SEL register */
1308 .voltage_bank = 0x04,
1309 .voltage_reg = 0x2f,
1310 .voltage_mask = 0x0f,
1311 },
1312 [AB9540_LDO_INTCORE] = {
1313 .desc = {
1314 .name = "LDO-INTCORE",
1315 .ops = &ab8500_regulator_volt_mode_ops,
1316 .type = REGULATOR_VOLTAGE,
1317 .id = AB9540_LDO_INTCORE,
1318 .owner = THIS_MODULE,
1319 .n_voltages = ARRAY_SIZE(ldo_vintcore_voltages),
1320 .volt_table = ldo_vintcore_voltages,
1321 },
1322 .load_lp_uA = 5000,
1323 .update_bank = 0x03,
1324 .update_reg = 0x80,
1325 .update_mask = 0x44,
1326 .update_val = 0x44,
1327 .update_val_idle = 0x44,
1328 .update_val_normal = 0x04,
1329 .voltage_bank = 0x03,
1330 .voltage_reg = 0x80,
1331 .voltage_mask = 0x38,
1332 },
1333
1334 /*
1335 * Fixed Voltage Regulators
1336 * name, fixed mV,
1337 * update bank, reg, mask, enable val
1338 */
1339 [AB9540_LDO_TVOUT] = {
1340 .desc = {
1341 .name = "LDO-TVOUT",
1342 .ops = &ab8500_regulator_mode_ops,
1343 .type = REGULATOR_VOLTAGE,
1344 .id = AB9540_LDO_TVOUT,
1345 .owner = THIS_MODULE,
1346 .n_voltages = 1,
1347 .volt_table = fixed_2000000_voltage,
1348 .enable_time = 10000,
1349 },
1350 .load_lp_uA = 1000,
1351 .update_bank = 0x03,
1352 .update_reg = 0x80,
1353 .update_mask = 0x82,
1354 .update_val = 0x02,
1355 .update_val_idle = 0x82,
1356 .update_val_normal = 0x02,
1357 },
1358 [AB9540_LDO_USB] = {
1359 .desc = {
1360 .name = "LDO-USB",
1361 .ops = &ab8500_regulator_ops,
1362 .type = REGULATOR_VOLTAGE,
1363 .id = AB9540_LDO_USB,
1364 .owner = THIS_MODULE,
1365 .n_voltages = 1,
1366 .volt_table = fixed_3300000_voltage,
1367 },
1368 .update_bank = 0x03,
1369 .update_reg = 0x82,
1370 .update_mask = 0x03,
1371 .update_val = 0x01,
1372 .update_val_idle = 0x03,
1373 .update_val_normal = 0x01,
1374 },
1375 [AB9540_LDO_AUDIO] = {
1376 .desc = {
1377 .name = "LDO-AUDIO",
1378 .ops = &ab8500_regulator_ops,
1379 .type = REGULATOR_VOLTAGE,
1380 .id = AB9540_LDO_AUDIO,
1381 .owner = THIS_MODULE,
1382 .n_voltages = 1,
1383 .volt_table = fixed_2000000_voltage,
394 }, 1384 },
395 .update_bank = 0x03, 1385 .update_bank = 0x03,
396 .update_reg = 0x83, 1386 .update_reg = 0x83,
397 .update_mask = 0x02, 1387 .update_mask = 0x02,
398 .update_val_enable = 0x02, 1388 .update_val = 0x02,
399 }, 1389 },
400 [AB8500_LDO_ANAMIC1] = { 1390 [AB9540_LDO_ANAMIC1] = {
401 .desc = { 1391 .desc = {
402 .name = "LDO-ANAMIC1", 1392 .name = "LDO-ANAMIC1",
403 .ops = &ab8500_regulator_fixed_ops, 1393 .ops = &ab8500_regulator_ops,
404 .type = REGULATOR_VOLTAGE, 1394 .type = REGULATOR_VOLTAGE,
405 .id = AB8500_LDO_ANAMIC1, 1395 .id = AB9540_LDO_ANAMIC1,
406 .owner = THIS_MODULE, 1396 .owner = THIS_MODULE,
407 .n_voltages = 1, 1397 .n_voltages = 1,
408 .min_uV = 2050000, 1398 .volt_table = fixed_2050000_voltage,
409 }, 1399 },
410 .update_bank = 0x03, 1400 .update_bank = 0x03,
411 .update_reg = 0x83, 1401 .update_reg = 0x83,
412 .update_mask = 0x08, 1402 .update_mask = 0x08,
413 .update_val_enable = 0x08, 1403 .update_val = 0x08,
414 }, 1404 },
415 [AB8500_LDO_ANAMIC2] = { 1405 [AB9540_LDO_ANAMIC2] = {
416 .desc = { 1406 .desc = {
417 .name = "LDO-ANAMIC2", 1407 .name = "LDO-ANAMIC2",
418 .ops = &ab8500_regulator_fixed_ops, 1408 .ops = &ab8500_regulator_ops,
419 .type = REGULATOR_VOLTAGE, 1409 .type = REGULATOR_VOLTAGE,
420 .id = AB8500_LDO_ANAMIC2, 1410 .id = AB9540_LDO_ANAMIC2,
421 .owner = THIS_MODULE, 1411 .owner = THIS_MODULE,
422 .n_voltages = 1, 1412 .n_voltages = 1,
423 .min_uV = 2050000, 1413 .volt_table = fixed_2050000_voltage,
424 }, 1414 },
425 .update_bank = 0x03, 1415 .update_bank = 0x03,
426 .update_reg = 0x83, 1416 .update_reg = 0x83,
427 .update_mask = 0x10, 1417 .update_mask = 0x10,
428 .update_val_enable = 0x10, 1418 .update_val = 0x10,
429 }, 1419 },
430 [AB8500_LDO_DMIC] = { 1420 [AB9540_LDO_DMIC] = {
431 .desc = { 1421 .desc = {
432 .name = "LDO-DMIC", 1422 .name = "LDO-DMIC",
433 .ops = &ab8500_regulator_fixed_ops, 1423 .ops = &ab8500_regulator_ops,
434 .type = REGULATOR_VOLTAGE, 1424 .type = REGULATOR_VOLTAGE,
435 .id = AB8500_LDO_DMIC, 1425 .id = AB9540_LDO_DMIC,
436 .owner = THIS_MODULE, 1426 .owner = THIS_MODULE,
437 .n_voltages = 1, 1427 .n_voltages = 1,
438 .min_uV = 1800000, 1428 .volt_table = fixed_1800000_voltage,
439 }, 1429 },
440 .update_bank = 0x03, 1430 .update_bank = 0x03,
441 .update_reg = 0x83, 1431 .update_reg = 0x83,
442 .update_mask = 0x04, 1432 .update_mask = 0x04,
443 .update_val_enable = 0x04, 1433 .update_val = 0x04,
444 }, 1434 },
445 [AB8500_LDO_ANA] = { 1435
1436 /*
1437 * Regulators with fixed voltage and normal/idle modes
1438 */
1439 [AB9540_LDO_ANA] = {
446 .desc = { 1440 .desc = {
447 .name = "LDO-ANA", 1441 .name = "LDO-ANA",
448 .ops = &ab8500_regulator_fixed_ops, 1442 .ops = &ab8500_regulator_mode_ops,
449 .type = REGULATOR_VOLTAGE, 1443 .type = REGULATOR_VOLTAGE,
450 .id = AB8500_LDO_ANA, 1444 .id = AB9540_LDO_ANA,
451 .owner = THIS_MODULE, 1445 .owner = THIS_MODULE,
452 .n_voltages = 1, 1446 .n_voltages = 1,
453 .min_uV = 1200000, 1447 .volt_table = fixed_1200000_voltage,
454 }, 1448 },
1449 .load_lp_uA = 1000,
455 .update_bank = 0x04, 1450 .update_bank = 0x04,
456 .update_reg = 0x06, 1451 .update_reg = 0x06,
457 .update_mask = 0x0c, 1452 .update_mask = 0x0c,
458 .update_val_enable = 0x04, 1453 .update_val = 0x08,
1454 .update_val_idle = 0x0c,
1455 .update_val_normal = 0x08,
459 }, 1456 },
1457};
460 1458
1459/* AB8540 regulator information */
1460static struct ab8500_regulator_info
1461 ab8540_regulator_info[AB8540_NUM_REGULATORS] = {
1462 /*
1463 * Variable Voltage Regulators
1464 * name, min mV, max mV,
1465 * update bank, reg, mask, enable val
1466 * volt bank, reg, mask
1467 */
1468 [AB8540_LDO_AUX1] = {
1469 .desc = {
1470 .name = "LDO-AUX1",
1471 .ops = &ab8500_regulator_volt_mode_ops,
1472 .type = REGULATOR_VOLTAGE,
1473 .id = AB8540_LDO_AUX1,
1474 .owner = THIS_MODULE,
1475 .n_voltages = ARRAY_SIZE(ldo_vauxn_voltages),
1476 .volt_table = ldo_vauxn_voltages,
1477 },
1478 .load_lp_uA = 5000,
1479 .update_bank = 0x04,
1480 .update_reg = 0x09,
1481 .update_mask = 0x03,
1482 .update_val = 0x01,
1483 .update_val_idle = 0x03,
1484 .update_val_normal = 0x01,
1485 .voltage_bank = 0x04,
1486 .voltage_reg = 0x1f,
1487 .voltage_mask = 0x0f,
1488 },
1489 [AB8540_LDO_AUX2] = {
1490 .desc = {
1491 .name = "LDO-AUX2",
1492 .ops = &ab8500_regulator_volt_mode_ops,
1493 .type = REGULATOR_VOLTAGE,
1494 .id = AB8540_LDO_AUX2,
1495 .owner = THIS_MODULE,
1496 .n_voltages = ARRAY_SIZE(ldo_vauxn_voltages),
1497 .volt_table = ldo_vauxn_voltages,
1498 },
1499 .load_lp_uA = 5000,
1500 .update_bank = 0x04,
1501 .update_reg = 0x09,
1502 .update_mask = 0x0c,
1503 .update_val = 0x04,
1504 .update_val_idle = 0x0c,
1505 .update_val_normal = 0x04,
1506 .voltage_bank = 0x04,
1507 .voltage_reg = 0x20,
1508 .voltage_mask = 0x0f,
1509 },
1510 [AB8540_LDO_AUX3] = {
1511 .desc = {
1512 .name = "LDO-AUX3",
1513 .ops = &ab8540_aux3_regulator_volt_mode_ops,
1514 .type = REGULATOR_VOLTAGE,
1515 .id = AB8540_LDO_AUX3,
1516 .owner = THIS_MODULE,
1517 .n_voltages = ARRAY_SIZE(ldo_vaux3_ab8540_voltages),
1518 .volt_table = ldo_vaux3_ab8540_voltages,
1519 },
1520 .load_lp_uA = 5000,
1521 .update_bank = 0x04,
1522 .update_reg = 0x0a,
1523 .update_mask = 0x03,
1524 .update_val = 0x01,
1525 .update_val_idle = 0x03,
1526 .update_val_normal = 0x01,
1527 .voltage_bank = 0x04,
1528 .voltage_reg = 0x21,
1529 .voltage_mask = 0x07,
1530 .expand_register = {
1531 .voltage_limit = 8,
1532 .voltage_bank = 0x04,
1533 .voltage_reg = 0x01,
1534 .voltage_mask = 0x10,
1535 }
1536 },
1537 [AB8540_LDO_AUX4] = {
1538 .desc = {
1539 .name = "LDO-AUX4",
1540 .ops = &ab8500_regulator_volt_mode_ops,
1541 .type = REGULATOR_VOLTAGE,
1542 .id = AB8540_LDO_AUX4,
1543 .owner = THIS_MODULE,
1544 .n_voltages = ARRAY_SIZE(ldo_vauxn_voltages),
1545 .volt_table = ldo_vauxn_voltages,
1546 },
1547 .load_lp_uA = 5000,
1548 /* values for Vaux4Regu register */
1549 .update_bank = 0x04,
1550 .update_reg = 0x2e,
1551 .update_mask = 0x03,
1552 .update_val = 0x01,
1553 .update_val_idle = 0x03,
1554 .update_val_normal = 0x01,
1555 /* values for Vaux4SEL register */
1556 .voltage_bank = 0x04,
1557 .voltage_reg = 0x2f,
1558 .voltage_mask = 0x0f,
1559 },
1560 [AB8540_LDO_AUX5] = {
1561 .desc = {
1562 .name = "LDO-AUX5",
1563 .ops = &ab8500_regulator_volt_mode_ops,
1564 .type = REGULATOR_VOLTAGE,
1565 .id = AB8540_LDO_AUX5,
1566 .owner = THIS_MODULE,
1567 .n_voltages = ARRAY_SIZE(ldo_vaux56_ab8540_voltages),
1568 .volt_table = ldo_vaux56_ab8540_voltages,
1569 },
1570 .load_lp_uA = 20000,
1571 /* values for Vaux5Regu register */
1572 .update_bank = 0x04,
1573 .update_reg = 0x32,
1574 .update_mask = 0x03,
1575 .update_val = 0x01,
1576 .update_val_idle = 0x03,
1577 .update_val_normal = 0x01,
1578 /* values for Vaux5SEL register */
1579 .voltage_bank = 0x04,
1580 .voltage_reg = 0x33,
1581 .voltage_mask = 0x3f,
1582 },
1583 [AB8540_LDO_AUX6] = {
1584 .desc = {
1585 .name = "LDO-AUX6",
1586 .ops = &ab8500_regulator_volt_mode_ops,
1587 .type = REGULATOR_VOLTAGE,
1588 .id = AB8540_LDO_AUX6,
1589 .owner = THIS_MODULE,
1590 .n_voltages = ARRAY_SIZE(ldo_vaux56_ab8540_voltages),
1591 .volt_table = ldo_vaux56_ab8540_voltages,
1592 },
1593 .load_lp_uA = 20000,
1594 /* values for Vaux6Regu register */
1595 .update_bank = 0x04,
1596 .update_reg = 0x35,
1597 .update_mask = 0x03,
1598 .update_val = 0x01,
1599 .update_val_idle = 0x03,
1600 .update_val_normal = 0x01,
1601 /* values for Vaux6SEL register */
1602 .voltage_bank = 0x04,
1603 .voltage_reg = 0x36,
1604 .voltage_mask = 0x3f,
1605 },
1606 [AB8540_LDO_INTCORE] = {
1607 .desc = {
1608 .name = "LDO-INTCORE",
1609 .ops = &ab8500_regulator_volt_mode_ops,
1610 .type = REGULATOR_VOLTAGE,
1611 .id = AB8540_LDO_INTCORE,
1612 .owner = THIS_MODULE,
1613 .n_voltages = ARRAY_SIZE(ldo_vintcore_voltages),
1614 .volt_table = ldo_vintcore_voltages,
1615 },
1616 .load_lp_uA = 5000,
1617 .update_bank = 0x03,
1618 .update_reg = 0x80,
1619 .update_mask = 0x44,
1620 .update_val = 0x44,
1621 .update_val_idle = 0x44,
1622 .update_val_normal = 0x04,
1623 .voltage_bank = 0x03,
1624 .voltage_reg = 0x80,
1625 .voltage_mask = 0x38,
1626 },
461 1627
1628 /*
1629 * Fixed Voltage Regulators
1630 * name, fixed mV,
1631 * update bank, reg, mask, enable val
1632 */
1633 [AB8540_LDO_TVOUT] = {
1634 .desc = {
1635 .name = "LDO-TVOUT",
1636 .ops = &ab8500_regulator_mode_ops,
1637 .type = REGULATOR_VOLTAGE,
1638 .id = AB8540_LDO_TVOUT,
1639 .owner = THIS_MODULE,
1640 .n_voltages = 1,
1641 .volt_table = fixed_2000000_voltage,
1642 .enable_time = 10000,
1643 },
1644 .load_lp_uA = 1000,
1645 .update_bank = 0x03,
1646 .update_reg = 0x80,
1647 .update_mask = 0x82,
1648 .update_val = 0x02,
1649 .update_val_idle = 0x82,
1650 .update_val_normal = 0x02,
1651 },
1652 [AB8540_LDO_AUDIO] = {
1653 .desc = {
1654 .name = "LDO-AUDIO",
1655 .ops = &ab8500_regulator_ops,
1656 .type = REGULATOR_VOLTAGE,
1657 .id = AB8540_LDO_AUDIO,
1658 .owner = THIS_MODULE,
1659 .n_voltages = 1,
1660 .volt_table = fixed_2000000_voltage,
1661 },
1662 .update_bank = 0x03,
1663 .update_reg = 0x83,
1664 .update_mask = 0x02,
1665 .update_val = 0x02,
1666 },
1667 [AB8540_LDO_ANAMIC1] = {
1668 .desc = {
1669 .name = "LDO-ANAMIC1",
1670 .ops = &ab8500_regulator_anamic_mode_ops,
1671 .type = REGULATOR_VOLTAGE,
1672 .id = AB8540_LDO_ANAMIC1,
1673 .owner = THIS_MODULE,
1674 .n_voltages = 1,
1675 .volt_table = fixed_2050000_voltage,
1676 },
1677 .shared_mode = &ab8540_ldo_anamic1_shared,
1678 .update_bank = 0x03,
1679 .update_reg = 0x83,
1680 .update_mask = 0x08,
1681 .update_val = 0x08,
1682 .mode_bank = 0x03,
1683 .mode_reg = 0x83,
1684 .mode_mask = 0x20,
1685 .mode_val_idle = 0x20,
1686 .mode_val_normal = 0x00,
1687 },
1688 [AB8540_LDO_ANAMIC2] = {
1689 .desc = {
1690 .name = "LDO-ANAMIC2",
1691 .ops = &ab8500_regulator_anamic_mode_ops,
1692 .type = REGULATOR_VOLTAGE,
1693 .id = AB8540_LDO_ANAMIC2,
1694 .owner = THIS_MODULE,
1695 .n_voltages = 1,
1696 .volt_table = fixed_2050000_voltage,
1697 },
1698 .shared_mode = &ab8540_ldo_anamic2_shared,
1699 .update_bank = 0x03,
1700 .update_reg = 0x83,
1701 .update_mask = 0x10,
1702 .update_val = 0x10,
1703 .mode_bank = 0x03,
1704 .mode_reg = 0x83,
1705 .mode_mask = 0x20,
1706 .mode_val_idle = 0x20,
1707 .mode_val_normal = 0x00,
1708 },
1709 [AB8540_LDO_DMIC] = {
1710 .desc = {
1711 .name = "LDO-DMIC",
1712 .ops = &ab8500_regulator_volt_mode_ops,
1713 .type = REGULATOR_VOLTAGE,
1714 .id = AB8540_LDO_DMIC,
1715 .owner = THIS_MODULE,
1716 .n_voltages = ARRAY_SIZE(ldo_vdmic_voltages),
1717 .volt_table = ldo_vdmic_voltages,
1718 },
1719 .load_lp_uA = 1000,
1720 .update_bank = 0x03,
1721 .update_reg = 0x83,
1722 .update_mask = 0x04,
1723 .update_val = 0x04,
1724 .voltage_bank = 0x03,
1725 .voltage_reg = 0x83,
1726 .voltage_mask = 0xc0,
1727 },
1728
1729 /*
1730 * Regulators with fixed voltage and normal/idle modes
1731 */
1732 [AB8540_LDO_ANA] = {
1733 .desc = {
1734 .name = "LDO-ANA",
1735 .ops = &ab8500_regulator_mode_ops,
1736 .type = REGULATOR_VOLTAGE,
1737 .id = AB8540_LDO_ANA,
1738 .owner = THIS_MODULE,
1739 .n_voltages = 1,
1740 .volt_table = fixed_1200000_voltage,
1741 },
1742 .load_lp_uA = 1000,
1743 .update_bank = 0x04,
1744 .update_reg = 0x06,
1745 .update_mask = 0x0c,
1746 .update_val = 0x04,
1747 .update_val_idle = 0x0c,
1748 .update_val_normal = 0x04,
1749 },
1750 [AB8540_LDO_SDIO] = {
1751 .desc = {
1752 .name = "LDO-SDIO",
1753 .ops = &ab8500_regulator_volt_mode_ops,
1754 .type = REGULATOR_VOLTAGE,
1755 .id = AB8540_LDO_SDIO,
1756 .owner = THIS_MODULE,
1757 .n_voltages = ARRAY_SIZE(ldo_sdio_voltages),
1758 .volt_table = ldo_sdio_voltages,
1759 },
1760 .load_lp_uA = 5000,
1761 .update_bank = 0x03,
1762 .update_reg = 0x88,
1763 .update_mask = 0x30,
1764 .update_val = 0x10,
1765 .update_val_idle = 0x30,
1766 .update_val_normal = 0x10,
1767 .voltage_bank = 0x03,
1768 .voltage_reg = 0x88,
1769 .voltage_mask = 0x07,
1770 },
1771};
1772
1773static struct ab8500_shared_mode ldo_anamic1_shared = {
1774 .shared_regulator = &ab8505_regulator_info[AB8505_LDO_ANAMIC2],
1775};
1776
1777static struct ab8500_shared_mode ldo_anamic2_shared = {
1778 .shared_regulator = &ab8505_regulator_info[AB8505_LDO_ANAMIC1],
1779};
1780
1781static struct ab8500_shared_mode ab8540_ldo_anamic1_shared = {
1782 .shared_regulator = &ab8540_regulator_info[AB8540_LDO_ANAMIC2],
1783};
1784
1785static struct ab8500_shared_mode ab8540_ldo_anamic2_shared = {
1786 .shared_regulator = &ab8540_regulator_info[AB8540_LDO_ANAMIC1],
462}; 1787};
463 1788
464struct ab8500_reg_init { 1789struct ab8500_reg_init {
@@ -474,13 +1799,13 @@ struct ab8500_reg_init {
474 .mask = _mask, \ 1799 .mask = _mask, \
475 } 1800 }
476 1801
1802/* AB8500 register init */
477static struct ab8500_reg_init ab8500_reg_init[] = { 1803static struct ab8500_reg_init ab8500_reg_init[] = {
478 /* 1804 /*
479 * 0x30, VanaRequestCtrl 1805 * 0x30, VanaRequestCtrl
480 * 0x0C, VpllRequestCtrl
481 * 0xc0, VextSupply1RequestCtrl 1806 * 0xc0, VextSupply1RequestCtrl
482 */ 1807 */
483 REG_INIT(AB8500_REGUREQUESTCTRL2, 0x03, 0x04, 0xfc), 1808 REG_INIT(AB8500_REGUREQUESTCTRL2, 0x03, 0x04, 0xf0),
484 /* 1809 /*
485 * 0x03, VextSupply2RequestCtrl 1810 * 0x03, VextSupply2RequestCtrl
486 * 0x0c, VextSupply3RequestCtrl 1811 * 0x0c, VextSupply3RequestCtrl
@@ -547,13 +1872,21 @@ static struct ab8500_reg_init ab8500_reg_init[] = {
547 REG_INIT(AB8500_REGUSWHPREQVALID2, 0x03, 0x0e, 0x1f), 1872 REG_INIT(AB8500_REGUSWHPREQVALID2, 0x03, 0x0e, 0x1f),
548 /* 1873 /*
549 * 0x02, SysClkReq2Valid1 1874 * 0x02, SysClkReq2Valid1
550 * ... 1875 * 0x04, SysClkReq3Valid1
1876 * 0x08, SysClkReq4Valid1
1877 * 0x10, SysClkReq5Valid1
1878 * 0x20, SysClkReq6Valid1
1879 * 0x40, SysClkReq7Valid1
551 * 0x80, SysClkReq8Valid1 1880 * 0x80, SysClkReq8Valid1
552 */ 1881 */
553 REG_INIT(AB8500_REGUSYSCLKREQVALID1, 0x03, 0x0f, 0xfe), 1882 REG_INIT(AB8500_REGUSYSCLKREQVALID1, 0x03, 0x0f, 0xfe),
554 /* 1883 /*
555 * 0x02, SysClkReq2Valid2 1884 * 0x02, SysClkReq2Valid2
556 * ... 1885 * 0x04, SysClkReq3Valid2
1886 * 0x08, SysClkReq4Valid2
1887 * 0x10, SysClkReq5Valid2
1888 * 0x20, SysClkReq6Valid2
1889 * 0x40, SysClkReq7Valid2
557 * 0x80, SysClkReq8Valid2 1890 * 0x80, SysClkReq8Valid2
558 */ 1891 */
559 REG_INIT(AB8500_REGUSYSCLKREQVALID2, 0x03, 0x10, 0xfe), 1892 REG_INIT(AB8500_REGUSYSCLKREQVALID2, 0x03, 0x10, 0xfe),
@@ -578,8 +1911,8 @@ static struct ab8500_reg_init ab8500_reg_init[] = {
578 */ 1911 */
579 REG_INIT(AB8500_REGUCTRL1VAMIC, 0x03, 0x84, 0x03), 1912 REG_INIT(AB8500_REGUCTRL1VAMIC, 0x03, 0x84, 0x03),
580 /* 1913 /*
1914 * 0x03, VpllRegu (NOTE! PRCMU register bits)
581 * 0x0c, VanaRegu 1915 * 0x0c, VanaRegu
582 * 0x03, VpllRegu
583 */ 1916 */
584 REG_INIT(AB8500_VPLLVANAREGU, 0x04, 0x06, 0x0f), 1917 REG_INIT(AB8500_VPLLVANAREGU, 0x04, 0x06, 0x0f),
585 /* 1918 /*
@@ -605,10 +1938,6 @@ static struct ab8500_reg_init ab8500_reg_init[] = {
605 */ 1938 */
606 REG_INIT(AB8500_VRF1VAUX3REGU, 0x04, 0x0a, 0x03), 1939 REG_INIT(AB8500_VRF1VAUX3REGU, 0x04, 0x0a, 0x03),
607 /* 1940 /*
608 * 0x3f, Vsmps1Sel1
609 */
610 REG_INIT(AB8500_VSMPS1SEL1, 0x04, 0x13, 0x3f),
611 /*
612 * 0x0f, Vaux1Sel 1941 * 0x0f, Vaux1Sel
613 */ 1942 */
614 REG_INIT(AB8500_VAUX1SEL, 0x04, 0x1f, 0x0f), 1943 REG_INIT(AB8500_VAUX1SEL, 0x04, 0x1f, 0x0f),
@@ -641,52 +1970,1073 @@ static struct ab8500_reg_init ab8500_reg_init[] = {
641 REG_INIT(AB8500_REGUCTRLDISCH2, 0x04, 0x44, 0x16), 1970 REG_INIT(AB8500_REGUCTRLDISCH2, 0x04, 0x44, 0x16),
642}; 1971};
643 1972
644static int 1973/* AB8505 register init */
645ab8500_regulator_init_registers(struct platform_device *pdev, int id, int value) 1974static struct ab8500_reg_init ab8505_reg_init[] = {
1975 /*
1976 * 0x03, VarmRequestCtrl
1977 * 0x0c, VsmpsCRequestCtrl
1978 * 0x30, VsmpsARequestCtrl
1979 * 0xc0, VsmpsBRequestCtrl
1980 */
1981 REG_INIT(AB8505_REGUREQUESTCTRL1, 0x03, 0x03, 0xff),
1982 /*
1983 * 0x03, VsafeRequestCtrl
1984 * 0x0c, VpllRequestCtrl
1985 * 0x30, VanaRequestCtrl
1986 */
1987 REG_INIT(AB8505_REGUREQUESTCTRL2, 0x03, 0x04, 0x3f),
1988 /*
1989 * 0x30, Vaux1RequestCtrl
1990 * 0xc0, Vaux2RequestCtrl
1991 */
1992 REG_INIT(AB8505_REGUREQUESTCTRL3, 0x03, 0x05, 0xf0),
1993 /*
1994 * 0x03, Vaux3RequestCtrl
1995 * 0x04, SwHPReq
1996 */
1997 REG_INIT(AB8505_REGUREQUESTCTRL4, 0x03, 0x06, 0x07),
1998 /*
1999 * 0x01, VsmpsASysClkReq1HPValid
2000 * 0x02, VsmpsBSysClkReq1HPValid
2001 * 0x04, VsafeSysClkReq1HPValid
2002 * 0x08, VanaSysClkReq1HPValid
2003 * 0x10, VpllSysClkReq1HPValid
2004 * 0x20, Vaux1SysClkReq1HPValid
2005 * 0x40, Vaux2SysClkReq1HPValid
2006 * 0x80, Vaux3SysClkReq1HPValid
2007 */
2008 REG_INIT(AB8505_REGUSYSCLKREQ1HPVALID1, 0x03, 0x07, 0xff),
2009 /*
2010 * 0x01, VsmpsCSysClkReq1HPValid
2011 * 0x02, VarmSysClkReq1HPValid
2012 * 0x04, VbbSysClkReq1HPValid
2013 * 0x08, VsmpsMSysClkReq1HPValid
2014 */
2015 REG_INIT(AB8505_REGUSYSCLKREQ1HPVALID2, 0x03, 0x08, 0x0f),
2016 /*
2017 * 0x01, VsmpsAHwHPReq1Valid
2018 * 0x02, VsmpsBHwHPReq1Valid
2019 * 0x04, VsafeHwHPReq1Valid
2020 * 0x08, VanaHwHPReq1Valid
2021 * 0x10, VpllHwHPReq1Valid
2022 * 0x20, Vaux1HwHPReq1Valid
2023 * 0x40, Vaux2HwHPReq1Valid
2024 * 0x80, Vaux3HwHPReq1Valid
2025 */
2026 REG_INIT(AB8505_REGUHWHPREQ1VALID1, 0x03, 0x09, 0xff),
2027 /*
2028 * 0x08, VsmpsMHwHPReq1Valid
2029 */
2030 REG_INIT(AB8505_REGUHWHPREQ1VALID2, 0x03, 0x0a, 0x08),
2031 /*
2032 * 0x01, VsmpsAHwHPReq2Valid
2033 * 0x02, VsmpsBHwHPReq2Valid
2034 * 0x04, VsafeHwHPReq2Valid
2035 * 0x08, VanaHwHPReq2Valid
2036 * 0x10, VpllHwHPReq2Valid
2037 * 0x20, Vaux1HwHPReq2Valid
2038 * 0x40, Vaux2HwHPReq2Valid
2039 * 0x80, Vaux3HwHPReq2Valid
2040 */
2041 REG_INIT(AB8505_REGUHWHPREQ2VALID1, 0x03, 0x0b, 0xff),
2042 /*
2043 * 0x08, VsmpsMHwHPReq2Valid
2044 */
2045 REG_INIT(AB8505_REGUHWHPREQ2VALID2, 0x03, 0x0c, 0x08),
2046 /*
2047 * 0x01, VsmpsCSwHPReqValid
2048 * 0x02, VarmSwHPReqValid
2049 * 0x04, VsmpsASwHPReqValid
2050 * 0x08, VsmpsBSwHPReqValid
2051 * 0x10, VsafeSwHPReqValid
2052 * 0x20, VanaSwHPReqValid
2053 * 0x40, VpllSwHPReqValid
2054 * 0x80, Vaux1SwHPReqValid
2055 */
2056 REG_INIT(AB8505_REGUSWHPREQVALID1, 0x03, 0x0d, 0xff),
2057 /*
2058 * 0x01, Vaux2SwHPReqValid
2059 * 0x02, Vaux3SwHPReqValid
2060 * 0x20, VsmpsMSwHPReqValid
2061 */
2062 REG_INIT(AB8505_REGUSWHPREQVALID2, 0x03, 0x0e, 0x23),
2063 /*
2064 * 0x02, SysClkReq2Valid1
2065 * 0x04, SysClkReq3Valid1
2066 * 0x08, SysClkReq4Valid1
2067 */
2068 REG_INIT(AB8505_REGUSYSCLKREQVALID1, 0x03, 0x0f, 0x0e),
2069 /*
2070 * 0x02, SysClkReq2Valid2
2071 * 0x04, SysClkReq3Valid2
2072 * 0x08, SysClkReq4Valid2
2073 */
2074 REG_INIT(AB8505_REGUSYSCLKREQVALID2, 0x03, 0x10, 0x0e),
2075 /*
2076 * 0x01, Vaux4SwHPReqValid
2077 * 0x02, Vaux4HwHPReq2Valid
2078 * 0x04, Vaux4HwHPReq1Valid
2079 * 0x08, Vaux4SysClkReq1HPValid
2080 */
2081 REG_INIT(AB8505_REGUVAUX4REQVALID, 0x03, 0x11, 0x0f),
2082 /*
2083 * 0x02, VadcEna
2084 * 0x04, VintCore12Ena
2085 * 0x38, VintCore12Sel
2086 * 0x40, VintCore12LP
2087 * 0x80, VadcLP
2088 */
2089 REG_INIT(AB8505_REGUMISC1, 0x03, 0x80, 0xfe),
2090 /*
2091 * 0x02, VaudioEna
2092 * 0x04, VdmicEna
2093 * 0x08, Vamic1Ena
2094 * 0x10, Vamic2Ena
2095 */
2096 REG_INIT(AB8505_VAUDIOSUPPLY, 0x03, 0x83, 0x1e),
2097 /*
2098 * 0x01, Vamic1_dzout
2099 * 0x02, Vamic2_dzout
2100 */
2101 REG_INIT(AB8505_REGUCTRL1VAMIC, 0x03, 0x84, 0x03),
2102 /*
2103 * 0x03, VsmpsARegu
2104 * 0x0c, VsmpsASelCtrl
2105 * 0x10, VsmpsAAutoMode
2106 * 0x20, VsmpsAPWMMode
2107 */
2108 REG_INIT(AB8505_VSMPSAREGU, 0x04, 0x03, 0x3f),
2109 /*
2110 * 0x03, VsmpsBRegu
2111 * 0x0c, VsmpsBSelCtrl
2112 * 0x10, VsmpsBAutoMode
2113 * 0x20, VsmpsBPWMMode
2114 */
2115 REG_INIT(AB8505_VSMPSBREGU, 0x04, 0x04, 0x3f),
2116 /*
2117 * 0x03, VsafeRegu
2118 * 0x0c, VsafeSelCtrl
2119 * 0x10, VsafeAutoMode
2120 * 0x20, VsafePWMMode
2121 */
2122 REG_INIT(AB8505_VSAFEREGU, 0x04, 0x05, 0x3f),
2123 /*
2124 * 0x03, VpllRegu (NOTE! PRCMU register bits)
2125 * 0x0c, VanaRegu
2126 */
2127 REG_INIT(AB8505_VPLLVANAREGU, 0x04, 0x06, 0x0f),
2128 /*
2129 * 0x03, VextSupply1Regu
2130 * 0x0c, VextSupply2Regu
2131 * 0x30, VextSupply3Regu
2132 * 0x40, ExtSupply2Bypass
2133 * 0x80, ExtSupply3Bypass
2134 */
2135 REG_INIT(AB8505_EXTSUPPLYREGU, 0x04, 0x08, 0xff),
2136 /*
2137 * 0x03, Vaux1Regu
2138 * 0x0c, Vaux2Regu
2139 */
2140 REG_INIT(AB8505_VAUX12REGU, 0x04, 0x09, 0x0f),
2141 /*
2142 * 0x0f, Vaux3Regu
2143 */
2144 REG_INIT(AB8505_VRF1VAUX3REGU, 0x04, 0x0a, 0x0f),
2145 /*
2146 * 0x3f, VsmpsASel1
2147 */
2148 REG_INIT(AB8505_VSMPSASEL1, 0x04, 0x13, 0x3f),
2149 /*
2150 * 0x3f, VsmpsASel2
2151 */
2152 REG_INIT(AB8505_VSMPSASEL2, 0x04, 0x14, 0x3f),
2153 /*
2154 * 0x3f, VsmpsASel3
2155 */
2156 REG_INIT(AB8505_VSMPSASEL3, 0x04, 0x15, 0x3f),
2157 /*
2158 * 0x3f, VsmpsBSel1
2159 */
2160 REG_INIT(AB8505_VSMPSBSEL1, 0x04, 0x17, 0x3f),
2161 /*
2162 * 0x3f, VsmpsBSel2
2163 */
2164 REG_INIT(AB8505_VSMPSBSEL2, 0x04, 0x18, 0x3f),
2165 /*
2166 * 0x3f, VsmpsBSel3
2167 */
2168 REG_INIT(AB8505_VSMPSBSEL3, 0x04, 0x19, 0x3f),
2169 /*
2170 * 0x7f, VsafeSel1
2171 */
2172 REG_INIT(AB8505_VSAFESEL1, 0x04, 0x1b, 0x7f),
2173 /*
2174 * 0x3f, VsafeSel2
2175 */
2176 REG_INIT(AB8505_VSAFESEL2, 0x04, 0x1c, 0x7f),
2177 /*
2178 * 0x3f, VsafeSel3
2179 */
2180 REG_INIT(AB8505_VSAFESEL3, 0x04, 0x1d, 0x7f),
2181 /*
2182 * 0x0f, Vaux1Sel
2183 */
2184 REG_INIT(AB8505_VAUX1SEL, 0x04, 0x1f, 0x0f),
2185 /*
2186 * 0x0f, Vaux2Sel
2187 */
2188 REG_INIT(AB8505_VAUX2SEL, 0x04, 0x20, 0x0f),
2189 /*
2190 * 0x07, Vaux3Sel
2191 * 0x30, VRF1Sel
2192 */
2193 REG_INIT(AB8505_VRF1VAUX3SEL, 0x04, 0x21, 0x37),
2194 /*
2195 * 0x03, Vaux4RequestCtrl
2196 */
2197 REG_INIT(AB8505_VAUX4REQCTRL, 0x04, 0x2d, 0x03),
2198 /*
2199 * 0x03, Vaux4Regu
2200 */
2201 REG_INIT(AB8505_VAUX4REGU, 0x04, 0x2e, 0x03),
2202 /*
2203 * 0x0f, Vaux4Sel
2204 */
2205 REG_INIT(AB8505_VAUX4SEL, 0x04, 0x2f, 0x0f),
2206 /*
2207 * 0x04, Vaux1Disch
2208 * 0x08, Vaux2Disch
2209 * 0x10, Vaux3Disch
2210 * 0x20, Vintcore12Disch
2211 * 0x40, VTVoutDisch
2212 * 0x80, VaudioDisch
2213 */
2214 REG_INIT(AB8505_REGUCTRLDISCH, 0x04, 0x43, 0xfc),
2215 /*
2216 * 0x02, VanaDisch
2217 * 0x04, VdmicPullDownEna
2218 * 0x10, VdmicDisch
2219 */
2220 REG_INIT(AB8505_REGUCTRLDISCH2, 0x04, 0x44, 0x16),
2221 /*
2222 * 0x01, Vaux4Disch
2223 */
2224 REG_INIT(AB8505_REGUCTRLDISCH3, 0x04, 0x48, 0x01),
2225 /*
2226 * 0x07, Vaux5Sel
2227 * 0x08, Vaux5LP
2228 * 0x10, Vaux5Ena
2229 * 0x20, Vaux5Disch
2230 * 0x40, Vaux5DisSfst
2231 * 0x80, Vaux5DisPulld
2232 */
2233 REG_INIT(AB8505_CTRLVAUX5, 0x01, 0x55, 0xff),
2234 /*
2235 * 0x07, Vaux6Sel
2236 * 0x08, Vaux6LP
2237 * 0x10, Vaux6Ena
2238 * 0x80, Vaux6DisPulld
2239 */
2240 REG_INIT(AB8505_CTRLVAUX6, 0x01, 0x56, 0x9f),
2241};
2242
2243/* AB9540 register init */
2244static struct ab8500_reg_init ab9540_reg_init[] = {
2245 /*
2246 * 0x03, VarmRequestCtrl
2247 * 0x0c, VapeRequestCtrl
2248 * 0x30, Vsmps1RequestCtrl
2249 * 0xc0, Vsmps2RequestCtrl
2250 */
2251 REG_INIT(AB9540_REGUREQUESTCTRL1, 0x03, 0x03, 0xff),
2252 /*
2253 * 0x03, Vsmps3RequestCtrl
2254 * 0x0c, VpllRequestCtrl
2255 * 0x30, VanaRequestCtrl
2256 * 0xc0, VextSupply1RequestCtrl
2257 */
2258 REG_INIT(AB9540_REGUREQUESTCTRL2, 0x03, 0x04, 0xff),
2259 /*
2260 * 0x03, VextSupply2RequestCtrl
2261 * 0x0c, VextSupply3RequestCtrl
2262 * 0x30, Vaux1RequestCtrl
2263 * 0xc0, Vaux2RequestCtrl
2264 */
2265 REG_INIT(AB9540_REGUREQUESTCTRL3, 0x03, 0x05, 0xff),
2266 /*
2267 * 0x03, Vaux3RequestCtrl
2268 * 0x04, SwHPReq
2269 */
2270 REG_INIT(AB9540_REGUREQUESTCTRL4, 0x03, 0x06, 0x07),
2271 /*
2272 * 0x01, Vsmps1SysClkReq1HPValid
2273 * 0x02, Vsmps2SysClkReq1HPValid
2274 * 0x04, Vsmps3SysClkReq1HPValid
2275 * 0x08, VanaSysClkReq1HPValid
2276 * 0x10, VpllSysClkReq1HPValid
2277 * 0x20, Vaux1SysClkReq1HPValid
2278 * 0x40, Vaux2SysClkReq1HPValid
2279 * 0x80, Vaux3SysClkReq1HPValid
2280 */
2281 REG_INIT(AB9540_REGUSYSCLKREQ1HPVALID1, 0x03, 0x07, 0xff),
2282 /*
2283 * 0x01, VapeSysClkReq1HPValid
2284 * 0x02, VarmSysClkReq1HPValid
2285 * 0x04, VbbSysClkReq1HPValid
2286 * 0x08, VmodSysClkReq1HPValid
2287 * 0x10, VextSupply1SysClkReq1HPValid
2288 * 0x20, VextSupply2SysClkReq1HPValid
2289 * 0x40, VextSupply3SysClkReq1HPValid
2290 */
2291 REG_INIT(AB9540_REGUSYSCLKREQ1HPVALID2, 0x03, 0x08, 0x7f),
2292 /*
2293 * 0x01, Vsmps1HwHPReq1Valid
2294 * 0x02, Vsmps2HwHPReq1Valid
2295 * 0x04, Vsmps3HwHPReq1Valid
2296 * 0x08, VanaHwHPReq1Valid
2297 * 0x10, VpllHwHPReq1Valid
2298 * 0x20, Vaux1HwHPReq1Valid
2299 * 0x40, Vaux2HwHPReq1Valid
2300 * 0x80, Vaux3HwHPReq1Valid
2301 */
2302 REG_INIT(AB9540_REGUHWHPREQ1VALID1, 0x03, 0x09, 0xff),
2303 /*
2304 * 0x01, VextSupply1HwHPReq1Valid
2305 * 0x02, VextSupply2HwHPReq1Valid
2306 * 0x04, VextSupply3HwHPReq1Valid
2307 * 0x08, VmodHwHPReq1Valid
2308 */
2309 REG_INIT(AB9540_REGUHWHPREQ1VALID2, 0x03, 0x0a, 0x0f),
2310 /*
2311 * 0x01, Vsmps1HwHPReq2Valid
2312 * 0x02, Vsmps2HwHPReq2Valid
2313 * 0x03, Vsmps3HwHPReq2Valid
2314 * 0x08, VanaHwHPReq2Valid
2315 * 0x10, VpllHwHPReq2Valid
2316 * 0x20, Vaux1HwHPReq2Valid
2317 * 0x40, Vaux2HwHPReq2Valid
2318 * 0x80, Vaux3HwHPReq2Valid
2319 */
2320 REG_INIT(AB9540_REGUHWHPREQ2VALID1, 0x03, 0x0b, 0xff),
2321 /*
2322 * 0x01, VextSupply1HwHPReq2Valid
2323 * 0x02, VextSupply2HwHPReq2Valid
2324 * 0x04, VextSupply3HwHPReq2Valid
2325 * 0x08, VmodHwHPReq2Valid
2326 */
2327 REG_INIT(AB9540_REGUHWHPREQ2VALID2, 0x03, 0x0c, 0x0f),
2328 /*
2329 * 0x01, VapeSwHPReqValid
2330 * 0x02, VarmSwHPReqValid
2331 * 0x04, Vsmps1SwHPReqValid
2332 * 0x08, Vsmps2SwHPReqValid
2333 * 0x10, Vsmps3SwHPReqValid
2334 * 0x20, VanaSwHPReqValid
2335 * 0x40, VpllSwHPReqValid
2336 * 0x80, Vaux1SwHPReqValid
2337 */
2338 REG_INIT(AB9540_REGUSWHPREQVALID1, 0x03, 0x0d, 0xff),
2339 /*
2340 * 0x01, Vaux2SwHPReqValid
2341 * 0x02, Vaux3SwHPReqValid
2342 * 0x04, VextSupply1SwHPReqValid
2343 * 0x08, VextSupply2SwHPReqValid
2344 * 0x10, VextSupply3SwHPReqValid
2345 * 0x20, VmodSwHPReqValid
2346 */
2347 REG_INIT(AB9540_REGUSWHPREQVALID2, 0x03, 0x0e, 0x3f),
2348 /*
2349 * 0x02, SysClkReq2Valid1
2350 * ...
2351 * 0x80, SysClkReq8Valid1
2352 */
2353 REG_INIT(AB9540_REGUSYSCLKREQVALID1, 0x03, 0x0f, 0xfe),
2354 /*
2355 * 0x02, SysClkReq2Valid2
2356 * ...
2357 * 0x80, SysClkReq8Valid2
2358 */
2359 REG_INIT(AB9540_REGUSYSCLKREQVALID2, 0x03, 0x10, 0xfe),
2360 /*
2361 * 0x01, Vaux4SwHPReqValid
2362 * 0x02, Vaux4HwHPReq2Valid
2363 * 0x04, Vaux4HwHPReq1Valid
2364 * 0x08, Vaux4SysClkReq1HPValid
2365 */
2366 REG_INIT(AB9540_REGUVAUX4REQVALID, 0x03, 0x11, 0x0f),
2367 /*
2368 * 0x02, VTVoutEna
2369 * 0x04, Vintcore12Ena
2370 * 0x38, Vintcore12Sel
2371 * 0x40, Vintcore12LP
2372 * 0x80, VTVoutLP
2373 */
2374 REG_INIT(AB9540_REGUMISC1, 0x03, 0x80, 0xfe),
2375 /*
2376 * 0x02, VaudioEna
2377 * 0x04, VdmicEna
2378 * 0x08, Vamic1Ena
2379 * 0x10, Vamic2Ena
2380 */
2381 REG_INIT(AB9540_VAUDIOSUPPLY, 0x03, 0x83, 0x1e),
2382 /*
2383 * 0x01, Vamic1_dzout
2384 * 0x02, Vamic2_dzout
2385 */
2386 REG_INIT(AB9540_REGUCTRL1VAMIC, 0x03, 0x84, 0x03),
2387 /*
2388 * 0x03, Vsmps1Regu
2389 * 0x0c, Vsmps1SelCtrl
2390 * 0x10, Vsmps1AutoMode
2391 * 0x20, Vsmps1PWMMode
2392 */
2393 REG_INIT(AB9540_VSMPS1REGU, 0x04, 0x03, 0x3f),
2394 /*
2395 * 0x03, Vsmps2Regu
2396 * 0x0c, Vsmps2SelCtrl
2397 * 0x10, Vsmps2AutoMode
2398 * 0x20, Vsmps2PWMMode
2399 */
2400 REG_INIT(AB9540_VSMPS2REGU, 0x04, 0x04, 0x3f),
2401 /*
2402 * 0x03, Vsmps3Regu
2403 * 0x0c, Vsmps3SelCtrl
2404 * NOTE! PRCMU register
2405 */
2406 REG_INIT(AB9540_VSMPS3REGU, 0x04, 0x05, 0x0f),
2407 /*
2408 * 0x03, VpllRegu
2409 * 0x0c, VanaRegu
2410 */
2411 REG_INIT(AB9540_VPLLVANAREGU, 0x04, 0x06, 0x0f),
2412 /*
2413 * 0x03, VextSupply1Regu
2414 * 0x0c, VextSupply2Regu
2415 * 0x30, VextSupply3Regu
2416 * 0x40, ExtSupply2Bypass
2417 * 0x80, ExtSupply3Bypass
2418 */
2419 REG_INIT(AB9540_EXTSUPPLYREGU, 0x04, 0x08, 0xff),
2420 /*
2421 * 0x03, Vaux1Regu
2422 * 0x0c, Vaux2Regu
2423 */
2424 REG_INIT(AB9540_VAUX12REGU, 0x04, 0x09, 0x0f),
2425 /*
2426 * 0x0c, Vrf1Regu
2427 * 0x03, Vaux3Regu
2428 */
2429 REG_INIT(AB9540_VRF1VAUX3REGU, 0x04, 0x0a, 0x0f),
2430 /*
2431 * 0x3f, Vsmps1Sel1
2432 */
2433 REG_INIT(AB9540_VSMPS1SEL1, 0x04, 0x13, 0x3f),
2434 /*
2435 * 0x3f, Vsmps1Sel2
2436 */
2437 REG_INIT(AB9540_VSMPS1SEL2, 0x04, 0x14, 0x3f),
2438 /*
2439 * 0x3f, Vsmps1Sel3
2440 */
2441 REG_INIT(AB9540_VSMPS1SEL3, 0x04, 0x15, 0x3f),
2442 /*
2443 * 0x3f, Vsmps2Sel1
2444 */
2445 REG_INIT(AB9540_VSMPS2SEL1, 0x04, 0x17, 0x3f),
2446 /*
2447 * 0x3f, Vsmps2Sel2
2448 */
2449 REG_INIT(AB9540_VSMPS2SEL2, 0x04, 0x18, 0x3f),
2450 /*
2451 * 0x3f, Vsmps2Sel3
2452 */
2453 REG_INIT(AB9540_VSMPS2SEL3, 0x04, 0x19, 0x3f),
2454 /*
2455 * 0x7f, Vsmps3Sel1
2456 * NOTE! PRCMU register
2457 */
2458 REG_INIT(AB9540_VSMPS3SEL1, 0x04, 0x1b, 0x7f),
2459 /*
2460 * 0x7f, Vsmps3Sel2
2461 * NOTE! PRCMU register
2462 */
2463 REG_INIT(AB9540_VSMPS3SEL2, 0x04, 0x1c, 0x7f),
2464 /*
2465 * 0x0f, Vaux1Sel
2466 */
2467 REG_INIT(AB9540_VAUX1SEL, 0x04, 0x1f, 0x0f),
2468 /*
2469 * 0x0f, Vaux2Sel
2470 */
2471 REG_INIT(AB9540_VAUX2SEL, 0x04, 0x20, 0x0f),
2472 /*
2473 * 0x07, Vaux3Sel
2474 * 0x30, Vrf1Sel
2475 */
2476 REG_INIT(AB9540_VRF1VAUX3SEL, 0x04, 0x21, 0x37),
2477 /*
2478 * 0x01, VextSupply12LP
2479 */
2480 REG_INIT(AB9540_REGUCTRL2SPARE, 0x04, 0x22, 0x01),
2481 /*
2482 * 0x03, Vaux4RequestCtrl
2483 */
2484 REG_INIT(AB9540_VAUX4REQCTRL, 0x04, 0x2d, 0x03),
2485 /*
2486 * 0x03, Vaux4Regu
2487 */
2488 REG_INIT(AB9540_VAUX4REGU, 0x04, 0x2e, 0x03),
2489 /*
2490 * 0x08, Vaux4Sel
2491 */
2492 REG_INIT(AB9540_VAUX4SEL, 0x04, 0x2f, 0x0f),
2493 /*
2494 * 0x01, VpllDisch
2495 * 0x02, Vrf1Disch
2496 * 0x04, Vaux1Disch
2497 * 0x08, Vaux2Disch
2498 * 0x10, Vaux3Disch
2499 * 0x20, Vintcore12Disch
2500 * 0x40, VTVoutDisch
2501 * 0x80, VaudioDisch
2502 */
2503 REG_INIT(AB9540_REGUCTRLDISCH, 0x04, 0x43, 0xff),
2504 /*
2505 * 0x01, VsimDisch
2506 * 0x02, VanaDisch
2507 * 0x04, VdmicPullDownEna
2508 * 0x08, VpllPullDownEna
2509 * 0x10, VdmicDisch
2510 */
2511 REG_INIT(AB9540_REGUCTRLDISCH2, 0x04, 0x44, 0x1f),
2512 /*
2513 * 0x01, Vaux4Disch
2514 */
2515 REG_INIT(AB9540_REGUCTRLDISCH3, 0x04, 0x48, 0x01),
2516};
2517
2518/* AB8540 register init */
2519static struct ab8500_reg_init ab8540_reg_init[] = {
2520 /*
2521 * 0x01, VSimSycClkReq1Valid
2522 * 0x02, VSimSycClkReq2Valid
2523 * 0x04, VSimSycClkReq3Valid
2524 * 0x08, VSimSycClkReq4Valid
2525 * 0x10, VSimSycClkReq5Valid
2526 * 0x20, VSimSycClkReq6Valid
2527 * 0x40, VSimSycClkReq7Valid
2528 * 0x80, VSimSycClkReq8Valid
2529 */
2530 REG_INIT(AB8540_VSIMSYSCLKCTRL, 0x02, 0x33, 0xff),
2531 /*
2532 * 0x03, VarmRequestCtrl
2533 * 0x0c, VapeRequestCtrl
2534 * 0x30, Vsmps1RequestCtrl
2535 * 0xc0, Vsmps2RequestCtrl
2536 */
2537 REG_INIT(AB8540_REGUREQUESTCTRL1, 0x03, 0x03, 0xff),
2538 /*
2539 * 0x03, Vsmps3RequestCtrl
2540 * 0x0c, VpllRequestCtrl
2541 * 0x30, VanaRequestCtrl
2542 * 0xc0, VextSupply1RequestCtrl
2543 */
2544 REG_INIT(AB8540_REGUREQUESTCTRL2, 0x03, 0x04, 0xff),
2545 /*
2546 * 0x03, VextSupply2RequestCtrl
2547 * 0x0c, VextSupply3RequestCtrl
2548 * 0x30, Vaux1RequestCtrl
2549 * 0xc0, Vaux2RequestCtrl
2550 */
2551 REG_INIT(AB8540_REGUREQUESTCTRL3, 0x03, 0x05, 0xff),
2552 /*
2553 * 0x03, Vaux3RequestCtrl
2554 * 0x04, SwHPReq
2555 */
2556 REG_INIT(AB8540_REGUREQUESTCTRL4, 0x03, 0x06, 0x07),
2557 /*
2558 * 0x01, Vsmps1SysClkReq1HPValid
2559 * 0x02, Vsmps2SysClkReq1HPValid
2560 * 0x04, Vsmps3SysClkReq1HPValid
2561 * 0x08, VanaSysClkReq1HPValid
2562 * 0x10, VpllSysClkReq1HPValid
2563 * 0x20, Vaux1SysClkReq1HPValid
2564 * 0x40, Vaux2SysClkReq1HPValid
2565 * 0x80, Vaux3SysClkReq1HPValid
2566 */
2567 REG_INIT(AB8540_REGUSYSCLKREQ1HPVALID1, 0x03, 0x07, 0xff),
2568 /*
2569 * 0x01, VapeSysClkReq1HPValid
2570 * 0x02, VarmSysClkReq1HPValid
2571 * 0x04, VbbSysClkReq1HPValid
2572 * 0x10, VextSupply1SysClkReq1HPValid
2573 * 0x20, VextSupply2SysClkReq1HPValid
2574 * 0x40, VextSupply3SysClkReq1HPValid
2575 */
2576 REG_INIT(AB8540_REGUSYSCLKREQ1HPVALID2, 0x03, 0x08, 0x77),
2577 /*
2578 * 0x01, Vsmps1HwHPReq1Valid
2579 * 0x02, Vsmps2HwHPReq1Valid
2580 * 0x04, Vsmps3HwHPReq1Valid
2581 * 0x08, VanaHwHPReq1Valid
2582 * 0x10, VpllHwHPReq1Valid
2583 * 0x20, Vaux1HwHPReq1Valid
2584 * 0x40, Vaux2HwHPReq1Valid
2585 * 0x80, Vaux3HwHPReq1Valid
2586 */
2587 REG_INIT(AB8540_REGUHWHPREQ1VALID1, 0x03, 0x09, 0xff),
2588 /*
2589 * 0x01, VextSupply1HwHPReq1Valid
2590 * 0x02, VextSupply2HwHPReq1Valid
2591 * 0x04, VextSupply3HwHPReq1Valid
2592 */
2593 REG_INIT(AB8540_REGUHWHPREQ1VALID2, 0x03, 0x0a, 0x07),
2594 /*
2595 * 0x01, Vsmps1HwHPReq2Valid
2596 * 0x02, Vsmps2HwHPReq2Valid
2597 * 0x03, Vsmps3HwHPReq2Valid
2598 * 0x08, VanaHwHPReq2Valid
2599 * 0x10, VpllHwHPReq2Valid
2600 * 0x20, Vaux1HwHPReq2Valid
2601 * 0x40, Vaux2HwHPReq2Valid
2602 * 0x80, Vaux3HwHPReq2Valid
2603 */
2604 REG_INIT(AB8540_REGUHWHPREQ2VALID1, 0x03, 0x0b, 0xff),
2605 /*
2606 * 0x01, VextSupply1HwHPReq2Valid
2607 * 0x02, VextSupply2HwHPReq2Valid
2608 * 0x04, VextSupply3HwHPReq2Valid
2609 */
2610 REG_INIT(AB8540_REGUHWHPREQ2VALID2, 0x03, 0x0c, 0x07),
2611 /*
2612 * 0x01, VapeSwHPReqValid
2613 * 0x02, VarmSwHPReqValid
2614 * 0x04, Vsmps1SwHPReqValid
2615 * 0x08, Vsmps2SwHPReqValid
2616 * 0x10, Vsmps3SwHPReqValid
2617 * 0x20, VanaSwHPReqValid
2618 * 0x40, VpllSwHPReqValid
2619 * 0x80, Vaux1SwHPReqValid
2620 */
2621 REG_INIT(AB8540_REGUSWHPREQVALID1, 0x03, 0x0d, 0xff),
2622 /*
2623 * 0x01, Vaux2SwHPReqValid
2624 * 0x02, Vaux3SwHPReqValid
2625 * 0x04, VextSupply1SwHPReqValid
2626 * 0x08, VextSupply2SwHPReqValid
2627 * 0x10, VextSupply3SwHPReqValid
2628 */
2629 REG_INIT(AB8540_REGUSWHPREQVALID2, 0x03, 0x0e, 0x1f),
2630 /*
2631 * 0x02, SysClkReq2Valid1
2632 * ...
2633 * 0x80, SysClkReq8Valid1
2634 */
2635 REG_INIT(AB8540_REGUSYSCLKREQVALID1, 0x03, 0x0f, 0xff),
2636 /*
2637 * 0x02, SysClkReq2Valid2
2638 * ...
2639 * 0x80, SysClkReq8Valid2
2640 */
2641 REG_INIT(AB8540_REGUSYSCLKREQVALID2, 0x03, 0x10, 0xff),
2642 /*
2643 * 0x01, Vaux4SwHPReqValid
2644 * 0x02, Vaux4HwHPReq2Valid
2645 * 0x04, Vaux4HwHPReq1Valid
2646 * 0x08, Vaux4SysClkReq1HPValid
2647 */
2648 REG_INIT(AB8540_REGUVAUX4REQVALID, 0x03, 0x11, 0x0f),
2649 /*
2650 * 0x01, Vaux5SwHPReqValid
2651 * 0x02, Vaux5HwHPReq2Valid
2652 * 0x04, Vaux5HwHPReq1Valid
2653 * 0x08, Vaux5SysClkReq1HPValid
2654 */
2655 REG_INIT(AB8540_REGUVAUX5REQVALID, 0x03, 0x12, 0x0f),
2656 /*
2657 * 0x01, Vaux6SwHPReqValid
2658 * 0x02, Vaux6HwHPReq2Valid
2659 * 0x04, Vaux6HwHPReq1Valid
2660 * 0x08, Vaux6SysClkReq1HPValid
2661 */
2662 REG_INIT(AB8540_REGUVAUX6REQVALID, 0x03, 0x13, 0x0f),
2663 /*
2664 * 0x01, VclkbSwHPReqValid
2665 * 0x02, VclkbHwHPReq2Valid
2666 * 0x04, VclkbHwHPReq1Valid
2667 * 0x08, VclkbSysClkReq1HPValid
2668 */
2669 REG_INIT(AB8540_REGUVCLKBREQVALID, 0x03, 0x14, 0x0f),
2670 /*
2671 * 0x01, Vrf1SwHPReqValid
2672 * 0x02, Vrf1HwHPReq2Valid
2673 * 0x04, Vrf1HwHPReq1Valid
2674 * 0x08, Vrf1SysClkReq1HPValid
2675 */
2676 REG_INIT(AB8540_REGUVRF1REQVALID, 0x03, 0x15, 0x0f),
2677 /*
2678 * 0x02, VTVoutEna
2679 * 0x04, Vintcore12Ena
2680 * 0x38, Vintcore12Sel
2681 * 0x40, Vintcore12LP
2682 * 0x80, VTVoutLP
2683 */
2684 REG_INIT(AB8540_REGUMISC1, 0x03, 0x80, 0xfe),
2685 /*
2686 * 0x02, VaudioEna
2687 * 0x04, VdmicEna
2688 * 0x08, Vamic1Ena
2689 * 0x10, Vamic2Ena
2690 * 0x20, Vamic12LP
2691 * 0xC0, VdmicSel
2692 */
2693 REG_INIT(AB8540_VAUDIOSUPPLY, 0x03, 0x83, 0xfe),
2694 /*
2695 * 0x01, Vamic1_dzout
2696 * 0x02, Vamic2_dzout
2697 */
2698 REG_INIT(AB8540_REGUCTRL1VAMIC, 0x03, 0x84, 0x03),
2699 /*
2700 * 0x07, VHSICSel
2701 * 0x08, VHSICOffState
2702 * 0x10, VHSIEna
2703 * 0x20, VHSICLP
2704 */
2705 REG_INIT(AB8540_VHSIC, 0x03, 0x87, 0x3f),
2706 /*
2707 * 0x07, VSDIOSel
2708 * 0x08, VSDIOOffState
2709 * 0x10, VSDIOEna
2710 * 0x20, VSDIOLP
2711 */
2712 REG_INIT(AB8540_VSDIO, 0x03, 0x88, 0x3f),
2713 /*
2714 * 0x03, Vsmps1Regu
2715 * 0x0c, Vsmps1SelCtrl
2716 * 0x10, Vsmps1AutoMode
2717 * 0x20, Vsmps1PWMMode
2718 */
2719 REG_INIT(AB8540_VSMPS1REGU, 0x04, 0x03, 0x3f),
2720 /*
2721 * 0x03, Vsmps2Regu
2722 * 0x0c, Vsmps2SelCtrl
2723 * 0x10, Vsmps2AutoMode
2724 * 0x20, Vsmps2PWMMode
2725 */
2726 REG_INIT(AB8540_VSMPS2REGU, 0x04, 0x04, 0x3f),
2727 /*
2728 * 0x03, Vsmps3Regu
2729 * 0x0c, Vsmps3SelCtrl
2730 * 0x10, Vsmps3AutoMode
2731 * 0x20, Vsmps3PWMMode
2732 * NOTE! PRCMU register
2733 */
2734 REG_INIT(AB8540_VSMPS3REGU, 0x04, 0x05, 0x0f),
2735 /*
2736 * 0x03, VpllRegu
2737 * 0x0c, VanaRegu
2738 */
2739 REG_INIT(AB8540_VPLLVANAREGU, 0x04, 0x06, 0x0f),
2740 /*
2741 * 0x03, VextSupply1Regu
2742 * 0x0c, VextSupply2Regu
2743 * 0x30, VextSupply3Regu
2744 * 0x40, ExtSupply2Bypass
2745 * 0x80, ExtSupply3Bypass
2746 */
2747 REG_INIT(AB8540_EXTSUPPLYREGU, 0x04, 0x08, 0xff),
2748 /*
2749 * 0x03, Vaux1Regu
2750 * 0x0c, Vaux2Regu
2751 */
2752 REG_INIT(AB8540_VAUX12REGU, 0x04, 0x09, 0x0f),
2753 /*
2754 * 0x0c, VRF1Regu
2755 * 0x03, Vaux3Regu
2756 */
2757 REG_INIT(AB8540_VRF1VAUX3REGU, 0x04, 0x0a, 0x0f),
2758 /*
2759 * 0x3f, Vsmps1Sel1
2760 */
2761 REG_INIT(AB8540_VSMPS1SEL1, 0x04, 0x13, 0x3f),
2762 /*
2763 * 0x3f, Vsmps1Sel2
2764 */
2765 REG_INIT(AB8540_VSMPS1SEL2, 0x04, 0x14, 0x3f),
2766 /*
2767 * 0x3f, Vsmps1Sel3
2768 */
2769 REG_INIT(AB8540_VSMPS1SEL3, 0x04, 0x15, 0x3f),
2770 /*
2771 * 0x3f, Vsmps2Sel1
2772 */
2773 REG_INIT(AB8540_VSMPS2SEL1, 0x04, 0x17, 0x3f),
2774 /*
2775 * 0x3f, Vsmps2Sel2
2776 */
2777 REG_INIT(AB8540_VSMPS2SEL2, 0x04, 0x18, 0x3f),
2778 /*
2779 * 0x3f, Vsmps2Sel3
2780 */
2781 REG_INIT(AB8540_VSMPS2SEL3, 0x04, 0x19, 0x3f),
2782 /*
2783 * 0x7f, Vsmps3Sel1
2784 * NOTE! PRCMU register
2785 */
2786 REG_INIT(AB8540_VSMPS3SEL1, 0x04, 0x1b, 0x7f),
2787 /*
2788 * 0x7f, Vsmps3Sel2
2789 * NOTE! PRCMU register
2790 */
2791 REG_INIT(AB8540_VSMPS3SEL2, 0x04, 0x1c, 0x7f),
2792 /*
2793 * 0x0f, Vaux1Sel
2794 */
2795 REG_INIT(AB8540_VAUX1SEL, 0x04, 0x1f, 0x0f),
2796 /*
2797 * 0x0f, Vaux2Sel
2798 */
2799 REG_INIT(AB8540_VAUX2SEL, 0x04, 0x20, 0x0f),
2800 /*
2801 * 0x07, Vaux3Sel
2802 * 0x70, Vrf1Sel
2803 */
2804 REG_INIT(AB8540_VRF1VAUX3SEL, 0x04, 0x21, 0x77),
2805 /*
2806 * 0x01, VextSupply12LP
2807 */
2808 REG_INIT(AB8540_REGUCTRL2SPARE, 0x04, 0x22, 0x01),
2809 /*
2810 * 0x07, Vanasel
2811 * 0x30, Vpllsel
2812 */
2813 REG_INIT(AB8540_VANAVPLLSEL, 0x04, 0x29, 0x37),
2814 /*
2815 * 0x03, Vaux4RequestCtrl
2816 */
2817 REG_INIT(AB8540_VAUX4REQCTRL, 0x04, 0x2d, 0x03),
2818 /*
2819 * 0x03, Vaux4Regu
2820 */
2821 REG_INIT(AB8540_VAUX4REGU, 0x04, 0x2e, 0x03),
2822 /*
2823 * 0x0f, Vaux4Sel
2824 */
2825 REG_INIT(AB8540_VAUX4SEL, 0x04, 0x2f, 0x0f),
2826 /*
2827 * 0x03, Vaux5RequestCtrl
2828 */
2829 REG_INIT(AB8540_VAUX5REQCTRL, 0x04, 0x31, 0x03),
2830 /*
2831 * 0x03, Vaux5Regu
2832 */
2833 REG_INIT(AB8540_VAUX5REGU, 0x04, 0x32, 0x03),
2834 /*
2835 * 0x3f, Vaux5Sel
2836 */
2837 REG_INIT(AB8540_VAUX5SEL, 0x04, 0x33, 0x3f),
2838 /*
2839 * 0x03, Vaux6RequestCtrl
2840 */
2841 REG_INIT(AB8540_VAUX6REQCTRL, 0x04, 0x34, 0x03),
2842 /*
2843 * 0x03, Vaux6Regu
2844 */
2845 REG_INIT(AB8540_VAUX6REGU, 0x04, 0x35, 0x03),
2846 /*
2847 * 0x3f, Vaux6Sel
2848 */
2849 REG_INIT(AB8540_VAUX6SEL, 0x04, 0x36, 0x3f),
2850 /*
2851 * 0x03, VCLKBRequestCtrl
2852 */
2853 REG_INIT(AB8540_VCLKBREQCTRL, 0x04, 0x37, 0x03),
2854 /*
2855 * 0x03, VCLKBRegu
2856 */
2857 REG_INIT(AB8540_VCLKBREGU, 0x04, 0x38, 0x03),
2858 /*
2859 * 0x07, VCLKBSel
2860 */
2861 REG_INIT(AB8540_VCLKBSEL, 0x04, 0x39, 0x07),
2862 /*
2863 * 0x03, Vrf1RequestCtrl
2864 */
2865 REG_INIT(AB8540_VRF1REQCTRL, 0x04, 0x3a, 0x03),
2866 /*
2867 * 0x01, VpllDisch
2868 * 0x02, Vrf1Disch
2869 * 0x04, Vaux1Disch
2870 * 0x08, Vaux2Disch
2871 * 0x10, Vaux3Disch
2872 * 0x20, Vintcore12Disch
2873 * 0x40, VTVoutDisch
2874 * 0x80, VaudioDisch
2875 */
2876 REG_INIT(AB8540_REGUCTRLDISCH, 0x04, 0x43, 0xff),
2877 /*
2878 * 0x02, VanaDisch
2879 * 0x04, VdmicPullDownEna
2880 * 0x08, VpllPullDownEna
2881 * 0x10, VdmicDisch
2882 */
2883 REG_INIT(AB8540_REGUCTRLDISCH2, 0x04, 0x44, 0x1e),
2884 /*
2885 * 0x01, Vaux4Disch
2886 */
2887 REG_INIT(AB8540_REGUCTRLDISCH3, 0x04, 0x48, 0x01),
2888 /*
2889 * 0x01, Vaux5Disch
2890 * 0x02, Vaux6Disch
2891 * 0x04, VCLKBDisch
2892 */
2893 REG_INIT(AB8540_REGUCTRLDISCH4, 0x04, 0x49, 0x07),
2894};
2895
2896static struct of_regulator_match ab8500_regulator_match[] = {
2897 { .name = "ab8500_ldo_aux1", .driver_data = (void *) AB8500_LDO_AUX1, },
2898 { .name = "ab8500_ldo_aux2", .driver_data = (void *) AB8500_LDO_AUX2, },
2899 { .name = "ab8500_ldo_aux3", .driver_data = (void *) AB8500_LDO_AUX3, },
2900 { .name = "ab8500_ldo_intcore", .driver_data = (void *) AB8500_LDO_INTCORE, },
2901 { .name = "ab8500_ldo_tvout", .driver_data = (void *) AB8500_LDO_TVOUT, },
2902 { .name = "ab8500_ldo_audio", .driver_data = (void *) AB8500_LDO_AUDIO, },
2903 { .name = "ab8500_ldo_anamic1", .driver_data = (void *) AB8500_LDO_ANAMIC1, },
2904 { .name = "ab8500_ldo_amamic2", .driver_data = (void *) AB8500_LDO_ANAMIC2, },
2905 { .name = "ab8500_ldo_dmic", .driver_data = (void *) AB8500_LDO_DMIC, },
2906 { .name = "ab8500_ldo_ana", .driver_data = (void *) AB8500_LDO_ANA, },
2907};
2908
2909static struct of_regulator_match ab8505_regulator_match[] = {
2910 { .name = "ab8500_ldo_aux1", .driver_data = (void *) AB8505_LDO_AUX1, },
2911 { .name = "ab8500_ldo_aux2", .driver_data = (void *) AB8505_LDO_AUX2, },
2912 { .name = "ab8500_ldo_aux3", .driver_data = (void *) AB8505_LDO_AUX3, },
2913 { .name = "ab8500_ldo_aux4", .driver_data = (void *) AB8505_LDO_AUX4, },
2914 { .name = "ab8500_ldo_aux5", .driver_data = (void *) AB8505_LDO_AUX5, },
2915 { .name = "ab8500_ldo_aux6", .driver_data = (void *) AB8505_LDO_AUX6, },
2916 { .name = "ab8500_ldo_intcore", .driver_data = (void *) AB8505_LDO_INTCORE, },
2917 { .name = "ab8500_ldo_adc", .driver_data = (void *) AB8505_LDO_ADC, },
2918 { .name = "ab8500_ldo_audio", .driver_data = (void *) AB8505_LDO_AUDIO, },
2919 { .name = "ab8500_ldo_anamic1", .driver_data = (void *) AB8505_LDO_ANAMIC1, },
2920 { .name = "ab8500_ldo_amamic2", .driver_data = (void *) AB8505_LDO_ANAMIC2, },
2921 { .name = "ab8500_ldo_aux8", .driver_data = (void *) AB8505_LDO_AUX8, },
2922 { .name = "ab8500_ldo_ana", .driver_data = (void *) AB8505_LDO_ANA, },
2923};
2924
2925static struct of_regulator_match ab8540_regulator_match[] = {
2926 { .name = "ab8500_ldo_aux1", .driver_data = (void *) AB8540_LDO_AUX1, },
2927 { .name = "ab8500_ldo_aux2", .driver_data = (void *) AB8540_LDO_AUX2, },
2928 { .name = "ab8500_ldo_aux3", .driver_data = (void *) AB8540_LDO_AUX3, },
2929 { .name = "ab8500_ldo_aux4", .driver_data = (void *) AB8540_LDO_AUX4, },
2930 { .name = "ab8500_ldo_aux5", .driver_data = (void *) AB8540_LDO_AUX5, },
2931 { .name = "ab8500_ldo_aux6", .driver_data = (void *) AB8540_LDO_AUX6, },
2932 { .name = "ab8500_ldo_intcore", .driver_data = (void *) AB8540_LDO_INTCORE, },
2933 { .name = "ab8500_ldo_tvout", .driver_data = (void *) AB8540_LDO_TVOUT, },
2934 { .name = "ab8500_ldo_audio", .driver_data = (void *) AB8540_LDO_AUDIO, },
2935 { .name = "ab8500_ldo_anamic1", .driver_data = (void *) AB8540_LDO_ANAMIC1, },
2936 { .name = "ab8500_ldo_amamic2", .driver_data = (void *) AB8540_LDO_ANAMIC2, },
2937 { .name = "ab8500_ldo_dmic", .driver_data = (void *) AB8540_LDO_DMIC, },
2938 { .name = "ab8500_ldo_ana", .driver_data = (void *) AB8540_LDO_ANA, },
2939 { .name = "ab8500_ldo_sdio", .driver_data = (void *) AB8540_LDO_SDIO, },
2940};
2941
2942static struct of_regulator_match ab9540_regulator_match[] = {
2943 { .name = "ab8500_ldo_aux1", .driver_data = (void *) AB9540_LDO_AUX1, },
2944 { .name = "ab8500_ldo_aux2", .driver_data = (void *) AB9540_LDO_AUX2, },
2945 { .name = "ab8500_ldo_aux3", .driver_data = (void *) AB9540_LDO_AUX3, },
2946 { .name = "ab8500_ldo_aux4", .driver_data = (void *) AB9540_LDO_AUX4, },
2947 { .name = "ab8500_ldo_intcore", .driver_data = (void *) AB9540_LDO_INTCORE, },
2948 { .name = "ab8500_ldo_tvout", .driver_data = (void *) AB9540_LDO_TVOUT, },
2949 { .name = "ab8500_ldo_audio", .driver_data = (void *) AB9540_LDO_AUDIO, },
2950 { .name = "ab8500_ldo_anamic1", .driver_data = (void *) AB9540_LDO_ANAMIC1, },
2951 { .name = "ab8500_ldo_amamic2", .driver_data = (void *) AB9540_LDO_ANAMIC2, },
2952 { .name = "ab8500_ldo_dmic", .driver_data = (void *) AB9540_LDO_DMIC, },
2953 { .name = "ab8500_ldo_ana", .driver_data = (void *) AB9540_LDO_ANA, },
2954};
2955
2956static struct {
2957 struct ab8500_regulator_info *info;
2958 int info_size;
2959 struct ab8500_reg_init *init;
2960 int init_size;
2961 struct of_regulator_match *match;
2962 int match_size;
2963} abx500_regulator;
2964
2965static void abx500_get_regulator_info(struct ab8500 *ab8500)
2966{
2967 if (is_ab9540(ab8500)) {
2968 abx500_regulator.info = ab9540_regulator_info;
2969 abx500_regulator.info_size = ARRAY_SIZE(ab9540_regulator_info);
2970 abx500_regulator.init = ab9540_reg_init;
2971 abx500_regulator.init_size = AB9540_NUM_REGULATOR_REGISTERS;
2972 abx500_regulator.match = ab9540_regulator_match;
2973 abx500_regulator.match_size = ARRAY_SIZE(ab9540_regulator_match);
2974 } else if (is_ab8505(ab8500)) {
2975 abx500_regulator.info = ab8505_regulator_info;
2976 abx500_regulator.info_size = ARRAY_SIZE(ab8505_regulator_info);
2977 abx500_regulator.init = ab8505_reg_init;
2978 abx500_regulator.init_size = AB8505_NUM_REGULATOR_REGISTERS;
2979 abx500_regulator.match = ab8505_regulator_match;
2980 abx500_regulator.match_size = ARRAY_SIZE(ab8505_regulator_match);
2981 } else if (is_ab8540(ab8500)) {
2982 abx500_regulator.info = ab8540_regulator_info;
2983 abx500_regulator.info_size = ARRAY_SIZE(ab8540_regulator_info);
2984 abx500_regulator.init = ab8540_reg_init;
2985 abx500_regulator.init_size = AB8540_NUM_REGULATOR_REGISTERS;
2986 abx500_regulator.match = ab8540_regulator_match;
2987 abx500_regulator.match_size = ARRAY_SIZE(ab8540_regulator_match);
2988 } else {
2989 abx500_regulator.info = ab8500_regulator_info;
2990 abx500_regulator.info_size = ARRAY_SIZE(ab8500_regulator_info);
2991 abx500_regulator.init = ab8500_reg_init;
2992 abx500_regulator.init_size = AB8500_NUM_REGULATOR_REGISTERS;
2993 abx500_regulator.match = ab8500_regulator_match;
2994 abx500_regulator.match_size = ARRAY_SIZE(ab8500_regulator_match);
2995 }
2996}
2997
2998static int ab8500_regulator_init_registers(struct platform_device *pdev,
2999 int id, int mask, int value)
646{ 3000{
3001 struct ab8500_reg_init *reg_init = abx500_regulator.init;
647 int err; 3002 int err;
648 3003
649 if (value & ~ab8500_reg_init[id].mask) { 3004 BUG_ON(value & ~mask);
650 dev_err(&pdev->dev, 3005 BUG_ON(mask & ~reg_init[id].mask);
651 "Configuration error: value outside mask.\n");
652 return -EINVAL;
653 }
654 3006
3007 /* initialize register */
655 err = abx500_mask_and_set_register_interruptible( 3008 err = abx500_mask_and_set_register_interruptible(
656 &pdev->dev, 3009 &pdev->dev,
657 ab8500_reg_init[id].bank, 3010 reg_init[id].bank,
658 ab8500_reg_init[id].addr, 3011 reg_init[id].addr,
659 ab8500_reg_init[id].mask, 3012 mask, value);
660 value);
661 if (err < 0) { 3013 if (err < 0) {
662 dev_err(&pdev->dev, 3014 dev_err(&pdev->dev,
663 "Failed to initialize 0x%02x, 0x%02x.\n", 3015 "Failed to initialize 0x%02x, 0x%02x.\n",
664 ab8500_reg_init[id].bank, 3016 reg_init[id].bank,
665 ab8500_reg_init[id].addr); 3017 reg_init[id].addr);
666 return err; 3018 return err;
667 } 3019 }
668
669 dev_vdbg(&pdev->dev, 3020 dev_vdbg(&pdev->dev,
670 "init: 0x%02x, 0x%02x, 0x%02x, 0x%02x\n", 3021 " init: 0x%02x, 0x%02x, 0x%02x, 0x%02x\n",
671 ab8500_reg_init[id].bank, 3022 reg_init[id].bank,
672 ab8500_reg_init[id].addr, 3023 reg_init[id].addr,
673 ab8500_reg_init[id].mask, 3024 mask, value);
674 value);
675 3025
676 return 0; 3026 return 0;
677} 3027}
678 3028
679static int ab8500_regulator_register(struct platform_device *pdev, 3029static int ab8500_regulator_register(struct platform_device *pdev,
680 struct regulator_init_data *init_data, 3030 struct regulator_init_data *init_data,
681 int id, 3031 int id, struct device_node *np)
682 struct device_node *np)
683{ 3032{
3033 struct ab8500 *ab8500 = dev_get_drvdata(pdev->dev.parent);
684 struct ab8500_regulator_info *info = NULL; 3034 struct ab8500_regulator_info *info = NULL;
685 struct regulator_config config = { }; 3035 struct regulator_config config = { };
686 int err; 3036 int err;
687 3037
688 /* assign per-regulator data */ 3038 /* assign per-regulator data */
689 info = &ab8500_regulator_info[id]; 3039 info = &abx500_regulator.info[id];
690 info->dev = &pdev->dev; 3040 info->dev = &pdev->dev;
691 3041
692 config.dev = &pdev->dev; 3042 config.dev = &pdev->dev;
@@ -695,7 +3045,7 @@ static int ab8500_regulator_register(struct platform_device *pdev,
695 config.of_node = np; 3045 config.of_node = np;
696 3046
697 /* fix for hardware before ab8500v2.0 */ 3047 /* fix for hardware before ab8500v2.0 */
698 if (abx500_get_chip_id(info->dev) < 0x20) { 3048 if (is_ab8500_1p1_or_earlier(ab8500)) {
699 if (info->desc.id == AB8500_LDO_AUX3) { 3049 if (info->desc.id == AB8500_LDO_AUX3) {
700 info->desc.n_voltages = 3050 info->desc.n_voltages =
701 ARRAY_SIZE(ldo_vauxn_voltages); 3051 ARRAY_SIZE(ldo_vauxn_voltages);
@@ -712,7 +3062,7 @@ static int ab8500_regulator_register(struct platform_device *pdev,
712 info->desc.name); 3062 info->desc.name);
713 /* when we fail, un-register all earlier regulators */ 3063 /* when we fail, un-register all earlier regulators */
714 while (--id >= 0) { 3064 while (--id >= 0) {
715 info = &ab8500_regulator_info[id]; 3065 info = &abx500_regulator.info[id];
716 regulator_unregister(info->regulator); 3066 regulator_unregister(info->regulator);
717 } 3067 }
718 return err; 3068 return err;
@@ -721,29 +3071,16 @@ static int ab8500_regulator_register(struct platform_device *pdev,
721 return 0; 3071 return 0;
722} 3072}
723 3073
724static struct of_regulator_match ab8500_regulator_matches[] = {
725 { .name = "ab8500_ldo_aux1", .driver_data = (void *) AB8500_LDO_AUX1, },
726 { .name = "ab8500_ldo_aux2", .driver_data = (void *) AB8500_LDO_AUX2, },
727 { .name = "ab8500_ldo_aux3", .driver_data = (void *) AB8500_LDO_AUX3, },
728 { .name = "ab8500_ldo_intcore", .driver_data = (void *) AB8500_LDO_INTCORE, },
729 { .name = "ab8500_ldo_tvout", .driver_data = (void *) AB8500_LDO_TVOUT, },
730 { .name = "ab8500_ldo_usb", .driver_data = (void *) AB8500_LDO_USB, },
731 { .name = "ab8500_ldo_audio", .driver_data = (void *) AB8500_LDO_AUDIO, },
732 { .name = "ab8500_ldo_anamic1", .driver_data = (void *) AB8500_LDO_ANAMIC1, },
733 { .name = "ab8500_ldo_amamic2", .driver_data = (void *) AB8500_LDO_ANAMIC2, },
734 { .name = "ab8500_ldo_dmic", .driver_data = (void *) AB8500_LDO_DMIC, },
735 { .name = "ab8500_ldo_ana", .driver_data = (void *) AB8500_LDO_ANA, },
736};
737
738static int 3074static int
739ab8500_regulator_of_probe(struct platform_device *pdev, struct device_node *np) 3075ab8500_regulator_of_probe(struct platform_device *pdev,
3076 struct device_node *np)
740{ 3077{
3078 struct of_regulator_match *match = abx500_regulator.match;
741 int err, i; 3079 int err, i;
742 3080
743 for (i = 0; i < ARRAY_SIZE(ab8500_regulator_info); i++) { 3081 for (i = 0; i < abx500_regulator.info_size; i++) {
744 err = ab8500_regulator_register( 3082 err = ab8500_regulator_register(
745 pdev, ab8500_regulator_matches[i].init_data, 3083 pdev, match[i].init_data, i, match[i].of_node);
746 i, ab8500_regulator_matches[i].of_node);
747 if (err) 3084 if (err)
748 return err; 3085 return err;
749 } 3086 }
@@ -754,14 +3091,22 @@ ab8500_regulator_of_probe(struct platform_device *pdev, struct device_node *np)
754static int ab8500_regulator_probe(struct platform_device *pdev) 3091static int ab8500_regulator_probe(struct platform_device *pdev)
755{ 3092{
756 struct ab8500 *ab8500 = dev_get_drvdata(pdev->dev.parent); 3093 struct ab8500 *ab8500 = dev_get_drvdata(pdev->dev.parent);
757 struct ab8500_platform_data *pdata;
758 struct device_node *np = pdev->dev.of_node; 3094 struct device_node *np = pdev->dev.of_node;
3095 struct ab8500_platform_data *ppdata;
3096 struct ab8500_regulator_platform_data *pdata;
759 int i, err; 3097 int i, err;
760 3098
3099 if (!ab8500) {
3100 dev_err(&pdev->dev, "null mfd parent\n");
3101 return -EINVAL;
3102 }
3103
3104 abx500_get_regulator_info(ab8500);
3105
761 if (np) { 3106 if (np) {
762 err = of_regulator_match(&pdev->dev, np, 3107 err = of_regulator_match(&pdev->dev, np,
763 ab8500_regulator_matches, 3108 abx500_regulator.match,
764 ARRAY_SIZE(ab8500_regulator_matches)); 3109 abx500_regulator.match_size);
765 if (err < 0) { 3110 if (err < 0) {
766 dev_err(&pdev->dev, 3111 dev_err(&pdev->dev,
767 "Error parsing regulator init data: %d\n", err); 3112 "Error parsing regulator init data: %d\n", err);
@@ -772,46 +3117,61 @@ static int ab8500_regulator_probe(struct platform_device *pdev)
772 return err; 3117 return err;
773 } 3118 }
774 3119
775 if (!ab8500) { 3120 ppdata = dev_get_platdata(ab8500->dev);
776 dev_err(&pdev->dev, "null mfd parent\n"); 3121 if (!ppdata) {
3122 dev_err(&pdev->dev, "null parent pdata\n");
777 return -EINVAL; 3123 return -EINVAL;
778 } 3124 }
779 pdata = dev_get_platdata(ab8500->dev); 3125
3126 pdata = ppdata->regulator;
780 if (!pdata) { 3127 if (!pdata) {
781 dev_err(&pdev->dev, "null pdata\n"); 3128 dev_err(&pdev->dev, "null pdata\n");
782 return -EINVAL; 3129 return -EINVAL;
783 } 3130 }
784 3131
785 /* make sure the platform data has the correct size */ 3132 /* make sure the platform data has the correct size */
786 if (pdata->num_regulator != ARRAY_SIZE(ab8500_regulator_info)) { 3133 if (pdata->num_regulator != abx500_regulator.info_size) {
787 dev_err(&pdev->dev, "Configuration error: size mismatch.\n"); 3134 dev_err(&pdev->dev, "Configuration error: size mismatch.\n");
788 return -EINVAL; 3135 return -EINVAL;
789 } 3136 }
790 3137
3138 /* initialize debug (initial state is recorded with this call) */
3139 err = ab8500_regulator_debug_init(pdev);
3140 if (err)
3141 return err;
3142
791 /* initialize registers */ 3143 /* initialize registers */
792 for (i = 0; i < pdata->num_regulator_reg_init; i++) { 3144 for (i = 0; i < pdata->num_reg_init; i++) {
793 int id, value; 3145 int id, mask, value;
794 3146
795 id = pdata->regulator_reg_init[i].id; 3147 id = pdata->reg_init[i].id;
796 value = pdata->regulator_reg_init[i].value; 3148 mask = pdata->reg_init[i].mask;
3149 value = pdata->reg_init[i].value;
797 3150
798 /* check for configuration errors */ 3151 /* check for configuration errors */
799 if (id >= AB8500_NUM_REGULATOR_REGISTERS) { 3152 BUG_ON(id >= abx500_regulator.init_size);
800 dev_err(&pdev->dev,
801 "Configuration error: id outside range.\n");
802 return -EINVAL;
803 }
804 3153
805 err = ab8500_regulator_init_registers(pdev, id, value); 3154 err = ab8500_regulator_init_registers(pdev, id, mask, value);
806 if (err < 0) 3155 if (err < 0)
807 return err; 3156 return err;
808 } 3157 }
809 3158
3159 if (!is_ab8505(ab8500)) {
3160 /* register external regulators (before Vaux1, 2 and 3) */
3161 err = ab8500_ext_regulator_init(pdev);
3162 if (err)
3163 return err;
3164 }
3165
810 /* register all regulators */ 3166 /* register all regulators */
811 for (i = 0; i < ARRAY_SIZE(ab8500_regulator_info); i++) { 3167 for (i = 0; i < abx500_regulator.info_size; i++) {
812 err = ab8500_regulator_register(pdev, &pdata->regulator[i], i, NULL); 3168 err = ab8500_regulator_register(pdev, &pdata->regulator[i],
813 if (err < 0) 3169 i, NULL);
3170 if (err < 0) {
3171 if (!is_ab8505(ab8500))
3172 ab8500_ext_regulator_exit(pdev);
814 return err; 3173 return err;
3174 }
815 } 3175 }
816 3176
817 return 0; 3177 return 0;
@@ -819,11 +3179,12 @@ static int ab8500_regulator_probe(struct platform_device *pdev)
819 3179
820static int ab8500_regulator_remove(struct platform_device *pdev) 3180static int ab8500_regulator_remove(struct platform_device *pdev)
821{ 3181{
822 int i; 3182 int i, err;
3183 struct ab8500 *ab8500 = dev_get_drvdata(pdev->dev.parent);
823 3184
824 for (i = 0; i < ARRAY_SIZE(ab8500_regulator_info); i++) { 3185 for (i = 0; i < abx500_regulator.info_size; i++) {
825 struct ab8500_regulator_info *info = NULL; 3186 struct ab8500_regulator_info *info = NULL;
826 info = &ab8500_regulator_info[i]; 3187 info = &abx500_regulator.info[i];
827 3188
828 dev_vdbg(rdev_get_dev(info->regulator), 3189 dev_vdbg(rdev_get_dev(info->regulator),
829 "%s-remove\n", info->desc.name); 3190 "%s-remove\n", info->desc.name);
@@ -831,6 +3192,15 @@ static int ab8500_regulator_remove(struct platform_device *pdev)
831 regulator_unregister(info->regulator); 3192 regulator_unregister(info->regulator);
832 } 3193 }
833 3194
3195 /* remove external regulators (after Vaux1, 2 and 3) */
3196 if (!is_ab8505(ab8500))
3197 ab8500_ext_regulator_exit(pdev);
3198
3199 /* remove regulator debug */
3200 err = ab8500_regulator_debug_exit(pdev);
3201 if (err)
3202 return err;
3203
834 return 0; 3204 return 0;
835} 3205}
836 3206
@@ -863,5 +3233,7 @@ module_exit(ab8500_regulator_exit);
863 3233
864MODULE_LICENSE("GPL v2"); 3234MODULE_LICENSE("GPL v2");
865MODULE_AUTHOR("Sundar Iyer <sundar.iyer@stericsson.com>"); 3235MODULE_AUTHOR("Sundar Iyer <sundar.iyer@stericsson.com>");
3236MODULE_AUTHOR("Bengt Jonsson <bengt.g.jonsson@stericsson.com>");
3237MODULE_AUTHOR("Daniel Willerud <daniel.willerud@stericsson.com>");
866MODULE_DESCRIPTION("Regulator Driver for ST-Ericsson AB8500 Mixed-Sig PMIC"); 3238MODULE_DESCRIPTION("Regulator Driver for ST-Ericsson AB8500 Mixed-Sig PMIC");
867MODULE_ALIAS("platform:ab8500-regulator"); 3239MODULE_ALIAS("platform:ab8500-regulator");
diff --git a/drivers/regulator/dbx500-prcmu.h b/drivers/regulator/dbx500-prcmu.h
index e763883a44f4..c8e51ace9f06 100644
--- a/drivers/regulator/dbx500-prcmu.h
+++ b/drivers/regulator/dbx500-prcmu.h
@@ -21,7 +21,6 @@
21 * @is_enabled: status of the regulator 21 * @is_enabled: status of the regulator
22 * @epod_id: id for EPOD (power domain) 22 * @epod_id: id for EPOD (power domain)
23 * @is_ramret: RAM retention switch for EPOD (power domain) 23 * @is_ramret: RAM retention switch for EPOD (power domain)
24 * @operating_point: operating point (only for vape, to be removed)
25 * 24 *
26 */ 25 */
27struct dbx500_regulator_info { 26struct dbx500_regulator_info {
@@ -32,7 +31,6 @@ struct dbx500_regulator_info {
32 u16 epod_id; 31 u16 epod_id;
33 bool is_ramret; 32 bool is_ramret;
34 bool exclude_from_power_state; 33 bool exclude_from_power_state;
35 unsigned int operating_point;
36}; 34};
37 35
38void power_state_active_enable(void); 36void power_state_active_enable(void);
diff --git a/include/linux/mfd/abx500/ab8500.h b/include/linux/mfd/abx500/ab8500.h
index 9db0bda446a0..84f449475c25 100644
--- a/include/linux/mfd/abx500/ab8500.h
+++ b/include/linux/mfd/abx500/ab8500.h
@@ -364,8 +364,7 @@ struct ab8500 {
364 const int *irq_reg_offset; 364 const int *irq_reg_offset;
365}; 365};
366 366
367struct regulator_reg_init; 367struct ab8500_regulator_platform_data;
368struct regulator_init_data;
369struct ab8500_gpio_platform_data; 368struct ab8500_gpio_platform_data;
370struct ab8500_codec_platform_data; 369struct ab8500_codec_platform_data;
371struct ab8500_sysctrl_platform_data; 370struct ab8500_sysctrl_platform_data;
@@ -375,19 +374,13 @@ struct ab8500_sysctrl_platform_data;
375 * @irq_base: start of AB8500 IRQs, AB8500_NR_IRQS will be used 374 * @irq_base: start of AB8500 IRQs, AB8500_NR_IRQS will be used
376 * @pm_power_off: Should machine pm power off hook be registered or not 375 * @pm_power_off: Should machine pm power off hook be registered or not
377 * @init: board-specific initialization after detection of ab8500 376 * @init: board-specific initialization after detection of ab8500
378 * @num_regulator_reg_init: number of regulator init registers
379 * @regulator_reg_init: regulator init registers
380 * @num_regulator: number of regulators
381 * @regulator: machine-specific constraints for regulators 377 * @regulator: machine-specific constraints for regulators
382 */ 378 */
383struct ab8500_platform_data { 379struct ab8500_platform_data {
384 int irq_base; 380 int irq_base;
385 bool pm_power_off; 381 bool pm_power_off;
386 void (*init) (struct ab8500 *); 382 void (*init) (struct ab8500 *);
387 int num_regulator_reg_init; 383 struct ab8500_regulator_platform_data *regulator;
388 struct ab8500_regulator_reg_init *regulator_reg_init;
389 int num_regulator;
390 struct regulator_init_data *regulator;
391 struct abx500_gpio_platform_data *gpio; 384 struct abx500_gpio_platform_data *gpio;
392 struct ab8500_codec_platform_data *codec; 385 struct ab8500_codec_platform_data *codec;
393 struct ab8500_sysctrl_platform_data *sysctrl; 386 struct ab8500_sysctrl_platform_data *sysctrl;
diff --git a/include/linux/regulator/ab8500.h b/include/linux/regulator/ab8500.h
index 7bd73bbdfd1b..7c5ff0c55773 100644
--- a/include/linux/regulator/ab8500.h
+++ b/include/linux/regulator/ab8500.h
@@ -5,11 +5,14 @@
5 * 5 *
6 * Authors: Sundar Iyer <sundar.iyer@stericsson.com> for ST-Ericsson 6 * Authors: Sundar Iyer <sundar.iyer@stericsson.com> for ST-Ericsson
7 * Bengt Jonsson <bengt.g.jonsson@stericsson.com> for ST-Ericsson 7 * Bengt Jonsson <bengt.g.jonsson@stericsson.com> for ST-Ericsson
8 * Daniel Willerud <daniel.willerud@stericsson.com> for ST-Ericsson
8 */ 9 */
9 10
10#ifndef __LINUX_MFD_AB8500_REGULATOR_H 11#ifndef __LINUX_MFD_AB8500_REGULATOR_H
11#define __LINUX_MFD_AB8500_REGULATOR_H 12#define __LINUX_MFD_AB8500_REGULATOR_H
12 13
14#include <linux/platform_device.h>
15
13/* AB8500 regulators */ 16/* AB8500 regulators */
14enum ab8500_regulator_id { 17enum ab8500_regulator_id {
15 AB8500_LDO_AUX1, 18 AB8500_LDO_AUX1,
@@ -17,7 +20,6 @@ enum ab8500_regulator_id {
17 AB8500_LDO_AUX3, 20 AB8500_LDO_AUX3,
18 AB8500_LDO_INTCORE, 21 AB8500_LDO_INTCORE,
19 AB8500_LDO_TVOUT, 22 AB8500_LDO_TVOUT,
20 AB8500_LDO_USB,
21 AB8500_LDO_AUDIO, 23 AB8500_LDO_AUDIO,
22 AB8500_LDO_ANAMIC1, 24 AB8500_LDO_ANAMIC1,
23 AB8500_LDO_ANAMIC2, 25 AB8500_LDO_ANAMIC2,
@@ -26,7 +28,28 @@ enum ab8500_regulator_id {
26 AB8500_NUM_REGULATORS, 28 AB8500_NUM_REGULATORS,
27}; 29};
28 30
29/* AB9450 regulators */ 31/* AB8505 regulators */
32enum ab8505_regulator_id {
33 AB8505_LDO_AUX1,
34 AB8505_LDO_AUX2,
35 AB8505_LDO_AUX3,
36 AB8505_LDO_AUX4,
37 AB8505_LDO_AUX5,
38 AB8505_LDO_AUX6,
39 AB8505_LDO_INTCORE,
40 AB8505_LDO_ADC,
41 AB8505_LDO_USB,
42 AB8505_LDO_AUDIO,
43 AB8505_LDO_ANAMIC1,
44 AB8505_LDO_ANAMIC2,
45 AB8505_LDO_AUX8,
46 AB8505_LDO_ANA,
47 AB8505_SYSCLKREQ_2,
48 AB8505_SYSCLKREQ_4,
49 AB8505_NUM_REGULATORS,
50};
51
52/* AB9540 regulators */
30enum ab9540_regulator_id { 53enum ab9540_regulator_id {
31 AB9540_LDO_AUX1, 54 AB9540_LDO_AUX1,
32 AB9540_LDO_AUX2, 55 AB9540_LDO_AUX2,
@@ -45,16 +68,39 @@ enum ab9540_regulator_id {
45 AB9540_NUM_REGULATORS, 68 AB9540_NUM_REGULATORS,
46}; 69};
47 70
48/* AB8500 and AB9540 register initialization */ 71/* AB8540 regulators */
72enum ab8540_regulator_id {
73 AB8540_LDO_AUX1,
74 AB8540_LDO_AUX2,
75 AB8540_LDO_AUX3,
76 AB8540_LDO_AUX4,
77 AB8540_LDO_AUX5,
78 AB8540_LDO_AUX6,
79 AB8540_LDO_INTCORE,
80 AB8540_LDO_TVOUT,
81 AB8540_LDO_AUDIO,
82 AB8540_LDO_ANAMIC1,
83 AB8540_LDO_ANAMIC2,
84 AB8540_LDO_DMIC,
85 AB8540_LDO_ANA,
86 AB8540_LDO_SDIO,
87 AB8540_SYSCLKREQ_2,
88 AB8540_SYSCLKREQ_4,
89 AB8540_NUM_REGULATORS,
90};
91
92/* AB8500, AB8505, and AB9540 register initialization */
49struct ab8500_regulator_reg_init { 93struct ab8500_regulator_reg_init {
50 int id; 94 int id;
95 u8 mask;
51 u8 value; 96 u8 value;
52}; 97};
53 98
54#define INIT_REGULATOR_REGISTER(_id, _value) \ 99#define INIT_REGULATOR_REGISTER(_id, _mask, _value) \
55 { \ 100 { \
56 .id = _id, \ 101 .id = _id, \
57 .value = _value, \ 102 .mask = _mask, \
103 .value = _value, \
58 } 104 }
59 105
60/* AB8500 registers */ 106/* AB8500 registers */
@@ -86,10 +132,58 @@ enum ab8500_regulator_reg {
86 AB8500_REGUCTRL2SPARE, 132 AB8500_REGUCTRL2SPARE,
87 AB8500_REGUCTRLDISCH, 133 AB8500_REGUCTRLDISCH,
88 AB8500_REGUCTRLDISCH2, 134 AB8500_REGUCTRLDISCH2,
89 AB8500_VSMPS1SEL1,
90 AB8500_NUM_REGULATOR_REGISTERS, 135 AB8500_NUM_REGULATOR_REGISTERS,
91}; 136};
92 137
138/* AB8505 registers */
139enum ab8505_regulator_reg {
140 AB8505_REGUREQUESTCTRL1,
141 AB8505_REGUREQUESTCTRL2,
142 AB8505_REGUREQUESTCTRL3,
143 AB8505_REGUREQUESTCTRL4,
144 AB8505_REGUSYSCLKREQ1HPVALID1,
145 AB8505_REGUSYSCLKREQ1HPVALID2,
146 AB8505_REGUHWHPREQ1VALID1,
147 AB8505_REGUHWHPREQ1VALID2,
148 AB8505_REGUHWHPREQ2VALID1,
149 AB8505_REGUHWHPREQ2VALID2,
150 AB8505_REGUSWHPREQVALID1,
151 AB8505_REGUSWHPREQVALID2,
152 AB8505_REGUSYSCLKREQVALID1,
153 AB8505_REGUSYSCLKREQVALID2,
154 AB8505_REGUVAUX4REQVALID,
155 AB8505_REGUMISC1,
156 AB8505_VAUDIOSUPPLY,
157 AB8505_REGUCTRL1VAMIC,
158 AB8505_VSMPSAREGU,
159 AB8505_VSMPSBREGU,
160 AB8505_VSAFEREGU, /* NOTE! PRCMU register */
161 AB8505_VPLLVANAREGU,
162 AB8505_EXTSUPPLYREGU,
163 AB8505_VAUX12REGU,
164 AB8505_VRF1VAUX3REGU,
165 AB8505_VSMPSASEL1,
166 AB8505_VSMPSASEL2,
167 AB8505_VSMPSASEL3,
168 AB8505_VSMPSBSEL1,
169 AB8505_VSMPSBSEL2,
170 AB8505_VSMPSBSEL3,
171 AB8505_VSAFESEL1, /* NOTE! PRCMU register */
172 AB8505_VSAFESEL2, /* NOTE! PRCMU register */
173 AB8505_VSAFESEL3, /* NOTE! PRCMU register */
174 AB8505_VAUX1SEL,
175 AB8505_VAUX2SEL,
176 AB8505_VRF1VAUX3SEL,
177 AB8505_VAUX4REQCTRL,
178 AB8505_VAUX4REGU,
179 AB8505_VAUX4SEL,
180 AB8505_REGUCTRLDISCH,
181 AB8505_REGUCTRLDISCH2,
182 AB8505_REGUCTRLDISCH3,
183 AB8505_CTRLVAUX5,
184 AB8505_CTRLVAUX6,
185 AB8505_NUM_REGULATOR_REGISTERS,
186};
93 187
94/* AB9540 registers */ 188/* AB9540 registers */
95enum ab9540_regulator_reg { 189enum ab9540_regulator_reg {
@@ -139,4 +233,111 @@ enum ab9540_regulator_reg {
139 AB9540_NUM_REGULATOR_REGISTERS, 233 AB9540_NUM_REGULATOR_REGISTERS,
140}; 234};
141 235
236/* AB8540 registers */
237enum ab8540_regulator_reg {
238 AB8540_REGUREQUESTCTRL1,
239 AB8540_REGUREQUESTCTRL2,
240 AB8540_REGUREQUESTCTRL3,
241 AB8540_REGUREQUESTCTRL4,
242 AB8540_REGUSYSCLKREQ1HPVALID1,
243 AB8540_REGUSYSCLKREQ1HPVALID2,
244 AB8540_REGUHWHPREQ1VALID1,
245 AB8540_REGUHWHPREQ1VALID2,
246 AB8540_REGUHWHPREQ2VALID1,
247 AB8540_REGUHWHPREQ2VALID2,
248 AB8540_REGUSWHPREQVALID1,
249 AB8540_REGUSWHPREQVALID2,
250 AB8540_REGUSYSCLKREQVALID1,
251 AB8540_REGUSYSCLKREQVALID2,
252 AB8540_REGUVAUX4REQVALID,
253 AB8540_REGUVAUX5REQVALID,
254 AB8540_REGUVAUX6REQVALID,
255 AB8540_REGUVCLKBREQVALID,
256 AB8540_REGUVRF1REQVALID,
257 AB8540_REGUMISC1,
258 AB8540_VAUDIOSUPPLY,
259 AB8540_REGUCTRL1VAMIC,
260 AB8540_VHSIC,
261 AB8540_VSDIO,
262 AB8540_VSMPS1REGU,
263 AB8540_VSMPS2REGU,
264 AB8540_VSMPS3REGU,
265 AB8540_VPLLVANAREGU,
266 AB8540_EXTSUPPLYREGU,
267 AB8540_VAUX12REGU,
268 AB8540_VRF1VAUX3REGU,
269 AB8540_VSMPS1SEL1,
270 AB8540_VSMPS1SEL2,
271 AB8540_VSMPS1SEL3,
272 AB8540_VSMPS2SEL1,
273 AB8540_VSMPS2SEL2,
274 AB8540_VSMPS2SEL3,
275 AB8540_VSMPS3SEL1,
276 AB8540_VSMPS3SEL2,
277 AB8540_VAUX1SEL,
278 AB8540_VAUX2SEL,
279 AB8540_VRF1VAUX3SEL,
280 AB8540_REGUCTRL2SPARE,
281 AB8540_VAUX4REQCTRL,
282 AB8540_VAUX4REGU,
283 AB8540_VAUX4SEL,
284 AB8540_VAUX5REQCTRL,
285 AB8540_VAUX5REGU,
286 AB8540_VAUX5SEL,
287 AB8540_VAUX6REQCTRL,
288 AB8540_VAUX6REGU,
289 AB8540_VAUX6SEL,
290 AB8540_VCLKBREQCTRL,
291 AB8540_VCLKBREGU,
292 AB8540_VCLKBSEL,
293 AB8540_VRF1REQCTRL,
294 AB8540_REGUCTRLDISCH,
295 AB8540_REGUCTRLDISCH2,
296 AB8540_REGUCTRLDISCH3,
297 AB8540_REGUCTRLDISCH4,
298 AB8540_VSIMSYSCLKCTRL,
299 AB8540_VANAVPLLSEL,
300 AB8540_NUM_REGULATOR_REGISTERS,
301};
302
303/* AB8500 external regulators */
304struct ab8500_ext_regulator_cfg {
305 bool hwreq; /* requires hw mode or high power mode */
306};
307
308enum ab8500_ext_regulator_id {
309 AB8500_EXT_SUPPLY1,
310 AB8500_EXT_SUPPLY2,
311 AB8500_EXT_SUPPLY3,
312 AB8500_NUM_EXT_REGULATORS,
313};
314
315/* AB8500 regulator platform data */
316struct ab8500_regulator_platform_data {
317 int num_reg_init;
318 struct ab8500_regulator_reg_init *reg_init;
319 int num_regulator;
320 struct regulator_init_data *regulator;
321 int num_ext_regulator;
322 struct regulator_init_data *ext_regulator;
323};
324
325#ifdef CONFIG_REGULATOR_AB8500_DEBUG
326int ab8500_regulator_debug_init(struct platform_device *pdev);
327int ab8500_regulator_debug_exit(struct platform_device *pdev);
328#else
329static inline int ab8500_regulator_debug_init(struct platform_device *pdev)
330{
331 return 0;
332}
333static inline int ab8500_regulator_debug_exit(struct platform_device *pdev)
334{
335 return 0;
336}
337#endif
338
339/* AB8500 external regulator functions. */
340int ab8500_ext_regulator_init(struct platform_device *pdev);
341void ab8500_ext_regulator_exit(struct platform_device *pdev);
342
142#endif 343#endif
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-19 08:06:31 -0400