diff options
| author | Stephen Hemminger <shemminger@vyatta.com> | 2011-01-10 20:41:43 -0500 |
|---|---|---|
| committer | Roland Dreier <rolandd@cisco.com> | 2011-01-10 20:41:43 -0500 |
| commit | c94310916390ac162e70c8c134bf70680c944a02 (patch) | |
| tree | a83115ae8412f2117f4041cbb31a395c113a611e | |
| parent | 3c0eee3fe6a3a1c745379547c7e7c904aa64f6d5 (diff) | |
RDMA/cxgb3,cxgb4: Remove dead code
This removes unused code found by running 'make namespacecheck';
compile tested only.
Signed-off-by: Stephen Hemminger <shemminger@vyatta.com>
Acked-by: Steve Wise <swise@opengridcomputing.com>
Signed-off-by: Roland Dreier <rolandd@cisco.com>
| -rw-r--r-- | drivers/infiniband/hw/cxgb3/cxio_hal.c | 2 | ||||
| -rw-r--r-- | drivers/infiniband/hw/cxgb3/iwch_provider.h | 2 | ||||
| -rw-r--r-- | drivers/infiniband/hw/cxgb3/iwch_qp.c | 56 | ||||
| -rw-r--r-- | drivers/infiniband/hw/cxgb4/iw_cxgb4.h | 1 | ||||
| -rw-r--r-- | drivers/infiniband/hw/cxgb4/qp.c | 30 |
5 files changed, 2 insertions, 89 deletions
diff --git a/drivers/infiniband/hw/cxgb3/cxio_hal.c b/drivers/infiniband/hw/cxgb3/cxio_hal.c index 09dda0b8740e..c3f5aca4ef00 100644 --- a/drivers/infiniband/hw/cxgb3/cxio_hal.c +++ b/drivers/infiniband/hw/cxgb3/cxio_hal.c | |||
| @@ -189,6 +189,7 @@ int cxio_create_cq(struct cxio_rdev *rdev_p, struct t3_cq *cq, int kernel) | |||
| 189 | return (rdev_p->t3cdev_p->ctl(rdev_p->t3cdev_p, RDMA_CQ_SETUP, &setup)); | 189 | return (rdev_p->t3cdev_p->ctl(rdev_p->t3cdev_p, RDMA_CQ_SETUP, &setup)); |
| 190 | } | 190 | } |
| 191 | 191 | ||
| 192 | #ifdef notyet | ||
| 192 | int cxio_resize_cq(struct cxio_rdev *rdev_p, struct t3_cq *cq) | 193 | int cxio_resize_cq(struct cxio_rdev *rdev_p, struct t3_cq *cq) |
| 193 | { | 194 | { |
| 194 | struct rdma_cq_setup setup; | 195 | struct rdma_cq_setup setup; |
| @@ -200,6 +201,7 @@ int cxio_resize_cq(struct cxio_rdev *rdev_p, struct t3_cq *cq) | |||
| 200 | setup.ovfl_mode = 1; | 201 | setup.ovfl_mode = 1; |
| 201 | return (rdev_p->t3cdev_p->ctl(rdev_p->t3cdev_p, RDMA_CQ_SETUP, &setup)); | 202 | return (rdev_p->t3cdev_p->ctl(rdev_p->t3cdev_p, RDMA_CQ_SETUP, &setup)); |
| 202 | } | 203 | } |
| 204 | #endif | ||
| 203 | 205 | ||
| 204 | static u32 get_qpid(struct cxio_rdev *rdev_p, struct cxio_ucontext *uctx) | 206 | static u32 get_qpid(struct cxio_rdev *rdev_p, struct cxio_ucontext *uctx) |
| 205 | { | 207 | { |
diff --git a/drivers/infiniband/hw/cxgb3/iwch_provider.h b/drivers/infiniband/hw/cxgb3/iwch_provider.h index a237d49bdcc9..c5406da3f4cd 100644 --- a/drivers/infiniband/hw/cxgb3/iwch_provider.h +++ b/drivers/infiniband/hw/cxgb3/iwch_provider.h | |||
| @@ -335,8 +335,6 @@ int iwch_post_terminate(struct iwch_qp *qhp, struct respQ_msg_t *rsp_msg); | |||
| 335 | int iwch_post_zb_read(struct iwch_qp *qhp); | 335 | int iwch_post_zb_read(struct iwch_qp *qhp); |
| 336 | int iwch_register_device(struct iwch_dev *dev); | 336 | int iwch_register_device(struct iwch_dev *dev); |
| 337 | void iwch_unregister_device(struct iwch_dev *dev); | 337 | void iwch_unregister_device(struct iwch_dev *dev); |
| 338 | int iwch_quiesce_qps(struct iwch_cq *chp); | ||
| 339 | int iwch_resume_qps(struct iwch_cq *chp); | ||
| 340 | void stop_read_rep_timer(struct iwch_qp *qhp); | 338 | void stop_read_rep_timer(struct iwch_qp *qhp); |
| 341 | int iwch_register_mem(struct iwch_dev *rhp, struct iwch_pd *php, | 339 | int iwch_register_mem(struct iwch_dev *rhp, struct iwch_pd *php, |
| 342 | struct iwch_mr *mhp, int shift); | 340 | struct iwch_mr *mhp, int shift); |
diff --git a/drivers/infiniband/hw/cxgb3/iwch_qp.c b/drivers/infiniband/hw/cxgb3/iwch_qp.c index 0993137181d7..1b4cd09f74dc 100644 --- a/drivers/infiniband/hw/cxgb3/iwch_qp.c +++ b/drivers/infiniband/hw/cxgb3/iwch_qp.c | |||
| @@ -1149,59 +1149,3 @@ out: | |||
| 1149 | PDBG("%s exit state %d\n", __func__, qhp->attr.state); | 1149 | PDBG("%s exit state %d\n", __func__, qhp->attr.state); |
| 1150 | return ret; | 1150 | return ret; |
| 1151 | } | 1151 | } |
| 1152 | |||
| 1153 | static int quiesce_qp(struct iwch_qp *qhp) | ||
| 1154 | { | ||
| 1155 | spin_lock_irq(&qhp->lock); | ||
| 1156 | iwch_quiesce_tid(qhp->ep); | ||
| 1157 | qhp->flags |= QP_QUIESCED; | ||
| 1158 | spin_unlock_irq(&qhp->lock); | ||
| 1159 | return 0; | ||
| 1160 | } | ||
| 1161 | |||
| 1162 | static int resume_qp(struct iwch_qp *qhp) | ||
| 1163 | { | ||
| 1164 | spin_lock_irq(&qhp->lock); | ||
| 1165 | iwch_resume_tid(qhp->ep); | ||
| 1166 | qhp->flags &= ~QP_QUIESCED; | ||
| 1167 | spin_unlock_irq(&qhp->lock); | ||
| 1168 | return 0; | ||
| 1169 | } | ||
| 1170 | |||
| 1171 | int iwch_quiesce_qps(struct iwch_cq *chp) | ||
| 1172 | { | ||
| 1173 | int i; | ||
| 1174 | struct iwch_qp *qhp; | ||
| 1175 | |||
| 1176 | for (i=0; i < T3_MAX_NUM_QP; i++) { | ||
| 1177 | qhp = get_qhp(chp->rhp, i); | ||
| 1178 | if (!qhp) | ||
| 1179 | continue; | ||
| 1180 | if ((qhp->attr.rcq == chp->cq.cqid) && !qp_quiesced(qhp)) { | ||
| 1181 | quiesce_qp(qhp); | ||
| 1182 | continue; | ||
| 1183 | } | ||
| 1184 | if ((qhp->attr.scq == chp->cq.cqid) && !qp_quiesced(qhp)) | ||
| 1185 | quiesce_qp(qhp); | ||
| 1186 | } | ||
| 1187 | return 0; | ||
| 1188 | } | ||
| 1189 | |||
| 1190 | int iwch_resume_qps(struct iwch_cq *chp) | ||
| 1191 | { | ||
| 1192 | int i; | ||
| 1193 | struct iwch_qp *qhp; | ||
| 1194 | |||
| 1195 | for (i=0; i < T3_MAX_NUM_QP; i++) { | ||
| 1196 | qhp = get_qhp(chp->rhp, i); | ||
| 1197 | if (!qhp) | ||
| 1198 | continue; | ||
| 1199 | if ((qhp->attr.rcq == chp->cq.cqid) && qp_quiesced(qhp)) { | ||
| 1200 | resume_qp(qhp); | ||
| 1201 | continue; | ||
| 1202 | } | ||
| 1203 | if ((qhp->attr.scq == chp->cq.cqid) && qp_quiesced(qhp)) | ||
| 1204 | resume_qp(qhp); | ||
| 1205 | } | ||
| 1206 | return 0; | ||
| 1207 | } | ||
diff --git a/drivers/infiniband/hw/cxgb4/iw_cxgb4.h b/drivers/infiniband/hw/cxgb4/iw_cxgb4.h index 16032cdb4337..cc600c2dd0b3 100644 --- a/drivers/infiniband/hw/cxgb4/iw_cxgb4.h +++ b/drivers/infiniband/hw/cxgb4/iw_cxgb4.h | |||
| @@ -760,7 +760,6 @@ int c4iw_flush_rq(struct t4_wq *wq, struct t4_cq *cq, int count); | |||
| 760 | int c4iw_flush_sq(struct t4_wq *wq, struct t4_cq *cq, int count); | 760 | int c4iw_flush_sq(struct t4_wq *wq, struct t4_cq *cq, int count); |
| 761 | int c4iw_ev_handler(struct c4iw_dev *rnicp, u32 qid); | 761 | int c4iw_ev_handler(struct c4iw_dev *rnicp, u32 qid); |
| 762 | u16 c4iw_rqes_posted(struct c4iw_qp *qhp); | 762 | u16 c4iw_rqes_posted(struct c4iw_qp *qhp); |
| 763 | int c4iw_post_zb_read(struct c4iw_qp *qhp); | ||
| 764 | int c4iw_post_terminate(struct c4iw_qp *qhp, struct t4_cqe *err_cqe); | 763 | int c4iw_post_terminate(struct c4iw_qp *qhp, struct t4_cqe *err_cqe); |
| 765 | u32 c4iw_get_cqid(struct c4iw_rdev *rdev, struct c4iw_dev_ucontext *uctx); | 764 | u32 c4iw_get_cqid(struct c4iw_rdev *rdev, struct c4iw_dev_ucontext *uctx); |
| 766 | void c4iw_put_cqid(struct c4iw_rdev *rdev, u32 qid, | 765 | void c4iw_put_cqid(struct c4iw_rdev *rdev, u32 qid, |
diff --git a/drivers/infiniband/hw/cxgb4/qp.c b/drivers/infiniband/hw/cxgb4/qp.c index 057cb2505ea1..565a0612a125 100644 --- a/drivers/infiniband/hw/cxgb4/qp.c +++ b/drivers/infiniband/hw/cxgb4/qp.c | |||
| @@ -892,36 +892,6 @@ static inline void build_term_codes(struct t4_cqe *err_cqe, u8 *layer_type, | |||
| 892 | } | 892 | } |
| 893 | } | 893 | } |
| 894 | 894 | ||
| 895 | int c4iw_post_zb_read(struct c4iw_qp *qhp) | ||
| 896 | { | ||
| 897 | union t4_wr *wqe; | ||
| 898 | struct sk_buff *skb; | ||
| 899 | u8 len16; | ||
| 900 | |||
| 901 | PDBG("%s enter\n", __func__); | ||
| 902 | skb = alloc_skb(40, GFP_KERNEL); | ||
| 903 | if (!skb) { | ||
| 904 | printk(KERN_ERR "%s cannot send zb_read!!\n", __func__); | ||
| 905 | return -ENOMEM; | ||
| 906 | } | ||
| 907 | set_wr_txq(skb, CPL_PRIORITY_DATA, qhp->ep->txq_idx); | ||
| 908 | |||
| 909 | wqe = (union t4_wr *)skb_put(skb, sizeof wqe->read); | ||
| 910 | memset(wqe, 0, sizeof wqe->read); | ||
| 911 | wqe->read.r2 = cpu_to_be64(0); | ||
| 912 | wqe->read.stag_sink = cpu_to_be32(1); | ||
| 913 | wqe->read.to_sink_hi = cpu_to_be32(0); | ||
| 914 | wqe->read.to_sink_lo = cpu_to_be32(1); | ||
| 915 | wqe->read.stag_src = cpu_to_be32(1); | ||
| 916 | wqe->read.plen = cpu_to_be32(0); | ||
| 917 | wqe->read.to_src_hi = cpu_to_be32(0); | ||
| 918 | wqe->read.to_src_lo = cpu_to_be32(1); | ||
| 919 | len16 = DIV_ROUND_UP(sizeof wqe->read, 16); | ||
| 920 | init_wr_hdr(wqe, 0, FW_RI_RDMA_READ_WR, FW_RI_COMPLETION_FLAG, len16); | ||
| 921 | |||
| 922 | return c4iw_ofld_send(&qhp->rhp->rdev, skb); | ||
| 923 | } | ||
| 924 | |||
| 925 | static void post_terminate(struct c4iw_qp *qhp, struct t4_cqe *err_cqe, | 895 | static void post_terminate(struct c4iw_qp *qhp, struct t4_cqe *err_cqe, |
| 926 | gfp_t gfp) | 896 | gfp_t gfp) |
| 927 | { | 897 | { |
