[PATCH] cell: enable pause(0) in cpu_idle

This patch enables support for pause(0) power management state
for the Cell Broadband Processor, which is import for power efficient
operation. The pervasive infrastructure will in the future enable
us to introduce more functionality specific to the Cell's
pervasive unit.

From: Maximino Aguilar <maguilar@us.ibm.com>
Signed-off-by: Arnd Bergmann <arndb@de.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>

12 files changed, 335 insertions, 14 deletions

diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index f7f2a830fca1..2f82a2091440 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -273,7 +273,7 @@ struct cpu_spec	cpu_specs[] = {
                 .oprofile_model         = &op_model_power4,
 #endif
         },
-        {       /* BE DD1.x */
+        {       /* Cell Broadband Engine */
                 .pvr_mask               = 0xffff0000,
                 .pvr_value              = 0x00700000,
                 .cpu_name               = "Cell Broadband Engine",
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
index 6c793463d511..7509aa6474f2 100644
--- a/arch/powerpc/kernel/traps.c
+++ b/arch/powerpc/kernel/traps.c
@@ -230,8 +230,10 @@ void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr)
 void system_reset_exception(struct pt_regs *regs)
 {
         /* See if any machine dependent calls */
-        if (ppc_md.system_reset_exception)
-                ppc_md.system_reset_exception(regs);
+        if (ppc_md.system_reset_exception) {
+                if (ppc_md.system_reset_exception(regs))
+                        return;
+        }
 
         die("System Reset", regs, SIGABRT);
 
diff --git a/arch/powerpc/platforms/cell/Makefile b/arch/powerpc/platforms/cell/Makefile
index 74616cf13af9..ebbd1141498a 100644
--- a/arch/powerpc/platforms/cell/Makefile
+++ b/arch/powerpc/platforms/cell/Makefile
@@ -1,4 +1,6 @@
 obj-y                   += interrupt.o iommu.o setup.o spider-pic.o
+obj-y                   += pervasive.o
+
 obj-$(CONFIG_SMP)       += smp.o
 obj-$(CONFIG_SPU_FS)    += spufs/ spu_base.o
 builtin-spufs-$(CONFIG_SPU_FS)  += spu_syscalls.o
diff --git a/arch/powerpc/platforms/cell/pervasive.c b/arch/powerpc/platforms/cell/pervasive.c
new file mode 100644
index 000000000000..85152544c153
--- /dev/null
+++ b/arch/powerpc/platforms/cell/pervasive.c
@@ -0,0 +1,229 @@
+/*
+ * CBE Pervasive Monitor and Debug
+ *
+ * (C) Copyright IBM Corporation 2005
+ *
+ * Authors: Maximino Aguilar (maguilar@us.ibm.com)
+ *          Michael N. Day (mnday@us.ibm.com)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#undef DEBUG
+
+#include <linux/config.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/percpu.h>
+#include <linux/types.h>
+#include <linux/kallsyms.h>
+
+#include <asm/io.h>
+#include <asm/machdep.h>
+#include <asm/prom.h>
+#include <asm/pgtable.h>
+#include <asm/reg.h>
+
+#include "pervasive.h"
+
+static DEFINE_SPINLOCK(cbe_pervasive_lock);
+struct cbe_pervasive {
+        struct pmd_regs __iomem *regs;
+        unsigned int thread;
+};
+
+/* can't use per_cpu from setup_arch */
+static struct cbe_pervasive cbe_pervasive[NR_CPUS];
+
+static void __init cbe_enable_pause_zero(void)
+{
+        unsigned long thread_switch_control;
+        unsigned long temp_register;
+        struct cbe_pervasive *p;
+        int thread;
+
+        spin_lock_irq(&cbe_pervasive_lock);
+        p = &cbe_pervasive[smp_processor_id()];
+
+        if (!cbe_pervasive->regs)
+                goto out;
+
+        pr_debug("Power Management: CPU %d\n", smp_processor_id());
+
+         /* Enable Pause(0) control bit */
+        temp_register = in_be64(&p->regs->pm_control);
+
+        out_be64(&p->regs->pm_control,
+                 temp_register|PMD_PAUSE_ZERO_CONTROL);
+
+        /* Enable DEC and EE interrupt request */
+        thread_switch_control  = mfspr(SPRN_TSC_CELL);
+        thread_switch_control |= TSC_CELL_EE_ENABLE | TSC_CELL_EE_BOOST;
+
+        switch ((mfspr(SPRN_CTRLF) & CTRL_CT)) {
+        case CTRL_CT0:
+                thread_switch_control |= TSC_CELL_DEC_ENABLE_0;
+                thread = 0;
+                break;
+        case CTRL_CT1:
+                thread_switch_control |= TSC_CELL_DEC_ENABLE_1;
+                thread = 1;
+                break;
+        default:
+                printk(KERN_WARNING "%s: unknown configuration\n",
+                        __FUNCTION__);
+                thread = -1;
+                break;
+        }
+
+        if (p->thread != thread)
+                printk(KERN_WARNING "%s: device tree inconsistant, "
+                                     "cpu %i: %d/%d\n", __FUNCTION__,
+                                     smp_processor_id(),
+                                     p->thread, thread);
+
+        mtspr(SPRN_TSC_CELL, thread_switch_control);
+
+out:
+        spin_unlock_irq(&cbe_pervasive_lock);
+}
+
+static void cbe_idle(void)
+{
+        unsigned long ctrl;
+
+        cbe_enable_pause_zero();
+
+        while (1) {
+                if (!need_resched()) {
+                        local_irq_disable();
+                        while (!need_resched()) {
+                                /* go into low thread priority */
+                                HMT_low();
+
+                                /*
+                                 * atomically disable thread execution
+                                 * and runlatch.
+                                 * External and Decrementer exceptions
+                                 * are still handled when the thread
+                                 * is disabled but now enter in
+                                 * cbe_system_reset_exception()
+                                 */
+                                ctrl = mfspr(SPRN_CTRLF);
+                                ctrl &= ~(CTRL_RUNLATCH | CTRL_TE);
+                                mtspr(SPRN_CTRLT, ctrl);
+                        }
+                        /* restore thread prio */
+                        HMT_medium();