diff options
| author | Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> | 2014-12-14 16:34:50 -0500 |
|---|---|---|
| committer | Will Deacon <will.deacon@arm.com> | 2015-01-19 09:46:45 -0500 |
| commit | c896c132b01895fd1445d178e36155b671c6f9ee (patch) | |
| tree | c3eb6cde7882626616ca25f31084ec918fbc2238 | |
| parent | fe4b991dcd84e0104cf2e29223a819335ed048a7 (diff) | |
iommu: io-pgtable-arm: add non-secure quirk
The quirk causes the Non-Secure bit to be set in all page table entries.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
| -rw-r--r-- | drivers/iommu/io-pgtable-arm.c | 7 | ||||
| -rw-r--r-- | drivers/iommu/io-pgtable.h | 3 |
2 files changed, 9 insertions, 1 deletions
diff --git a/drivers/iommu/io-pgtable-arm.c b/drivers/iommu/io-pgtable-arm.c index 52fb21487f02..5a500edf00cc 100644 --- a/drivers/iommu/io-pgtable-arm.c +++ b/drivers/iommu/io-pgtable-arm.c | |||
| @@ -82,11 +82,13 @@ | |||
| 82 | #define ARM_LPAE_PTE_TYPE_TABLE 3 | 82 | #define ARM_LPAE_PTE_TYPE_TABLE 3 |
| 83 | #define ARM_LPAE_PTE_TYPE_PAGE 3 | 83 | #define ARM_LPAE_PTE_TYPE_PAGE 3 |
| 84 | 84 | ||
| 85 | #define ARM_LPAE_PTE_NSTABLE (((arm_lpae_iopte)1) << 63) | ||
| 85 | #define ARM_LPAE_PTE_XN (((arm_lpae_iopte)3) << 53) | 86 | #define ARM_LPAE_PTE_XN (((arm_lpae_iopte)3) << 53) |
| 86 | #define ARM_LPAE_PTE_AF (((arm_lpae_iopte)1) << 10) | 87 | #define ARM_LPAE_PTE_AF (((arm_lpae_iopte)1) << 10) |
| 87 | #define ARM_LPAE_PTE_SH_NS (((arm_lpae_iopte)0) << 8) | 88 | #define ARM_LPAE_PTE_SH_NS (((arm_lpae_iopte)0) << 8) |
| 88 | #define ARM_LPAE_PTE_SH_OS (((arm_lpae_iopte)2) << 8) | 89 | #define ARM_LPAE_PTE_SH_OS (((arm_lpae_iopte)2) << 8) |
| 89 | #define ARM_LPAE_PTE_SH_IS (((arm_lpae_iopte)3) << 8) | 90 | #define ARM_LPAE_PTE_SH_IS (((arm_lpae_iopte)3) << 8) |
| 91 | #define ARM_LPAE_PTE_NS (((arm_lpae_iopte)1) << 5) | ||
| 90 | #define ARM_LPAE_PTE_VALID (((arm_lpae_iopte)1) << 0) | 92 | #define ARM_LPAE_PTE_VALID (((arm_lpae_iopte)1) << 0) |
| 91 | 93 | ||
| 92 | #define ARM_LPAE_PTE_ATTR_LO_MASK (((arm_lpae_iopte)0x3ff) << 2) | 94 | #define ARM_LPAE_PTE_ATTR_LO_MASK (((arm_lpae_iopte)0x3ff) << 2) |
| @@ -208,6 +210,9 @@ static int arm_lpae_init_pte(struct arm_lpae_io_pgtable *data, | |||
| 208 | return -EEXIST; | 210 | return -EEXIST; |
| 209 | } | 211 | } |
| 210 | 212 | ||
| 213 | if (data->iop.cfg.quirks & IO_PGTABLE_QUIRK_ARM_NS) | ||
| 214 | pte |= ARM_LPAE_PTE_NS; | ||
| 215 | |||
| 211 | if (lvl == ARM_LPAE_MAX_LEVELS - 1) | 216 | if (lvl == ARM_LPAE_MAX_LEVELS - 1) |
| 212 | pte |= ARM_LPAE_PTE_TYPE_PAGE; | 217 | pte |= ARM_LPAE_PTE_TYPE_PAGE; |
| 213 | else | 218 | else |
| @@ -251,6 +256,8 @@ static int __arm_lpae_map(struct arm_lpae_io_pgtable *data, unsigned long iova, | |||
| 251 | data->iop.cfg.tlb->flush_pgtable(cptep, 1UL << data->pg_shift, | 256 | data->iop.cfg.tlb->flush_pgtable(cptep, 1UL << data->pg_shift, |
| 252 | cookie); | 257 | cookie); |
| 253 | pte = __pa(cptep) | ARM_LPAE_PTE_TYPE_TABLE; | 258 | pte = __pa(cptep) | ARM_LPAE_PTE_TYPE_TABLE; |
| 259 | if (data->iop.cfg.quirks & IO_PGTABLE_QUIRK_ARM_NS) | ||
| 260 | pte |= ARM_LPAE_PTE_NSTABLE; | ||
| 254 | *ptep = pte; | 261 | *ptep = pte; |
| 255 | data->iop.cfg.tlb->flush_pgtable(ptep, sizeof(*ptep), cookie); | 262 | data->iop.cfg.tlb->flush_pgtable(ptep, sizeof(*ptep), cookie); |
| 256 | } else { | 263 | } else { |
diff --git a/drivers/iommu/io-pgtable.h b/drivers/iommu/io-pgtable.h index 05c4e593a25f..10e32f69c668 100644 --- a/drivers/iommu/io-pgtable.h +++ b/drivers/iommu/io-pgtable.h | |||
| @@ -43,7 +43,8 @@ struct iommu_gather_ops { | |||
| 43 | * @tlb: TLB management callbacks for this set of tables. | 43 | * @tlb: TLB management callbacks for this set of tables. |
| 44 | */ | 44 | */ |
| 45 | struct io_pgtable_cfg { | 45 | struct io_pgtable_cfg { |
| 46 | int quirks; /* IO_PGTABLE_QUIRK_* */ | 46 | #define IO_PGTABLE_QUIRK_ARM_NS (1 << 0) /* Set NS bit in PTEs */ |
| 47 | int quirks; | ||
| 47 | unsigned long pgsize_bitmap; | 48 | unsigned long pgsize_bitmap; |
| 48 | unsigned int ias; | 49 | unsigned int ias; |
| 49 | unsigned int oas; | 50 | unsigned int oas; |
