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authorTom O'Rourke <Tom.O'Rourke@intel.com>2014-11-19 17:21:54 -0500
committerDaniel Vetter <daniel.vetter@ffwll.ch>2014-11-20 07:03:32 -0500
commitc7f3153a61b543830d397cda8918ef2d6330c6c7 (patch)
tree25f83afb60eb3f56153b7b121e727f6785823eac
parentf4ab408c4b55fcbc447cf0288456613bad824626 (diff)
drm/i915: change initial rps frequency for gen8
In gen8_enable_rps, change the initial rps setting to the min_freq_softlimit (same as gen6_enable_rps). Signed-off-by: Tom O'Rourke <Tom.O'Rourke@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-rw-r--r--drivers/gpu/drm/i915/intel_pm.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 6d0795d3b2e4..70e75477f8fc 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4766,7 +4766,8 @@ static void gen8_enable_rps(struct drm_device *dev)
4766 4766
4767 /* 6: Ring frequency + overclocking (our driver does this later */ 4767 /* 6: Ring frequency + overclocking (our driver does this later */
4768 4768
4769 gen6_set_rps(dev, (I915_READ(GEN6_GT_PERF_STATUS) & 0xff00) >> 8); 4769 dev_priv->rps.power = HIGH_POWER; /* force a reset */
4770 gen6_set_rps(dev_priv->dev, dev_priv->rps.min_freq_softlimit);
4770 4771
4771 gen6_gt_force_wake_put(dev_priv, FORCEWAKE_ALL); 4772 gen6_gt_force_wake_put(dev_priv, FORCEWAKE_ALL);
4772} 4773}