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authorMatt Sealey <matt@genesi-usa.com>2012-08-01 13:49:30 -0400
committerShawn Guo <shawn.guo@linaro.org>2012-08-23 23:44:13 -0400
commitc7c29b3aeb318b9efe3035cacf42800dfe2970f5 (patch)
treea9e9c0c07ce8e401d9dbb8f88eeadbd7205d92e5
parent56a12b3984a368b1feab41a77f58fe81cc6771bf (diff)
ARM: efikamx: remove Genesi Efika MX platform files from the tree
Delete the files that can no longer be built. Signed-off-by: Matt Sealey <matt@genesi-usa.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat
-rw-r--r--arch/arm/mach-imx/efika.h10
-rw-r--r--arch/arm/mach-imx/mach-mx51_efikamx.c300
-rw-r--r--arch/arm/mach-imx/mach-mx51_efikasb.c296
-rw-r--r--arch/arm/mach-imx/mx51_efika.c633
4 files changed, 0 insertions, 1239 deletions
diff --git a/arch/arm/mach-imx/efika.h b/arch/arm/mach-imx/efika.h
deleted file mode 100644
index 014aa985faae..000000000000
--- a/arch/arm/mach-imx/efika.h
+++ /dev/null
@@ -1,10 +0,0 @@
1#ifndef _EFIKA_H
2#define _EFIKA_H
3
4#define EFIKA_WLAN_EN IMX_GPIO_NR(2, 16)
5#define EFIKA_WLAN_RESET IMX_GPIO_NR(2, 10)
6#define EFIKA_USB_PHY_RESET IMX_GPIO_NR(2, 9)
7
8void __init efika_board_common_init(void);
9
10#endif
diff --git a/arch/arm/mach-imx/mach-mx51_efikamx.c b/arch/arm/mach-imx/mach-mx51_efikamx.c
deleted file mode 100644
index 8d09c0126cab..000000000000
--- a/arch/arm/mach-imx/mach-mx51_efikamx.c
+++ /dev/null
@@ -1,300 +0,0 @@
1/*
2 * Copyright (C) 2010 Linaro Limited
3 *
4 * based on code from the following
5 * Copyright 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved.
6 * Copyright 2009-2010 Pegatron Corporation. All Rights Reserved.
7 * Copyright 2009-2010 Genesi USA, Inc. All Rights Reserved.
8 *
9 * The code contained herein is licensed under the GNU General Public
10 * License. You may obtain a copy of the GNU General Public License
11 * Version 2 or later at the following locations:
12 *
13 * http://www.opensource.org/licenses/gpl-license.html
14 * http://www.gnu.org/copyleft/gpl.html
15 */
16
17#include <linux/init.h>
18#include <linux/platform_device.h>
19#include <linux/i2c.h>
20#include <linux/gpio.h>
21#include <linux/leds.h>
22#include <linux/input.h>
23#include <linux/delay.h>
24#include <linux/io.h>
25#include <linux/spi/flash.h>
26#include <linux/spi/spi.h>
27#include <linux/mfd/mc13892.h>
28#include <linux/regulator/machine.h>
29#include <linux/regulator/consumer.h>
30
31#include <mach/common.h>
32#include <mach/hardware.h>
33#include <mach/iomux-mx51.h>
34
35#include <asm/setup.h>
36#include <asm/system_info.h>
37#include <asm/mach-types.h>
38#include <asm/mach/arch.h>
39#include <asm/mach/time.h>
40
41#include "devices-imx51.h"
42#include "efika.h"
43
44#define EFIKAMX_PCBID0 IMX_GPIO_NR(3, 16)
45#define EFIKAMX_PCBID1 IMX_GPIO_NR(3, 17)
46#define EFIKAMX_PCBID2 IMX_GPIO_NR(3, 11)
47
48#define EFIKAMX_BLUE_LED IMX_GPIO_NR(3, 13)
49#define EFIKAMX_GREEN_LED IMX_GPIO_NR(3, 14)
50#define EFIKAMX_RED_LED IMX_GPIO_NR(3, 15)
51
52#define EFIKAMX_POWER_KEY IMX_GPIO_NR(2, 31)
53
54/* board 1.1 doesn't have same reset gpio */
55#define EFIKAMX_RESET1_1 IMX_GPIO_NR(3, 2)
56#define EFIKAMX_RESET IMX_GPIO_NR(1, 4)
57
58#define EFIKAMX_POWEROFF IMX_GPIO_NR(4, 13)
59
60#define EFIKAMX_PMIC IMX_GPIO_NR(1, 6)
61
62/* the pci ids pin have pull up. they're driven low according to board id */
63#define MX51_PAD_PCBID0 IOMUX_PAD(0x518, 0x130, 3, 0x0, 0, PAD_CTL_PUS_100K_UP)
64#define MX51_PAD_PCBID1 IOMUX_PAD(0x51C, 0x134, 3, 0x0, 0, PAD_CTL_PUS_100K_UP)
65#define MX51_PAD_PCBID2 IOMUX_PAD(0x504, 0x128, 3, 0x0, 0, PAD_CTL_PUS_100K_UP)
66#define MX51_PAD_PWRKEY IOMUX_PAD(0x48c, 0x0f8, 1, 0x0, 0, PAD_CTL_PUS_100K_UP | PAD_CTL_PKE)
67
68static iomux_v3_cfg_t mx51efikamx_pads[] = {
69 /* board id */
70 MX51_PAD_PCBID0,
71 MX51_PAD_PCBID1,
72 MX51_PAD_PCBID2,
73
74 /* leds */
75 MX51_PAD_CSI1_D9__GPIO3_13,
76 MX51_PAD_CSI1_VSYNC__GPIO3_14,
77 MX51_PAD_CSI1_HSYNC__GPIO3_15,
78
79 /* power key */
80 MX51_PAD_PWRKEY,
81
82 /* reset */
83 MX51_PAD_DI1_PIN13__GPIO3_2,
84 MX51_PAD_GPIO1_4__GPIO1_4,
85
86 /* power off */
87 MX51_PAD_CSI2_VSYNC__GPIO4_13,
88};
89
90/* PCBID2 PCBID1 PCBID0 STATE
91 1 1 1 ER1:rev1.1
92 1 1 0 ER2:rev1.2
93 1 0 1 ER3:rev1.3
94 1 0 0 ER4:rev1.4
95*/
96static void __init mx51_efikamx_board_id(void)
97{
98 int id;
99
100 /* things are taking time to settle */
101 msleep(150);
102
103 gpio_request(EFIKAMX_PCBID0, "pcbid0");
104 gpio_direction_input(EFIKAMX_PCBID0);
105 gpio_request(EFIKAMX_PCBID1, "pcbid1");
106 gpio_direction_input(EFIKAMX_PCBID1);
107 gpio_request(EFIKAMX_PCBID2, "pcbid2");
108 gpio_direction_input(EFIKAMX_PCBID2);
109
110 id = gpio_get_value(EFIKAMX_PCBID0) ? 1 : 0;
111 id |= (gpio_get_value(EFIKAMX_PCBID1) ? 1 : 0) << 1;
112 id |= (gpio_get_value(EFIKAMX_PCBID2) ? 1 : 0) << 2;
113
114 switch (id) {
115 case 7:
116 system_rev = 0x11;
117 break;
118 case 6:
119 system_rev = 0x12;
120 break;
121 case 5:
122 system_rev = 0x13;
123 break;
124 case 4:
125 system_rev = 0x14;
126 break;
127 default:
128 system_rev = 0x10;
129 break;
130 }
131
132 if ((system_rev == 0x10)
133 || (system_rev == 0x12)
134 || (system_rev == 0x14)) {
135 printk(KERN_WARNING
136 "EfikaMX: Unsupported board revision 1.%u!\n",
137 system_rev & 0xf);
138 }
139}
140
141static struct gpio_led mx51_efikamx_leds[] __initdata = {
142 {
143 .name = "efikamx:green",
144 .default_trigger = "default-on",
145 .gpio = EFIKAMX_GREEN_LED,
146 },
147 {
148 .name = "efikamx:red",
149 .default_trigger = "ide-disk",
150 .gpio = EFIKAMX_RED_LED,
151 },
152 {
153 .name = "efikamx:blue",
154 .default_trigger = "mmc0",
155 .gpio = EFIKAMX_BLUE_LED,
156 },
157};
158
159static const struct gpio_led_platform_data
160 mx51_efikamx_leds_data __initconst = {
161 .leds = mx51_efikamx_leds,
162 .num_leds = ARRAY_SIZE(mx51_efikamx_leds),
163};
164
165static struct esdhc_platform_data sd_pdata = {
166 .cd_type = ESDHC_CD_CONTROLLER,
167 .wp_type = ESDHC_WP_CONTROLLER,
168};
169
170static struct gpio_keys_button mx51_efikamx_powerkey[] = {
171 {
172 .code = KEY_POWER,
173 .gpio = EFIKAMX_POWER_KEY,
174 .type = EV_PWR,
175 .desc = "Power Button (CM)",
176 .wakeup = 1,
177 .debounce_interval = 10, /* ms */
178 },
179};
180
181static const struct gpio_keys_platform_data mx51_efikamx_powerkey_data __initconst = {
182 .buttons = mx51_efikamx_powerkey,
183 .nbuttons = ARRAY_SIZE(mx51_efikamx_powerkey),
184};
185
186static void mx51_efikamx_restart(char mode, const char *cmd)
187{
188 if (system_rev == 0x11)
189 gpio_direction_output(EFIKAMX_RESET1_1, 0);
190 else
191 gpio_direction_output(EFIKAMX_RESET, 0);
192}
193
194static struct regulator *pwgt1, *pwgt2, *coincell;
195
196static void mx51_efikamx_power_off(void)
197{
198 if (!IS_ERR(coincell))
199 regulator_disable(coincell);
200
201 if (!IS_ERR(pwgt1) && !IS_ERR(pwgt2)) {
202 regulator_disable(pwgt2);
203 regulator_disable(pwgt1);
204 }
205 gpio_direction_output(EFIKAMX_POWEROFF, 1);
206}
207
208static int __init mx51_efikamx_power_init(void)
209{
210 pwgt1 = regulator_get(NULL, "pwgt1");
211 pwgt2 = regulator_get(NULL, "pwgt2");
212 if (!IS_ERR(pwgt1) && !IS_ERR(pwgt2)) {
213 regulator_enable(pwgt1);
214 regulator_enable(pwgt2);
215 }
216 gpio_request(EFIKAMX_POWEROFF, "poweroff");
217 pm_power_off = mx51_efikamx_power_off;
218
219 /* enable coincell charger. maybe need a small power driver ? */
220 coincell = regulator_get(NULL, "coincell");
221 if (!IS_ERR(coincell)) {
222 regulator_set_voltage(coincell, 3000000, 3000000);
223 regulator_enable(coincell);
224 }
225
226 regulator_has_full_constraints();
227
228 return 0;
229}
230
231static void __init mx51_efikamx_init_late(void)
232{
233 imx51_init_late();
234 mx51_efikamx_power_init();
235}
236
237static void __init mx51_efikamx_init(void)
238{
239 imx51_soc_init();
240
241 mxc_iomux_v3_setup_multiple_pads(mx51efikamx_pads,
242 ARRAY_SIZE(mx51efikamx_pads));
243 efika_board_common_init();
244
245 mx51_efikamx_board_id();
246
247 /* on < 1.2 boards both SD controllers are used */
248 if (system_rev < 0x12) {
249 imx51_add_sdhci_esdhc_imx(0, NULL);
250 imx51_add_sdhci_esdhc_imx(1, &sd_pdata);
251 mx51_efikamx_leds[2].default_trigger = "mmc1";
252 } else
253 imx51_add_sdhci_esdhc_imx(0, &sd_pdata);
254
255 gpio_led_register_device(-1, &mx51_efikamx_leds_data);
256 imx_add_gpio_keys(&mx51_efikamx_powerkey_data);
257
258 if (system_rev == 0x11) {
259 gpio_request(EFIKAMX_RESET1_1, "reset");
260 gpio_direction_output(EFIKAMX_RESET1_1, 1);
261 } else {
262 gpio_request(EFIKAMX_RESET, "reset");
263 gpio_direction_output(EFIKAMX_RESET, 1);
264 }
265
266 /*
267 * enable wifi by default only on mx
268 * sb and mx have same wlan pin but the value to enable it are
269 * different :/
270 */
271 gpio_request(EFIKA_WLAN_EN, "wlan_en");
272 gpio_direction_output(EFIKA_WLAN_EN, 0);
273 msleep(10);
274
275 gpio_request(EFIKA_WLAN_RESET, "wlan_rst");
276 gpio_direction_output(EFIKA_WLAN_RESET, 0);
277 msleep(10);
278 gpio_set_value(EFIKA_WLAN_RESET, 1);
279}
280
281static void __init mx51_efikamx_timer_init(void)
282{
283 mx51_clocks_init(32768, 24000000, 22579200, 24576000);
284}
285
286static struct sys_timer mx51_efikamx_timer = {
287 .init = mx51_efikamx_timer_init,
288};
289
290MACHINE_START(MX51_EFIKAMX, "Genesi Efika MX (Smarttop)")
291 .atag_offset = 0x100,
292 .map_io = mx51_map_io,
293 .init_early = imx51_init_early,
294 .init_irq = mx51_init_irq,
295 .handle_irq = imx51_handle_irq,
296 .timer = &mx51_efikamx_timer,
297 .init_machine = mx51_efikamx_init,
298 .init_late = mx51_efikamx_init_late,
299 .restart = mx51_efikamx_restart,
300MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx51_efikasb.c b/arch/arm/mach-imx/mach-mx51_efikasb.c
deleted file mode 100644
index fdbd181b97ef..000000000000
--- a/arch/arm/mach-imx/mach-mx51_efikasb.c
+++ /dev/null
@@ -1,296 +0,0 @@
1/*
2 * Copyright (C) Arnaud Patard <arnaud.patard@rtp-net.org>
3 *
4 * based on code from the following
5 * Copyright 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved.
6 * Copyright 2009-2010 Pegatron Corporation. All Rights Reserved.
7 * Copyright 2009-2010 Genesi USA, Inc. All Rights Reserved.
8 *
9 * The code contained herein is licensed under the GNU General Public
10 * License. You may obtain a copy of the GNU General Public License
11 * Version 2 or later at the following locations:
12 *
13 * http://www.opensource.org/licenses/gpl-license.html
14 * http://www.gnu.org/copyleft/gpl.html
15 */
16
17#include <linux/init.h>
18#include <linux/platform_device.h>
19#include <linux/i2c.h>
20#include <linux/gpio.h>
21#include <linux/leds.h>
22#include <linux/input.h>
23#include <linux/delay.h>
24#include <linux/io.h>
25#include <linux/spi/flash.h>
26#include <linux/spi/spi.h>
27#include <linux/mfd/mc13892.h>
28#include <linux/regulator/machine.h>
29#include <linux/regulator/consumer.h>
30#include <linux/usb/otg.h>
31#include <linux/usb/ulpi.h>
32#include <mach/ulpi.h>
33
34#include <mach/common.h>
35#include <mach/hardware.h>
36#include <mach/iomux-mx51.h>
37
38#include <asm/setup.h>
39#include <asm/system_info.h>
40#include <asm/mach-types.h>
41#include <asm/mach/arch.h>
42#include <asm/mach/time.h>
43
44#include "devices-imx51.h"
45#include "efika.h"
46
47#define EFIKASB_USBH2_STP IMX_GPIO_NR(2, 20)
48#define EFIKASB_GREEN_LED IMX_GPIO_NR(1, 3)
49#define EFIKASB_WHITE_LED IMX_GPIO_NR(2, 25)
50#define EFIKASB_PCBID0 IMX_GPIO_NR(2, 28)
51#define EFIKASB_PCBID1 IMX_GPIO_NR(2, 29)
52#define EFIKASB_PWRKEY IMX_GPIO_NR(2, 31)
53#define EFIKASB_LID IMX_GPIO_NR(3, 14)
54#define EFIKASB_POWEROFF IMX_GPIO_NR(4, 13)
55#define EFIKASB_RFKILL IMX_GPIO_NR(3, 1)
56
57#define MX51_PAD_PWRKEY IOMUX_PAD(0x48c, 0x0f8, 1, 0x0, 0, PAD_CTL_PUS_100K_UP | PAD_CTL_PKE)
58#define MX51_PAD_SD1_CD IOMUX_PAD(0x47c, 0x0e8, 1, __NA_, 0, MX51_ESDHC_PAD_CTRL)
59
60static iomux_v3_cfg_t mx51efikasb_pads[] = {
61 /* USB HOST2 */
62 MX51_PAD_EIM_D16__USBH2_DATA0,
63 MX51_PAD_EIM_D17__USBH2_DATA1,
64 MX51_PAD_EIM_D18__USBH2_DATA2,
65 MX51_PAD_EIM_D19__USBH2_DATA3,
66 MX51_PAD_EIM_D20__USBH2_DATA4,
67 MX51_PAD_EIM_D21__USBH2_DATA5,
68 MX51_PAD_EIM_D22__USBH2_DATA6,
69 MX51_PAD_EIM_D23__USBH2_DATA7,
70 MX51_PAD_EIM_A24__USBH2_CLK,
71 MX51_PAD_EIM_A25__USBH2_DIR,
72 MX51_PAD_EIM_A26__USBH2_STP,
73 MX51_PAD_EIM_A27__USBH2_NXT,
74
75 /* leds */
76 MX51_PAD_EIM_CS0__GPIO2_25,
77 MX51_PAD_GPIO1_3__GPIO1_3,
78
79 /* pcb id */
80 MX51_PAD_EIM_CS3__GPIO2_28,
81 MX51_PAD_EIM_CS4__GPIO2_29,
82
83 /* lid */
84 MX51_PAD_CSI1_VSYNC__GPIO3_14,
85
86 /* power key*/
87 MX51_PAD_PWRKEY,
88
89 /* wifi/bt button */
90 MX51_PAD_DI1_PIN12__GPIO3_1,
91
92 /* power off */
93 MX51_PAD_CSI2_VSYNC__GPIO4_13,
94
95 /* wdog reset */
96 MX51_PAD_GPIO1_4__WDOG1_WDOG_B,
97
98 /* BT */
99 MX51_PAD_EIM_A17__GPIO2_11,
100
101 MX51_PAD_SD1_CD,
102};
103
104static int initialize_usbh2_port(struct platform_device *pdev)
105{
106 iomux_v3_cfg_t usbh2stp = MX51_PAD_EIM_A26__USBH2_STP;
107 iomux_v3_cfg_t usbh2gpio = MX51_PAD_EIM_A26__GPIO2_20;
108
109 mxc_iomux_v3_setup_pad(usbh2gpio);
110 gpio_request(EFIKASB_USBH2_STP, "usbh2_stp");
111 gpio_direction_output(EFIKASB_USBH2_STP, 0);
112 msleep(1);
113 gpio_set_value(EFIKASB_USBH2_STP, 1);
114 msleep(1);
115
116 gpio_free(EFIKASB_USBH2_STP);
117 mxc_iomux_v3_setup_pad(usbh2stp);
118
119 mdelay(10);
120
121 return mx51_initialize_usb_hw(pdev->id, MXC_EHCI_ITC_NO_THRESHOLD);
122}
123
124static struct mxc_usbh_platform_data usbh2_config __initdata = {
125 .init = initialize_usbh2_port,
126 .portsc = MXC_EHCI_MODE_ULPI,
127};
128
129static void __init mx51_efikasb_usb(void)
130{
131 usbh2_config.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
132 ULPI_OTG_DRVVBUS_EXT | ULPI_OTG_EXTVBUSIND);
133 if (usbh2_config.otg)
134 imx51_add_mxc_ehci_hs(2, &usbh2_config);
135}
136
137static const struct gpio_led mx51_efikasb_leds[] __initconst = {
138 {
139 .name = "efikasb:green",
140 .default_trigger = "default-on",
141 .gpio = EFIKASB_GREEN_LED,
142 .active_low = 1,
143 },
144 {
145 .name = "efikasb:white",
146 .default_trigger = "caps",
147 .gpio = EFIKASB_WHITE_LED,
148 },
149};
150
151static const struct gpio_led_platform_data
152 mx51_efikasb_leds_data __initconst = {
153 .leds = mx51_efikasb_leds,
154 .num_leds = ARRAY_SIZE(mx51_efikasb_leds),
155};
156
157static struct gpio_keys_button mx51_efikasb_keys[] = {
158 {
159 .code = KEY_POWER,
160 .gpio = EFIKASB_PWRKEY,
161 .type = EV_KEY,
162 .desc = "Power Button",
163 .wakeup = 1,
164 .active_low = 1,
165 },
166 {
167 .code = SW_LID,
168 .gpio = EFIKASB_LID,
169 .type = EV_SW,
170 .desc = "Lid Switch",
171 .active_low = 1,
172 },
173 {
174 .code = KEY_RFKILL,
175 .gpio = EFIKASB_RFKILL,
176 .type = EV_KEY,
177 .desc = "rfkill",
178 .active_low = 1,
179 },
180};
181
182static const struct gpio_keys_platform_data mx51_efikasb_keys_data __initconst = {
183 .buttons = mx51_efikasb_keys,
184 .nbuttons = ARRAY_SIZE(mx51_efikasb_keys),
185};
186
187static struct esdhc_platform_data sd0_pdata = {
188#define EFIKASB_SD1_CD IMX_GPIO_NR(2, 27)
189 .cd_gpio = EFIKASB_SD1_CD,
190 .cd_type = ESDHC_CD_GPIO,
191 .wp_type = ESDHC_WP_CONTROLLER,
192};
193
194static struct esdhc_platform_data sd1_pdata = {
195 .cd_type = ESDHC_CD_CONTROLLER,
196 .wp_type = ESDHC_WP_CONTROLLER,
197};
198
199static struct regulator *pwgt1, *pwgt2;
200
201static void mx51_efikasb_power_off(void)
202{
203 gpio_set_value(EFIKA_USB_PHY_RESET, 0);
204
205 if (!IS_ERR(pwgt1) && !IS_ERR(pwgt2)) {
206 regulator_disable(pwgt2);
207 regulator_disable(pwgt1);
208 }
209 gpio_direction_output(EFIKASB_POWEROFF, 1);
210}
211
212static int __init mx51_efikasb_power_init(void)
213{
214 pwgt1 = regulator_get(NULL, "pwgt1");
215 pwgt2 = regulator_get(NULL, "pwgt2");
216 if (!IS_ERR(pwgt1) && !IS_ERR(pwgt2)) {
217 regulator_enable(pwgt1);
218 regulator_enable(pwgt2);
219 }
220 gpio_request(EFIKASB_POWEROFF, "poweroff");
221 pm_power_off = mx51_efikasb_power_off;
222
223 regulator_has_full_constraints();
224
225 return 0;
226}
227
228static void __init mx51_efikasb_init_late(void)
229{
230 imx51_init_late();
231 mx51_efikasb_power_init();
232}
233
234/* 01 R1.3 board
235 10 R2.0 board */
236static void __init mx51_efikasb_board_id(void)
237{
238 int id;
239
240 gpio_request(EFIKASB_PCBID0, "pcb id0");
241 gpio_direction_input(EFIKASB_PCBID0);
242 gpio_request(EFIKASB_PCBID1, "pcb id1");
243 gpio_direction_input(EFIKASB_PCBID1);
244
245 id = gpio_get_value(EFIKASB_PCBID0) ? 1 : 0;
246 id |= (gpio_get_value(EFIKASB_PCBID1) ? 1 : 0) << 1;
247
248 switch (id) {
249 default:
250 break;
251 case 1:
252 system_rev = 0x13;
253 break;
254 case 2:
255 system_rev = 0x20;
256 break;
257 }
258}
259
260static void __init efikasb_board_init(void)
261{
262 imx51_soc_init();
263
264 mxc_iomux_v3_setup_multiple_pads(mx51efikasb_pads,
265 ARRAY_SIZE(mx51efikasb_pads));
266 efika_board_common_init();
267
268 mx51_efikasb_board_id();
269 mx51_efikasb_usb();
270 imx51_add_sdhci_esdhc_imx(0, &sd0_pdata);
271 imx51_add_sdhci_esdhc_imx(1, &sd1_pdata);
272
273 gpio_led_register_device(-1, &mx51_efikasb_leds_data);
274 imx_add_gpio_keys(&mx51_efikasb_keys_data);
275}
276
277static void __init mx51_efikasb_timer_init(void)
278{
279 mx51_clocks_init(32768, 24000000, 22579200, 24576000);
280}
281
282static struct sys_timer mx51_efikasb_timer = {
283 .init = mx51_efikasb_timer_init,
284};
285
286MACHINE_START(MX51_EFIKASB, "Genesi Efika MX (Smartbook)")
287 .atag_offset = 0x100,
288 .map_io = mx51_map_io,
289 .init_early = imx51_init_early,
290 .init_irq = mx51_init_irq,
291 .handle_irq = imx51_handle_irq,
292 .init_machine = efikasb_board_init,
293 .init_late = mx51_efikasb_init_late,
294 .timer = &mx51_efikasb_timer,
295 .restart = mxc_restart,
296MACHINE_END
diff --git a/arch/arm/mach-imx/mx51_efika.c b/arch/arm/mach-imx/mx51_efika.c
deleted file mode 100644
index ee870c49bc63..000000000000
--- a/arch/arm/mach-imx/mx51_efika.c
+++ /dev/null
@@ -1,633 +0,0 @@
1/*
2 * based on code from the following
3 * Copyright 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved.
4 * Copyright 2009-2010 Pegatron Corporation. All Rights Reserved.
5 * Copyright 2009-2010 Genesi USA, Inc. All Rights Reserved.
6 *
7 * The code contained herein is licensed under the GNU General Public
8 * License. You may obtain a copy of the GNU General Public License
9 * Version 2 or later at the following locations:
10 *
11 * http://www.opensource.org/licenses/gpl-license.html
12 * http://www.gnu.org/copyleft/gpl.html
13 */
14
15#include <linux/init.h>
16#include <linux/platform_device.h>
17#include <linux/i2c.h>
18#include <linux/gpio.h>
19#include <linux/leds.h>
20#include <linux/input.h>
21#include <linux/delay.h>
22#include <linux/io.h>
23#include <linux/spi/flash.h>
24#include <linux/spi/spi.h>
25#include <linux/mfd/mc13892.h>
26#include <linux/regulator/machine.h>
27#include <linux/regulator/consumer.h>
28
29#include <mach/common.h>
30#include <mach/hardware.h>
31#include <mach/iomux-mx51.h>
32
33#include <linux/usb/otg.h>
34#include <linux/usb/ulpi.h>
35#include <mach/ulpi.h>
36
37#include <asm/setup.h>
38#include <asm/mach-types.h>
39#include <asm/mach/arch.h>
40#include <asm/mach/time.h>
41
42#include "devices-imx51.h"
43#include "efika.h"
44#include "cpu_op-mx51.h"
45
46#define MX51_USB_CTRL_1_OFFSET 0x10
47#define MX51_USB_CTRL_UH1_EXT_CLK_EN (1 << 25)
48#define MX51_USB_PLL_DIV_19_2_MHZ 0x01
49
50#define EFIKAMX_USB_HUB_RESET IMX_GPIO_NR(1, 5)
51#define EFIKAMX_USBH1_STP IMX_GPIO_NR(1, 27)
52
53#define EFIKAMX_SPI_CS0 IMX_GPIO_NR(4, 24)
54#define EFIKAMX_SPI_CS1 IMX_GPIO_NR(4, 25)
55
56#define EFIKAMX_PMIC IMX_GPIO_NR(1, 6)
57
58static iomux_v3_cfg_t mx51efika_pads[] = {
59 /* UART1 */
60 MX51_PAD_UART1_RXD__UART1_RXD,
61 MX51_PAD_UART1_TXD__UART1_TXD,
62 MX51_PAD_UART1_RTS__UART1_RTS,
63 MX51_PAD_UART1_CTS__UART1_CTS,
64
65 /* SD 1 */
66 MX51_PAD_SD1_CMD__SD1_CMD,
67 MX51_PAD_SD1_CLK__SD1_CLK,
68 MX51_PAD_SD1_DATA0__SD1_DATA0,
69 MX51_PAD_SD1_DATA1__SD1_DATA1,
70 MX51_PAD_SD1_DATA2__SD1_DATA2,
71 MX51_PAD_SD1_DATA3__SD1_DATA3,
72
73 /* SD 2 */
74 MX51_PAD_SD2_CMD__SD2_CMD,
75 MX51_PAD_SD2_CLK__SD2_CLK,
76 MX51_PAD_SD2_DATA0__SD2_DATA0,
77 MX51_PAD_SD2_DATA1__SD2_DATA1,
78 MX51_PAD_SD2_DATA2__SD2_DATA2,
79 MX51_PAD_SD2_DATA3__SD2_DATA3,
80
81 /* SD/MMC WP/CD */
82 MX51_PAD_GPIO1_0__SD1_CD,
83 MX51_PAD_GPIO1_1__SD1_WP,
84 MX51_PAD_GPIO1_7__SD2_WP,
85 MX51_PAD_GPIO1_8__SD2_CD,
86
87 /* spi */
88 MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI,
89 MX51_PAD_CSPI1_MISO__ECSPI1_MISO,
90 MX51_PAD_CSPI1_SS0__GPIO4_24,
91 MX51_PAD_CSPI1_SS1__GPIO4_25,
92 MX51_PAD_CSPI1_RDY__ECSPI1_RDY,
93 MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK,
94 MX51_PAD_GPIO1_6__GPIO1_6,
95
96 /* USB HOST1 */
97 MX51_PAD_USBH1_CLK__USBH1_CLK,
98 MX51_PAD_USBH1_DIR__USBH1_DIR,
99 MX51_PAD_USBH1_NXT__USBH1_NXT,
100 MX51_PAD_USBH1_DATA0__USBH1_DATA0,
101 MX51_PAD_USBH1_DATA1__USBH1_DATA1,
102 MX51_PAD_USBH1_DATA2__USBH1_DATA2,
103 MX51_PAD_USBH1_DATA3__USBH1_DATA3,
104 MX51_PAD_USBH1_DATA4__USBH1_DATA4,
105 MX51_PAD_USBH1_DATA5__USBH1_DATA5,
106 MX51_PAD_USBH1_DATA6__USBH1_DATA6,
107 MX51_PAD_USBH1_DATA7__USBH1_DATA7,
108
109 /* USB HUB RESET */
110 MX51_PAD_GPIO1_5__GPIO1_5,
111
112 /* WLAN */
113 MX51_PAD_EIM_A22__GPIO2_16,
114 MX51_PAD_EIM_A16__GPIO2_10,
115
116 /* USB PHY RESET */
117 MX51_PAD_EIM_D27__GPIO2_9,
118};
119
120/* Serial ports */
121static const struct imxuart_platform_data uart_pdata = {
122 .flags = IMXUART_HAVE_RTSCTS,
123};
124
125/* This function is board specific as the bit mask for the plldiv will also
126 * be different for other Freescale SoCs, thus a common bitmask is not
127 * possible and cannot get place in /plat-mxc/ehci.c.
128 */
129static int initialize_otg_port(struct platform_device *pdev)
130{
131 u32 v;
132 void __iomem *usb_base;
133 void __iomem *usbother_base;
134 usb_base = ioremap(MX51_USB_OTG_BASE_ADDR, SZ_4K);
135 if (!usb_base)
136 return -ENOMEM;
137 usbother_base = (void __iomem *)(usb_base + MX5_USBOTHER_REGS_OFFSET);
138
139 /* Set the PHY clock to 19.2MHz */
140 v = __raw_readl(usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET);
141 v &= ~MX5_USB_UTMI_PHYCTRL1_PLLDIV_MASK;
142 v |= MX51_USB_PLL_DIV_19_2_MHZ;
143 __raw_writel(v, usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET);
144 iounmap(usb_base);
145
146 mdelay(10);
147
148 return mx51_initialize_usb_hw(pdev->id, MXC_EHCI_INTERNAL_PHY);
149}
150
151static const struct mxc_usbh_platform_data dr_utmi_config __initconst = {
152 .init = initialize_otg_port,
153 .portsc = MXC_EHCI_UTMI_16BIT,
154};
155
156static int initialize_usbh1_port(struct platform_device *pdev)
157{
158 iomux_v3_cfg_t usbh1stp = MX51_PAD_USBH1_STP__USBH1_STP;
159 iomux_v3_cfg_t usbh1gpio = MX51_PAD_USBH1_STP__GPIO1_27;
160 u32 v;
161 void __iomem *usb_base;
162 void __iomem *socregs_base;
163
164 mxc_iomux_v3_setup_pad(usbh1gpio);
165 gpio_request(EFIKAMX_USBH1_STP, "usbh1_stp");
166 gpio_direction_output(EFIKAMX_USBH1_STP, 0);
167 msleep(1);
168 gpio_set_value(EFIKAMX_USBH1_STP, 1);
169 msleep(1);
170
171 usb_base = ioremap(MX51_USB_OTG_BASE_ADDR, SZ_4K);
172 socregs_base = (void __iomem *)(usb_base + MX5_USBOTHER_REGS_OFFSET);
173
174 /* The clock for the USBH1 ULPI port will come externally */
175 /* from the PHY. */
176 v = __raw_readl(socregs_base + MX51_USB_CTRL_1_OFFSET);
177 __raw_writel(v | MX51_USB_CTRL_UH1_EXT_CLK_EN,
178 socregs_base + MX51_USB_CTRL_1_OFFSET);
179
180 iounmap(usb_base);
181
182 gpio_free(EFIKAMX_USBH1_STP);
183 mxc_iomux_v3_setup_pad(usbh1stp);
184
185 mdelay(10);
186
187 return mx51_initialize_usb_hw(pdev->id, MXC_EHCI_ITC_NO_THRESHOLD);
188}
189
190static struct mxc_usbh_platform_data usbh1_config __initdata = {
191 .init = initialize_usbh1_port,
192 .portsc = MXC_EHCI_MODE_ULPI,
193};
194
195static void mx51_efika_hubreset(void)
196{
197 gpio_request(EFIKAMX_USB_HUB_RESET, "usb_hub_rst");
198 gpio_direction_output(EFIKAMX_USB_HUB_RESET, 1);
199 msleep(1);
200 gpio_set_value(EFIKAMX_USB_HUB_RESET, 0);
201 msleep(1);
202 gpio_set_value(EFIKAMX_USB_HUB_RESET, 1);
203}
204
205static void __init mx51_efika_usb(void)
206{
207 mx51_efika_hubreset();
208
209 /* pulling it low, means no USB at all... */
210 gpio_request(EFIKA_USB_PHY_RESET, "usb_phy_reset");
211 gpio_direction_output(EFIKA_USB_PHY_RESET, 0);
212 msleep(1);
213 gpio_set_value(EFIKA_USB_PHY_RESET, 1);
214
215 usbh1_config.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
216 ULPI_OTG_DRVVBUS_EXT | ULPI_OTG_EXTVBUSIND);
217
218 imx51_add_mxc_ehci_otg(&dr_utmi_config);
219 if (usbh1_config.otg)
220 imx51_add_mxc_ehci_hs(1, &usbh1_config);
221}
222
223static struct mtd_partition mx51_efika_spi_nor_partitions[] = {
224 {
225 .name = "u-boot",
226 .offset = 0,
227 .size = SZ_256K,
228 },
229 {
230 .name = "config",
231 .offset = MTDPART_OFS_APPEND,
232 .size = SZ_64K,
233 },
234};
235
236static struct flash_platform_data mx51_efika_spi_flash_data = {
237 .name = "spi_flash",
238 .parts = mx51_efika_spi_nor_partitions,
239 .nr_parts = ARRAY_SIZE(mx51_efika_spi_nor_partitions),
240 .type = "sst25vf032b",
241};
242
243static struct regulator_consumer_supply sw1_consumers[] = {
244 {
245 .supply = "cpu_vcc",
246 }
247};
248
249static struct regulator_consumer_supply vdig_consumers[] = {
250 /* sgtl5000 */
251 REGULATOR_SUPPLY("VDDA", "1-000a"),
252 REGULATOR_SUPPLY("VDDD", "1-000a"),
253};
254
255static struct regulator_consumer_supply vvideo_consumers[] = {
256 /* sgtl5000 */
257 REGULATOR_SUPPLY("VDDIO", "1-000a"),
258};
259
260static struct regulator_consumer_supply vsd_consumers[] = {
261 REGULATOR_SUPPLY("vmmc", "sdhci-esdhc-imx51.0"),
262 REGULATOR_SUPPLY("vmmc", "sdhci-esdhc-imx51.1"),
263};
264
265static struct regulator_consumer_supply pwgt1_consumer[] = {
266 {
267 .supply = "pwgt1",
268 }
269};
270
271static struct regulator_consumer_supply pwgt2_consumer[] = {
272 {
273 .supply = "pwgt2",
274 }
275};
276
277static struct regulator_consumer_supply coincell_consumer[] = {
278 {
279 .supply = "coincell",
280 }
281};
282
283static struct regulator_init_data sw1_init = {
284 .constraints = {
285 .name = "SW1",
286 .min_uV = 600000,
287 .max_uV = 1375000,
288 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
289 .valid_modes_mask = 0,
290 .always_on = 1,
291 .boot_on = 1,
292 .state_mem = {
293 .uV = 850000,
294 .mode = REGULATOR_MODE_NORMAL,
295 .enabled = 1,
296 },
297 },
298 .num_consumer_supplies = ARRAY_SIZE(sw1_consumers),
299 .consumer_supplies = sw1_consumers,
300};
301
302static struct regulator_init_data sw2_init = {
303 .constraints = {
304 .name = "SW2",
305 .min_uV = 900000,
306 .max_uV = 1850000,
307 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
308 .always_on = 1,
309 .boot_on = 1,
310 .state_mem = {
311 .uV = 950000,
312 .mode = REGULATOR_MODE_NORMAL,
313 .enabled = 1,
314 },
315 }
316};
317
318static struct regulator_init_data sw3_init = {
319 .constraints = {
320 .name = "SW3",
321 .min_uV = 1100000,
322 .max_uV = 1850000,
323 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
324 .always_on = 1,
325 .boot_on = 1,
326 }
327};
328
329static struct regulator_init_data sw4_init = {
330 .constraints = {
331 .name = "SW4",
332 .min_uV = 1100000,
333 .max_uV = 1850000,
334 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
335 .always_on = 1,
336 .boot_on = 1,
337 }
338};
339
340static struct regulator_init_data viohi_init = {
341 .constraints = {
342 .name = "VIOHI",
343 .boot_on = 1,
344 .always_on = 1,
345 }
346};
347
348static struct regulator_init_data vusb_init = {
349 .constraints = {
350 .name = "VUSB",
351 .boot_on = 1,
352 .always_on = 1,
353 }
354};
355
356static struct regulator_init_data swbst_init = {
357 .constraints = {
358 .name = "SWBST",
359 }
360};
361
362static struct regulator_init_data vdig_init = {
363 .constraints = {
364 .name = "VDIG",
365 .min_uV = 1050000,
366 .max_uV = 1800000,
367 .valid_ops_mask =
368 REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS,
369 .boot_on = 1,
370 .always_on = 1,
371 },
372 .num_consumer_supplies = ARRAY_SIZE(vdig_consumers),
373 .consumer_supplies = vdig_consumers,
374};
375
376static struct regulator_init_data vpll_init = {
377 .constraints = {
378 .name = "VPLL",
379 .min_uV = 1050000,
380 .max_uV = 1800000,
381 .valid_ops_mask =
382 REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS,
383 .boot_on = 1,
384 .always_on = 1,
385 }
386};
387
388static struct regulator_init_data vusb2_init = {
389 .constraints = {
390 .name = "VUSB2",
391 .min_uV = 2400000,
392 .max_uV = 2775000,
393 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
394 .boot_on = 1,
395 .always_on = 1,
396 }
397};
398
399static struct regulator_init_data vvideo_init = {
400 .constraints = {
401 .name = "VVIDEO",
402 .min_uV = 2775000,
403 .max_uV = 2775000,
404 .valid_ops_mask =
405 REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS,
406 .boot_on = 1,
407 .apply_uV = 1,
408 },
409 .num_consumer_supplies = ARRAY_SIZE(vvideo_consumers),
410 .consumer_supplies = vvideo_consumers,
411};
412
413static struct regulator_init_data vaudio_init = {
414 .constraints = {
415 .name = "VAUDIO",
416 .min_uV = 2300000,
417 .max_uV = 3000000,
418 .valid_ops_mask =
419 REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS,
420 .boot_on = 1,
421 }
422};
423
424static struct regulator_init_data vsd_init = {
425 .constraints = {
426 .name = "VSD",
427 .min_uV = 1800000,
428 .max_uV = 3150000,
429 .valid_ops_mask =
430 REGULATOR_CHANGE_VOLTAGE,
431 .boot_on = 1,
432 },
433 .num_consumer_supplies = ARRAY_SIZE(vsd_consumers),
434 .consumer_supplies = vsd_consumers,
435};
436
437static struct regulator_init_data vcam_init = {
438 .constraints = {
439 .name = "VCAM",
440 .min_uV = 2500000,
441 .max_uV = 3000000,
442 .valid_ops_mask =
443 REGULATOR_CHANGE_VOLTAGE |
444 REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS,
445 .valid_modes_mask = REGULATOR_MODE_FAST | REGULATOR_MODE_NORMAL,
446 .boot_on = 1,
447 }
448};
449
450static struct regulator_init_data vgen1_init = {
451 .constraints = {
452 .name = "VGEN1",
453 .min_uV = 1200000,
454 .max_uV = 3150000,
455 .valid_ops_mask =
456 REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS,
457 .boot_on = 1,
458 .always_on = 1,
459 }
460};
461
462static struct regulator_init_data vgen2_init = {
463 .constraints = {
464 .name = "VGEN2",
465 .min_uV = 1200000,
466 .max_uV = 3150000,
467 .valid_ops_mask =
468 REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS,
469 .boot_on = 1,
470 .always_on = 1,
471 }
472};
473
474static struct regulator_init_data vgen3_init = {
475 .constraints = {
476 .name = "VGEN3",
477 .min_uV = 1800000,
478 .max_uV = 2900000,
479 .valid_ops_mask =
480 REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS,
481 .boot_on = 1,
482 .always_on = 1,
483 }
484};
485
486static struct regulator_init_data gpo1_init = {
487 .constraints = {
488 .name = "GPO1",
489 }
490};
491
492static struct regulator_init_data gpo2_init = {
493 .constraints = {
494 .name = "GPO2",
495 }
496};
497
498static struct regulator_init_data gpo3_init = {
499 .constraints = {
500 .name = "GPO3",
501 }
502};
503
504static struct regulator_init_data gpo4_init = {
505 .constraints = {
506 .name = "GPO4",
507 }
508};
509
510static struct regulator_init_data pwgt1_init = {
511 .constraints = {
512 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
513 .boot_on = 1,
514 },
515 .num_consumer_supplies = ARRAY_SIZE(pwgt1_consumer),
516 .consumer_supplies = pwgt1_consumer,
517};
518
519static struct regulator_init_data pwgt2_init = {
520 .constraints = {
521 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
522 .boot_on = 1,
523 },
524 .num_consumer_supplies = ARRAY_SIZE(pwgt2_consumer),
525 .consumer_supplies = pwgt2_consumer,
526};
527
528static struct regulator_init_data vcoincell_init = {
529 .constraints = {
530 .name = "COINCELL",
531 .min_uV = 3000000,
532 .max_uV = 3000000,
533 .valid_ops_mask =
534 REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS,
535 },
536 .num_consumer_supplies = ARRAY_SIZE(coincell_consumer),
537 .consumer_supplies = coincell_consumer,
538};
539
540static struct mc13xxx_regulator_init_data mx51_efika_regulators[] = {
541 { .id = MC13892_SW1, .init_data = &sw1_init },
542 { .id = MC13892_SW2, .init_data = &sw2_init },
543 { .id = MC13892_SW3, .init_data = &sw3_init },
544 { .id = MC13892_SW4, .init_data = &sw4_init },
545 { .id = MC13892_SWBST, .init_data = &swbst_init },
546 { .id = MC13892_VIOHI, .init_data = &viohi_init },
547 { .id = MC13892_VPLL, .init_data = &vpll_init },
548 { .id = MC13892_VDIG, .init_data = &vdig_init },
549 { .id = MC13892_VSD, .init_data = &vsd_init },
550 { .id = MC13892_VUSB2, .init_data = &vusb2_init },
551 { .id = MC13892_VVIDEO, .init_data = &vvideo_init },
552 { .id = MC13892_VAUDIO, .init_data = &vaudio_init },
553 { .id = MC13892_VCAM, .init_data = &vcam_init },
554 { .id = MC13892_VGEN1, .init_data = &vgen1_init },
555 { .id = MC13892_VGEN2, .init_data = &vgen2_init },
556 { .id = MC13892_VGEN3, .init_data = &vgen3_init },
557 { .id = MC13892_VUSB, .init_data = &vusb_init },
558 { .id = MC13892_GPO1, .init_data = &gpo1_init },
559 { .id = MC13892_GPO2, .init_data = &gpo2_init },
560 { .id = MC13892_GPO3, .init_data = &gpo3_init },
561 { .id = MC13892_GPO4, .init_data = &gpo4_init },
562 { .id = MC13892_PWGT1SPI, .init_data = &pwgt1_init },
563 { .id = MC13892_PWGT2SPI, .init_data = &pwgt2_init },
564 { .id = MC13892_VCOINCELL, .init_data = &vcoincell_init },
565};
566
567static struct mc13xxx_platform_data mx51_efika_mc13892_data = {
568 .flags = MC13XXX_USE_RTC,
569 .regulators = {
570 .num_regulators = ARRAY_SIZE(mx51_efika_regulators),
571 .regulators = mx51_efika_regulators,
572 },
573};
574
575static struct spi_board_info mx51_efika_spi_board_info[] __initdata = {
576 {
577 .modalias = "m25p80",
578 .max_speed_hz = 25000000,
579 .bus_num = 0,
580 .chip_select = 1,
581 .platform_data = &mx51_efika_spi_flash_data,
582 .irq = -1,
583 },
584 {
585 .modalias = "mc13892",
586 .max_speed_hz = 1000000,
587 .bus_num = 0,
588 .chip_select = 0,
589 .platform_data = &mx51_efika_mc13892_data,
590 /* irq number is run-time assigned */
591 },
592};
593
594static int mx51_efika_spi_cs[] = {
595 EFIKAMX_SPI_CS0,
596 EFIKAMX_SPI_CS1,
597};
598
599static const struct spi_imx_master mx51_efika_spi_pdata __initconst = {
600 .chipselect = mx51_efika_spi_cs,
601 .num_chipselect = ARRAY_SIZE(mx51_efika_spi_cs),
602};
603
604void __init efika_board_common_init(void)
605{
606 mxc_iomux_v3_setup_multiple_pads(mx51efika_pads,
607 ARRAY_SIZE(mx51efika_pads));
608 imx51_add_imx_uart(0, &uart_pdata);
609 mx51_efika_usb();
610
611 /* FIXME: comes from original code. check this. */
612 if (mx51_revision() < IMX_CHIP_REVISION_2_0)
613 sw2_init.constraints.state_mem.uV = 1100000;
614 else if (mx51_revision() == IMX_CHIP_REVISION_2_0) {
615 sw2_init.constraints.state_mem.uV = 1250000;
616 sw1_init.constraints.state_mem.uV = 1000000;
617 }
618 if (machine_is_mx51_efikasb())
619 vgen1_init.constraints.max_uV = 1200000;
620
621 gpio_request(EFIKAMX_PMIC, "pmic irq");
622 gpio_direction_input(EFIKAMX_PMIC);
623 mx51_efika_spi_board_info[1].irq = gpio_to_irq(EFIKAMX_PMIC);
624 spi_register_board_info(mx51_efika_spi_board_info,
625 ARRAY_SIZE(mx51_efika_spi_board_info));
626 imx51_add_ecspi(0, &mx51_efika_spi_pdata);
627
628 imx51_add_pata_imx();
629
630#if defined(CONFIG_CPU_FREQ_IMX)
631 get_cpu_op = mx51_get_cpu_op;
632#endif
633}
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-13 01:13:00 -0400