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authorSergei Shtylyov <sshtylyov@dev.rtsoft.ru>2005-11-25 14:08:08 -0500
committer <ralf@denk.linux-mips.net>2006-01-10 08:39:07 -0500
commitc5c64e22834c9f43f246072b4dcb293c9cea0ebe (patch)
treedad15a47f9b7ab23231952871aa3b624c1e99778
parent29ce2c765ca9a41be6f31aa1770e8ee3ee48cd21 (diff)
MIPS: Au1550: Fix OHCI memory map size
USB OpenHCI host controller on Au1550 only decodes memory addresses from 0x14020000 to 0x1407FFFF according to the databook, which gives 0x60000 (on the prior Au1x00 chips the map size was 1MB). Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Acked-by: Jordan Crouse <jordan.crouse@amd.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--include/asm-mips/mach-au1x00/au1000.h7
1 files changed, 5 insertions, 2 deletions
diff --git a/include/asm-mips/mach-au1x00/au1000.h b/include/asm-mips/mach-au1x00/au1000.h
index 8327ec341c18..8e1d7ed7d8e3 100644
--- a/include/asm-mips/mach-au1x00/au1000.h
+++ b/include/asm-mips/mach-au1x00/au1000.h
@@ -838,6 +838,7 @@ extern au1xxx_irq_map_t au1xxx_irq_map[];
838#define UART3_ADDR 0xB1400000 838#define UART3_ADDR 0xB1400000
839 839
840#define USB_OHCI_BASE 0x14020000 // phys addr for ioremap 840#define USB_OHCI_BASE 0x14020000 // phys addr for ioremap
841#define USB_OHCI_LEN 0x00060000
841#define USB_HOST_CONFIG 0xB4027ffc 842#define USB_HOST_CONFIG 0xB4027ffc
842 843
843#define AU1550_ETH0_BASE 0xB0500000 844#define AU1550_ETH0_BASE 0xB0500000
@@ -1017,10 +1018,12 @@ extern au1xxx_irq_map_t au1xxx_irq_map[];
1017 #define I2S_CONTROL_D (1<<1) 1018 #define I2S_CONTROL_D (1<<1)
1018 #define I2S_CONTROL_CE (1<<0) 1019 #define I2S_CONTROL_CE (1<<0)
1019 1020
1020#ifndef CONFIG_SOC_AU1200
1021
1022/* USB Host Controller */ 1021/* USB Host Controller */
1022#ifndef USB_OHCI_LEN
1023#define USB_OHCI_LEN 0x00100000 1023#define USB_OHCI_LEN 0x00100000
1024#endif
1025
1026#ifndef CONFIG_SOC_AU1200
1024 1027
1025/* USB Device Controller */ 1028/* USB Device Controller */
1026#define USBD_EP0RD 0xB0200000 1029#define USBD_EP0RD 0xB0200000