diff options
author | Antoine Tenart <antoine.tenart@free-electrons.com> | 2014-11-17 08:35:44 -0500 |
---|---|---|
committer | Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> | 2014-11-18 14:31:45 -0500 |
commit | c539711ee79f997b0cdc136382167963932461b8 (patch) | |
tree | 9360dc6b873fd6508e72ad39235caefb14cd0ab8 | |
parent | 9f6386e1ee3ad9cae0175a76d1e689c2c4b311a0 (diff) |
ARM: dts: berlin: add BG2Q nodes for USB support
Adds nodes describing the Marvell Berlin BG2Q USB PHY and USB. The BG2Q
SoC has 3 USB host controller, compatible with ChipIdea.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
-rw-r--r-- | arch/arm/boot/dts/berlin2q.dtsi | 54 |
1 files changed, 54 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi index a35deb37ffb5..35253c947a7c 100644 --- a/arch/arm/boot/dts/berlin2q.dtsi +++ b/arch/arm/boot/dts/berlin2q.dtsi | |||
@@ -114,6 +114,40 @@ | |||
114 | #interrupt-cells = <3>; | 114 | #interrupt-cells = <3>; |
115 | }; | 115 | }; |
116 | 116 | ||
117 | usb_phy2: phy@a2f400 { | ||
118 | compatible = "marvell,berlin2-usb-phy"; | ||
119 | reg = <0xa2f400 0x128>; | ||
120 | #phy-cells = <0>; | ||
121 | resets = <&chip 0x104 14>; | ||
122 | status = "disabled"; | ||
123 | }; | ||
124 | |||
125 | usb2: usb@a30000 { | ||
126 | compatible = "chipidea,usb2"; | ||
127 | reg = <0xa30000 0x10000>; | ||
128 | interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; | ||
129 | clocks = <&chip CLKID_USB2>; | ||
130 | phys = <&usb_phy2>; | ||
131 | phy-names = "usb-phy"; | ||
132 | status = "disabled"; | ||
133 | }; | ||
134 | |||
135 | usb_phy0: phy@b74000 { | ||
136 | compatible = "marvell,berlin2-usb-phy"; | ||
137 | reg = <0xb74000 0x128>; | ||
138 | #phy-cells = <0>; | ||
139 | resets = <&chip 0x104 12>; | ||
140 | status = "disabled"; | ||
141 | }; | ||
142 | |||
143 | usb_phy1: phy@b78000 { | ||
144 | compatible = "marvell,berlin2-usb-phy"; | ||
145 | reg = <0xb78000 0x128>; | ||
146 | #phy-cells = <0>; | ||
147 | resets = <&chip 0x104 13>; | ||
148 | status = "disabled"; | ||
149 | }; | ||
150 | |||
117 | eth0: ethernet@b90000 { | 151 | eth0: ethernet@b90000 { |
118 | compatible = "marvell,pxa168-eth"; | 152 | compatible = "marvell,pxa168-eth"; |
119 | reg = <0xb90000 0x10000>; | 153 | reg = <0xb90000 0x10000>; |
@@ -404,6 +438,26 @@ | |||
404 | }; | 438 | }; |
405 | }; | 439 | }; |
406 | 440 | ||
441 | usb0: usb@ed0000 { | ||
442 | compatible = "chipidea,usb2"; | ||
443 | reg = <0xed0000 0x10000>; | ||
444 | interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; | ||
445 | clocks = <&chip CLKID_USB0>; | ||
446 | phys = <&usb_phy0>; | ||
447 | phy-names = "usb-phy"; | ||
448 | status = "disabled"; | ||
449 | }; | ||
450 | |||
451 | usb1: usb@ee0000 { | ||
452 | compatible = "chipidea,usb2"; | ||
453 | reg = <0xee0000 0x10000>; | ||
454 | interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; | ||
455 | clocks = <&chip CLKID_USB1>; | ||
456 | phys = <&usb_phy1>; | ||
457 | phy-names = "usb-phy"; | ||
458 | status = "disabled"; | ||
459 | }; | ||
460 | |||
407 | apb@fc0000 { | 461 | apb@fc0000 { |
408 | compatible = "simple-bus"; | 462 | compatible = "simple-bus"; |
409 | #address-cells = <1>; | 463 | #address-cells = <1>; |