diff options
author | Chew, Chiau Ee <chiau.ee.chew@intel.com> | 2013-11-28 13:13:11 -0500 |
---|---|---|
committer | Mark Brown <broonie@linaro.org> | 2013-11-28 06:23:37 -0500 |
commit | c50325f7bcb8a3ceaacb9dbc41180b1cbbae7b5e (patch) | |
tree | a1a133a87129f779abad37eaa3861b84f7ddc816 | |
parent | 54acbd9688e6324470671525c7916011f1ff8081 (diff) |
spi/pxa2xx: Restore private register bits.
The Intel LPSS SPI private register bits have to be restored
when system resume from S3 suspend.
Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
-rw-r--r-- | drivers/spi/spi-pxa2xx.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c index 7028180a020a..7765b1999537 100644 --- a/drivers/spi/spi-pxa2xx.c +++ b/drivers/spi/spi-pxa2xx.c | |||
@@ -1293,6 +1293,9 @@ static int pxa2xx_spi_resume(struct device *dev) | |||
1293 | /* Enable the SSP clock */ | 1293 | /* Enable the SSP clock */ |
1294 | clk_prepare_enable(ssp->clk); | 1294 | clk_prepare_enable(ssp->clk); |
1295 | 1295 | ||
1296 | /* Restore LPSS private register bits */ | ||
1297 | lpss_ssp_setup(drv_data); | ||
1298 | |||
1296 | /* Start the queue running */ | 1299 | /* Start the queue running */ |
1297 | status = spi_master_resume(drv_data->master); | 1300 | status = spi_master_resume(drv_data->master); |
1298 | if (status != 0) { | 1301 | if (status != 0) { |