diff options
| author | Lennert Buytenhek <buytenh@wantstofly.org> | 2010-11-29 05:12:06 -0500 |
|---|---|---|
| committer | Lennert Buytenhek <buytenh@wantstofly.org> | 2011-01-13 11:18:58 -0500 |
| commit | c4e8964e4eb3ea4edc34e1832d1691468f326beb (patch) | |
| tree | 7b5ff77775880af151cbf09ff64447588f31dac7 | |
| parent | 9a364da73d84bb5181fc8a0f85d497b596f0d560 (diff) | |
ARM: sa1100: irq_data conversion.
Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
| -rw-r--r-- | arch/arm/mach-sa1100/irq.c | 84 | ||||
| -rw-r--r-- | arch/arm/mach-sa1100/neponset.c | 8 |
2 files changed, 46 insertions, 46 deletions
diff --git a/arch/arm/mach-sa1100/irq.c b/arch/arm/mach-sa1100/irq.c index 3093d46a9c6f..3d85dfad9c1f 100644 --- a/arch/arm/mach-sa1100/irq.c +++ b/arch/arm/mach-sa1100/irq.c | |||
| @@ -37,14 +37,14 @@ static int GPIO_IRQ_mask = (1 << 11) - 1; | |||
| 37 | #define GPIO_11_27_IRQ(i) ((i) - 21) | 37 | #define GPIO_11_27_IRQ(i) ((i) - 21) |
| 38 | #define GPIO11_27_MASK(irq) (1 << GPIO_11_27_IRQ(irq)) | 38 | #define GPIO11_27_MASK(irq) (1 << GPIO_11_27_IRQ(irq)) |
| 39 | 39 | ||
| 40 | static int sa1100_gpio_type(unsigned int irq, unsigned int type) | 40 | static int sa1100_gpio_type(struct irq_data *d, unsigned int type) |
| 41 | { | 41 | { |
| 42 | unsigned int mask; | 42 | unsigned int mask; |
| 43 | 43 | ||
| 44 | if (irq <= 10) | 44 | if (d->irq <= 10) |
| 45 | mask = 1 << irq; | 45 | mask = 1 << d->irq; |
| 46 | else | 46 | else |
| 47 | mask = GPIO11_27_MASK(irq); | 47 | mask = GPIO11_27_MASK(d->irq); |
| 48 | 48 | ||
| 49 | if (type == IRQ_TYPE_PROBE) { | 49 | if (type == IRQ_TYPE_PROBE) { |
| 50 | if ((GPIO_IRQ_rising_edge | GPIO_IRQ_falling_edge) & mask) | 50 | if ((GPIO_IRQ_rising_edge | GPIO_IRQ_falling_edge) & mask) |
| @@ -70,37 +70,37 @@ static int sa1100_gpio_type(unsigned int irq, unsigned int type) | |||
| 70 | /* | 70 | /* |
| 71 | * GPIO IRQs must be acknowledged. This is for IRQs from 0 to 10. | 71 | * GPIO IRQs must be acknowledged. This is for IRQs from 0 to 10. |
| 72 | */ | 72 | */ |
| 73 | static void sa1100_low_gpio_ack(unsigned int irq) | 73 | static void sa1100_low_gpio_ack(struct irq_data *d) |
| 74 | { | 74 | { |
| 75 | GEDR = (1 << irq); | 75 | GEDR = (1 << d->irq); |
| 76 | } | 76 | } |
| 77 | 77 | ||
| 78 | static void sa1100_low_gpio_mask(unsigned int irq) | 78 | static void sa1100_low_gpio_mask(struct irq_data *d) |
| 79 | { | 79 | { |
| 80 | ICMR &= ~(1 << irq); | 80 | ICMR &= ~(1 << d->irq); |
| 81 | } | 81 | } |
| 82 | 82 | ||
| 83 | static void sa1100_low_gpio_unmask(unsigned int irq) | 83 | static void sa1100_low_gpio_unmask(struct irq_data *d) |
| 84 | { | 84 | { |
| 85 | ICMR |= 1 << irq; | 85 | ICMR |= 1 << d->irq; |
| 86 | } | 86 | } |
| 87 | 87 | ||
| 88 | static int sa1100_low_gpio_wake(unsigned int irq, unsigned int on) | 88 | static int sa1100_low_gpio_wake(struct irq_data *d, unsigned int on) |
| 89 | { | 89 | { |
| 90 | if (on) | 90 | if (on) |
| 91 | PWER |= 1 << irq; | 91 | PWER |= 1 << d->irq; |
| 92 | else | 92 | else |
| 93 | PWER &= ~(1 << irq); | 93 | PWER &= ~(1 << d->irq); |
| 94 | return 0; | 94 | return 0; |
| 95 | } | 95 | } |
| 96 | 96 | ||
| 97 | static struct irq_chip sa1100_low_gpio_chip = { | 97 | static struct irq_chip sa1100_low_gpio_chip = { |
| 98 | .name = "GPIO-l", | 98 | .name = "GPIO-l", |
| 99 | .ack = sa1100_low_gpio_ack, | 99 | .irq_ack = sa1100_low_gpio_ack, |
| 100 | .mask = sa1100_low_gpio_mask, | 100 | .irq_mask = sa1100_low_gpio_mask, |
| 101 | .unmask = sa1100_low_gpio_unmask, | 101 | .irq_unmask = sa1100_low_gpio_unmask, |
| 102 | .set_type = sa1100_gpio_type, | 102 | .irq_set_type = sa1100_gpio_type, |
| 103 | .set_wake = sa1100_low_gpio_wake, | 103 | .irq_set_wake = sa1100_low_gpio_wake, |
| 104 | }; | 104 | }; |
| 105 | 105 | ||
| 106 | /* | 106 | /* |
| @@ -139,16 +139,16 @@ sa1100_high_gpio_handler(unsigned int irq, struct irq_desc *desc) | |||
| 139 | * In addition, the IRQs are all collected up into one bit in the | 139 | * In addition, the IRQs are all collected up into one bit in the |
| 140 | * interrupt controller registers. | 140 | * interrupt controller registers. |
| 141 | */ | 141 | */ |
| 142 | static void sa1100_high_gpio_ack(unsigned int irq) | 142 | static void sa1100_high_gpio_ack(struct irq_data *d) |
| 143 | { | 143 | { |
| 144 | unsigned int mask = GPIO11_27_MASK(irq); | 144 | unsigned int mask = GPIO11_27_MASK(d->irq); |
| 145 | 145 | ||
| 146 | GEDR = mask; | 146 | GEDR = mask; |
| 147 | } | 147 | } |
| 148 | 148 | ||
| 149 | static void sa1100_high_gpio_mask(unsigned int irq) | 149 | static void sa1100_high_gpio_mask(struct irq_data *d) |
| 150 | { | 150 | { |
| 151 | unsigned int mask = GPIO11_27_MASK(irq); | 151 | unsigned int mask = GPIO11_27_MASK(d->irq); |
| 152 | 152 | ||
| 153 | GPIO_IRQ_mask &= ~mask; | 153 | GPIO_IRQ_mask &= ~mask; |
| 154 | 154 | ||
| @@ -156,9 +156,9 @@ static void sa1100_high_gpio_mask(unsigned int irq) | |||
| 156 | GFER &= ~mask; | 156 | GFER &= ~mask; |
| 157 | } | 157 | } |
| 158 | 158 | ||
| 159 | static void sa1100_high_gpio_unmask(unsigned int irq) | 159 | static void sa1100_high_gpio_unmask(struct irq_data *d) |
| 160 | { | 160 | { |
| 161 | unsigned int mask = GPIO11_27_MASK(irq); | 161 | unsigned int mask = GPIO11_27_MASK(d->irq); |
| 162 | 162 | ||
| 163 | GPIO_IRQ_mask |= mask; | 163 | GPIO_IRQ_mask |= mask; |
| 164 | 164 | ||
| @@ -166,44 +166,44 @@ static void sa1100_high_gpio_unmask(unsigned int irq) | |||
| 166 | GFER = GPIO_IRQ_falling_edge & GPIO_IRQ_mask; | 166 | GFER = GPIO_IRQ_falling_edge & GPIO_IRQ_mask; |
| 167 | } | 167 | } |
| 168 | 168 | ||
| 169 | static int sa1100_high_gpio_wake(unsigned int irq, unsigned int on) | 169 | static int sa1100_high_gpio_wake(struct irq_data *d, unsigned int on) |
| 170 | { | 170 | { |
| 171 | if (on) | 171 | if (on) |
| 172 | PWER |= GPIO11_27_MASK(irq); | 172 | PWER |= GPIO11_27_MASK(d->irq); |
| 173 | else | 173 | else |
| 174 | PWER &= ~GPIO11_27_MASK(irq); | 174 | PWER &= ~GPIO11_27_MASK(d->irq); |
| 175 | return 0; | 175 | return 0; |
| 176 | } | 176 | } |
| 177 | 177 | ||
| 178 | static struct irq_chip sa1100_high_gpio_chip = { | 178 | static struct irq_chip sa1100_high_gpio_chip = { |
| 179 | .name = "GPIO-h", | 179 | .name = "GPIO-h", |
| 180 | .ack = sa1100_high_gpio_ack, | 180 | .irq_ack = sa1100_high_gpio_ack, |
| 181 | .mask = sa1100_high_gpio_mask, | 181 | .irq_mask = sa1100_high_gpio_mask, |
| 182 | .unmask = sa1100_high_gpio_unmask, | 182 | .irq_unmask = sa1100_high_gpio_unmask, |
| 183 | .set_type = sa1100_gpio_type, | 183 | .irq_set_type = sa1100_gpio_type, |
| 184 | .set_wake = sa1100_high_gpio_wake, | 184 | .irq_set_wake = sa1100_high_gpio_wake, |
| 185 | }; | 185 | }; |
| 186 | 186 | ||
| 187 | /* | 187 | /* |
| 188 | * We don't need to ACK IRQs on the SA1100 unless they're GPIOs | 188 | * We don't need to ACK IRQs on the SA1100 unless they're GPIOs |
| 189 | * this is for internal IRQs i.e. from 11 to 31. | 189 | * this is for internal IRQs i.e. from 11 to 31. |
| 190 | */ | 190 | */ |
| 191 | static void sa1100_mask_irq(unsigned int irq) | 191 | static void sa1100_mask_irq(struct irq_data *d) |
| 192 | { | 192 | { |
| 193 | ICMR &= ~(1 << irq); | 193 | ICMR &= ~(1 << d->irq); |
| 194 | } | 194 | } |
| 195 | 195 | ||
| 196 | static void sa1100_unmask_irq(unsigned int irq) | 196 | static void sa1100_unmask_irq(struct irq_data *d) |
| 197 | { | 197 | { |
| 198 | ICMR |= (1 << irq); | 198 | ICMR |= (1 << d->irq); |
| 199 | } | 199 | } |
| 200 | 200 | ||
| 201 | /* | 201 | /* |
| 202 | * Apart form GPIOs, only the RTC alarm can be a wakeup event. | 202 | * Apart form GPIOs, only the RTC alarm can be a wakeup event. |
| 203 | */ | 203 | */ |
| 204 | static int sa1100_set_wake(unsigned int irq, unsigned int on) | 204 | static int sa1100_set_wake(struct irq_data *d, unsigned int on) |
| 205 | { | 205 | { |
| 206 | if (irq == IRQ_RTCAlrm) { | 206 | if (d->irq == IRQ_RTCAlrm) { |
| 207 | if (on) | 207 | if (on) |
| 208 | PWER |= PWER_RTC; | 208 | PWER |= PWER_RTC; |
| 209 | else | 209 | else |
| @@ -215,10 +215,10 @@ static int sa1100_set_wake(unsigned int irq, unsigned int on) | |||
| 215 | 215 | ||
| 216 | static struct irq_chip sa1100_normal_chip = { | 216 | static struct irq_chip sa1100_normal_chip = { |
| 217 | .name = "SC", | 217 | .name = "SC", |
| 218 | .ack = sa1100_mask_irq, | 218 | .irq_ack = sa1100_mask_irq, |
| 219 | .mask = sa1100_mask_irq, | 219 | .irq_mask = sa1100_mask_irq, |
| 220 | .unmask = sa1100_unmask_irq, | 220 | .irq_unmask = sa1100_unmask_irq, |
| 221 | .set_wake = sa1100_set_wake, | 221 | .irq_set_wake = sa1100_set_wake, |
| 222 | }; | 222 | }; |
| 223 | 223 | ||
| 224 | static struct resource irq_resource = { | 224 | static struct resource irq_resource = { |
diff --git a/arch/arm/mach-sa1100/neponset.c b/arch/arm/mach-sa1100/neponset.c index c601a75a333d..4aad01f73660 100644 --- a/arch/arm/mach-sa1100/neponset.c +++ b/arch/arm/mach-sa1100/neponset.c | |||
| @@ -35,7 +35,7 @@ neponset_irq_handler(unsigned int irq, struct irq_desc *desc) | |||
| 35 | /* | 35 | /* |
| 36 | * Acknowledge the parent IRQ. | 36 | * Acknowledge the parent IRQ. |
| 37 | */ | 37 | */ |
| 38 | desc->chip->ack(irq); | 38 | desc->irq_data.chip->irq_ack(&desc->irq_data); |
| 39 | 39 | ||
| 40 | /* | 40 | /* |
| 41 | * Read the interrupt reason register. Let's have all | 41 | * Read the interrupt reason register. Let's have all |
| @@ -53,7 +53,7 @@ neponset_irq_handler(unsigned int irq, struct irq_desc *desc) | |||
| 53 | * recheck the register for any pending IRQs. | 53 | * recheck the register for any pending IRQs. |
| 54 | */ | 54 | */ |
| 55 | if (irr & (IRR_ETHERNET | IRR_USAR)) { | 55 | if (irr & (IRR_ETHERNET | IRR_USAR)) { |
| 56 | desc->chip->mask(irq); | 56 | desc->irq_data.chip->irq_mask(&desc->irq_data); |
| 57 | 57 | ||
| 58 | /* | 58 | /* |
| 59 | * Ack the interrupt now to prevent re-entering | 59 | * Ack the interrupt now to prevent re-entering |
| @@ -61,7 +61,7 @@ neponset_irq_handler(unsigned int irq, struct irq_desc *desc) | |||
| 61 | * since we'll check the IRR register prior to | 61 | * since we'll check the IRR register prior to |
| 62 | * leaving. | 62 | * leaving. |
| 63 | */ | 63 | */ |
| 64 | desc->chip->ack(irq); | 64 | desc->irq_data.chip->irq_ack(&desc->irq_data); |
| 65 | 65 | ||
| 66 | if (irr & IRR_ETHERNET) { | 66 | if (irr & IRR_ETHERNET) { |
| 67 | generic_handle_irq(IRQ_NEPONSET_SMC9196); | 67 | generic_handle_irq(IRQ_NEPONSET_SMC9196); |
| @@ -71,7 +71,7 @@ neponset_irq_handler(unsigned int irq, struct irq_desc *desc) | |||
| 71 | generic_handle_irq(IRQ_NEPONSET_USAR); | 71 | generic_handle_irq(IRQ_NEPONSET_USAR); |
| 72 | } | 72 | } |
| 73 | 73 | ||
| 74 | desc->chip->unmask(irq); | 74 | desc->irq_data.chip->irq_unmask(&desc->irq_data); |
| 75 | } | 75 | } |
| 76 | 76 | ||
| 77 | if (irr & IRR_SA1111) { | 77 | if (irr & IRR_SA1111) { |
